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* core: arm_dynarmic_32: Update SaveContext/LoadContext.bunnei2023-04-021-13/+10
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* memory: rename global memory references to application memoryLiam2023-03-243-7/+7
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* kernel: use KTypedAddress for addressesLiam2023-03-226-22/+22
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* general: rename CurrentProcess to ApplicationProcessLiam2023-02-141-3/+3
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* kernel/svc: switch to generated wrappersLiam2023-02-071-0/+1
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* Be careful of mangled out of bounds readKelebek12023-01-141-4/+0
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* Add stacktrace symbol demanglingKelebek12023-01-141-14/+4
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* externals: update dynarmic, xbyakLiam2023-01-062-0/+8
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* core: add option to break on unmapped accessLiam2022-12-023-6/+44
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* Dynarmic: Remove inaccurate NaN from Auto CPU settings.Fernando Sahmkow2022-11-171-1/+0
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* Initial ARM64 supportLiam2022-11-093-9/+22
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* arm_interface: curb infinite recursion in stacktrace generationLiam2022-10-272-2/+2
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* core: hle: kernel: k_thread: Implement thread termination DPC.bunnei2022-10-191-0/+8
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* k_server_session: preliminary support for userspace server sessionsLiam2022-10-121-0/+1
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* code: dodge PAGE_SIZE #defineKyle Kienapfel2022-08-201-2/+2
| | | | | | | | | | | | | | | | | | | | | Some header files, specifically for OSX and Musl libc define PAGE_SIZE to be a number This is great except in yuzu we're using PAGE_SIZE as a variable Specific example `static constexpr u64 PAGE_SIZE = u64(1) << PAGE_BITS;` PAGE_SIZE PAGE_BITS PAGE_MASK are all similar variables. Simply deleted the underscores, and then added YUZU_ prefix Might be worth noting that there are multiple uses in different classes/namespaces This list may not be exhaustive Core::Memory 12 bits (4096) QueryCacheBase 12 bits ShaderCache 14 bits (16384) TextureCache 20 bits (1048576, or 1MB) Fixes #8779
* Merge pull request #8745 from merryhime/null-fastmem-arenaliamwhite2022-08-122-7/+11
|\ | | | | arm_dynarmic: Fix nullptr fastmem arenas
| * arm_dynarmic: Fix nullptr fastmem arenasMerry2022-08-092-7/+11
| | | | | | | | Unable to enable fastmem of exclusive access without a valid fastmem arena.
* | Merge pull request #8729 from merryhime/cp15-barriersbunnei2022-08-102-4/+29
|\ \ | |/ |/| arm_dynarmic_cp15: Implement CP15DMB/CP15DSB/CP15ISB
| * arm_dynarmic_cp15: Implement CP15DMB/CP15DSB/CP15ISBMerry2022-08-072-4/+29
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* | core/arm: fix build errorLiam2022-08-082-2/+10
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* | Merge pull request #8637 from liamwhite/bad-interruptsbunnei2022-08-087-85/+25
|\ \ | | | | | | kernel: unlayer CPU interrupt handling
| * | kernel: unlayer CPU interrupt handlingLiam2022-07-257-85/+25
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* | | Merge pull request #8240 from liamwhite/count-cyclesMorph2022-08-082-8/+22
|\ \ \ | |_|/ |/| | core/arm: re-enable cycle counting
| * | core/arm: increase minimum_run_cyclesLiam2022-06-222-2/+2
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| * | core/arm: re-enable cycle countingmerry2022-06-222-6/+20
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* | | chore: make yuzu REUSE compliantAndrea Pappacoda2022-07-273-9/+6
| |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [REUSE] is a specification that aims at making file copyright information consistent, so that it can be both human and machine readable. It basically requires that all files have a header containing copyright and licensing information. When this isn't possible, like when dealing with binary assets, generated files or embedded third-party dependencies, it is permitted to insert copyright information in the `.reuse/dep5` file. Oh, and it also requires that all the licenses used in the project are present in the `LICENSES` folder, that's why the diff is so huge. This can be done automatically with `reuse download --all`. The `reuse` tool also contains a handy subcommand that analyzes the project and tells whether or not the project is (still) compliant, `reuse lint`. Following REUSE has a few advantages over the current approach: - Copyright information is easy to access for users / downstream - Files like `dist/license.md` do not need to exist anymore, as `.reuse/dep5` is used instead - `reuse lint` makes it easy to ensure that copyright information of files like binary assets / images is always accurate and up to date To add copyright information of files that didn't have it I looked up who committed what and when, for each file. As yuzu contributors do not have to sign a CLA or similar I couldn't assume that copyright ownership was of the "yuzu Emulator Project", so I used the name and/or email of the commit author instead. [REUSE]: https://reuse.software Follow-up to 01cf05bc75b1e47beb08937439f3ed9339e7b254
* | Merge pull request #8549 from liamwhite/kscheduler-scMorph2022-07-251-1/+2
|\ \ | | | | | | kernel: use KScheduler from Mesosphere
| * | kernel: use KScheduler from mesosphereLiam2022-07-151-1/+2
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* | | Merge pull request #8569 from merryhime/watchpointsmerry2022-07-174-8/+3
|\ \ \ | | | | | | | | dynarmic: Abort watchpoints ASAP
| * | | dynarmic: Abort watchpoints ASAPMerry2022-07-154-8/+3
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* / / core/arm: skip watchpoint checks when reading instructionsLiam2022-07-162-6/+6
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* | Merge pull request #8501 from liamwhite/backtrace-againMai2022-07-085-15/+51
|\ \ | | | | | | core/arm: better support for backtrace generation
| * | core/arm: better support for backtrace generationLiam2022-06-255-15/+51
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* | Merge pull request #8490 from liamwhite/read-code-stopMorph2022-07-014-24/+64
|\ \ | | | | | | dynarmic: Stop ReadCode callbacks to unmapped addresses
| * | dynarmic: Stop ReadCode callbacks to unmapped addressesLiam2022-06-224-24/+64
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* / kernel: make current thread pointer thread localLiam2022-06-231-1/+1
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* core/debugger: memory breakpoint supportLiam2022-06-166-27/+187
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* core: centralize profile scope for DynarmicLiam2022-06-151-0/+2
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* common: consolidate ELF structure definitionsLiam2022-06-051-72/+13
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* core/debugger: Improved stepping mechanism and misc fixesLiam2022-06-016-80/+87
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* core/debugger: Implement new GDB stub debuggerLiam2022-06-016-16/+69
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* general: Avoid ambiguous format_to compilation errorsLioncash2022-05-141-1/+1
| | | | | | | Ensures that we're using the fmt version of format_to. These are also the only three outliers. All of the other formatters we have are properly qualified.
* Remove unused PrepareReschedule functionMerry2022-04-245-13/+0
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* general: Convert source file copyright comments over to SPDXMorph2022-04-2313-39/+26
| | | | | This formats all copyright comments according to SPDX formatting guidelines. Additionally, this resolves the remaining GPLv2 only licensed files by relicensing them to GPLv2.0-or-later.
* core/arm: separate backtrace collectionLiam2022-04-216-90/+98
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* Merge pull request #8188 from merryhime/jit-race-page-table-changedbunnei2022-04-164-57/+84
|\ | | | | dynarmic: Fix race when switching page tables
| * dynarmic: Fix race when switching page tablesmerry2022-04-104-57/+84
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* | dynarmic: Fix single core modemerry2022-04-132-2/+2
| | | | | | | | Regression introduced in a5d040df3d. Closes #8201.
* | core: extract symbol readingLiam2022-04-093-129/+229
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* Merge pull request #8148 from merryhime/interruptsFernando S2022-04-075-45/+41
|\ | | | | dynarmic: Better interrupts
| * arm_dynarmic: Use HaltReason for svc calls and reschedulesmerry2022-04-034-27/+19
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| * dynarmic: Better interruptsmerry2022-04-035-22/+26
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* | dynarmic: Print stack trace on unrecognised instruction or other exceptionmerry2022-04-052-0/+4
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* | Merge pull request #8089 from merryhime/paranoiabunnei2022-04-042-44/+56
|\ \ | |/ |/| configuration: Add Paranoid CPU accuracy level
| * configuration: Add Paranoid CPU accuracy levelmerry2022-03-262-44/+56
| | | | | | | | Disables most optimizations for the paranoid.
* | arm_dynarmic_64: Invalidate on all coresmerry2022-03-271-2/+4
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* Revert "dynarmic: Reduce size of code caches"bunnei2022-03-232-4/+4
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* core: Reduce unused includesameerj2022-03-191-2/+0
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* dynarmic: Reduce size of code cachesMerry2022-03-132-4/+4
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* dynarmic: Inline exclusive memory accessesmerry2022-02-275-4/+29
| | | | | | | | | | | | | | | Inlines implementation of exclusive instructions into JITted code, improving performance of applications relying heavily on these instructions. We also fastmem these instructions for additional speed, with support for appropriate recompilation on fastmem failure. An unsafe optimization to disable the intercore global_monitor is also provided, should one wish to rely solely on cmpxchg semantics for safety. See also: merryhime/dynarmic#664
* general: Replace NonCopyable struct with equivalentsLioncash2022-02-021-1/+5
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* arm: dynarmic: Cleanup icache op handlingjam1garner2021-11-221-10/+9
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* arm: dynarmic: Implement icache op handling for 'ic iallu' instructionjam1garner2021-11-221-0/+3
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* arm: dynarmic: Implement icache op handling for 'ic ivau' instructionjam1garner2021-11-221-0/+18
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* core: Remove unused includesameerj2021-11-046-7/+0
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* Fixed ARM_Dynamic_64 StepAndrew Strelsky2021-10-241-1/+1
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* settings, arm_dynarmic, yuzu qt: Move CPU debugging optionlat9nq2021-07-082-2/+2
| | | | | | Decouples the CPU debugging mode from the enumeration to its own boolean. After this, it moves the CPU Debugging tab over to a sub tab underneath the Debug tab in the configuration UI.
* arm_dynarmic_64: Re-add fastmem_address_space_bits to Auto settinglat9nq2021-07-081-0/+1
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* arm_dynarmic{32,64}: Fixes from test buildlat9nq2021-07-082-18/+5
| | | | | Now sets optimizations regardless of the Settings. Drops unsafe fastmem optimization.
* core,common,yuzu qt: Add CPU accuracy option 'Auto'lat9nq2021-07-082-8/+36
| | | | | | | The current CPU accuracy settings in yuzu are fairly polarized and require more than common knowledge to know what the optimal settings for yuzu would be. This adds a curated option called 'Auto' that applies a few at the moment known-good unsafe optimizations to Dynarmic.
* common: Replace common_sizes into user-literalsWunkolo2021-06-242-4/+9
| | | | | | | | | | | | | Removes common_sizes.h in favor of having `_KiB`, `_MiB`, `_GiB`, etc user-literals within literals.h. To keep the global namespace clean, users will have to use: ``` using namespace Common::Literals; ``` to access these literals.
* Update dynarmic and add new unsafe CPU option.Fernando Sahmkow2021-06-201-0/+3
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* General: Add settings for fastmem and disabling adress space check.FernandoS272021-06-112-2/+11
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* core: Make use of fastmemMarkus Wick2021-06-112-0/+5
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* Merge pull request #6385 from degasus/save_memory_accessbunnei2021-05-312-29/+31
|\ | | | | core/memory: Check our memory fallbacks for out-of-bound behavior.
| * core/arm_interface: Improve the performance of memory fallbacks.Markus Wick2021-05-292-29/+31
| | | | | | | | | | We just create one memory subsystem. This is a constant all the time. So there is no need to call the non-inlined parent.Memory() helper on every callback.
* | externals: Update dynarmic.Markus Wick2021-05-296-11/+11
|/ | | | The new version supports fastmem on a64.
* core/arm_interface: Call SVC after end of dynarmic block.Markus Wick2021-05-275-17/+42
| | | | | | So we can modify all of dynarmic states within SVC without ExceptionalExit. Especially as the ExceptionalExit hack is dropped on upstream dynarmic.
* core/arm: Drop ChangeProcessorID.Markus Wick2021-05-265-12/+0
| | | | | | This code was used to switch the CPU ID on thread switches. However since "hle: kernel: multicore: Replace n-JITs impl. with 4 JITs.", the CPU ID is not a constant. This has been dead code since this rewrite, and dropped in dynarmic as well. So there is no need to keep it.
* Merge pull request #6321 from lat9nq/per-game-cpubunnei2021-05-212-10/+10
|\ | | | | configuration: Add CPU tab to game properties and slight per-game settings rework
| * general: Make CPU accuracy and related a Settings::Settinglat9nq2021-05-162-10/+10
| | | | | | | | | | Required to make CPU accuracy and unsafe settings available to use as a per-game setting.
* | core: Make variable shadowing a compile-time errorLioncash2021-05-165-6/+6
|/ | | | | | Now that we have most of core free of shadowing, we can enable the warning as an error to catch anything that may be remaining and also eliminate this class of logic bug entirely.
* hle: kernel: Rename Process to KProcess.bunnei2021-05-061-1/+1
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* service: Resolve cases of member field shadowingLioncash2021-05-044-16/+16
| | | | | Now all that remains is for kernel code to be 'shadow-free' and then -Wshadow can be turned into an error.
* core: Resolve misc cases of variable shadowingLioncash2021-05-031-6/+5
| | | | | | | | | Resolves shadowing warnings that aren't in a particularly large subsection of core. Brings us closer to turning -Wshadow into an error. All that remains now is for cases in the kernel (left untouched for now since a big change by bunnei is pending), and a few left over in the service code (will be tackled next).
* common: Move settings to common from core.bunnei2021-04-152-2/+2
| | | | - Removes a dependency on core and input_common from common.
* arm_dynarmic: Increase size of code cacheMerryMage2021-04-022-0/+8
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* arm_dynarmic: Always have a 'valid' jit instanceMerryMage2021-03-244-53/+26
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* core: arm_dynarmic: Ensure JIT state is saved/restored on page table changes.bunnei2021-03-212-0/+10
| | | | - We re-create the JIT here without preserving any state.
* arm_dynarmic_32: Print out CPSR.T on exceptionMerryMage2021-02-012-2/+7
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* arm: dynarmic: Reintroduce JIT checks on SaveContext/LoadContext.bunnei2021-01-292-0/+12
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* core: arm: Remove unnecessary JIT checks.bunnei2021-01-292-24/+0
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* arm: arm_dynarmic: Skip calls when JIT is invalid.bunnei2021-01-292-0/+24
| | | | - This can happen if called from an idle or suspension thread.
* core: arm: arm_interface: Fix shadowing errors.bunnei2021-01-111-3/+4
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* core: Silence unhandled enum in switch warningsReinUsesLisp2021-01-091-8/+1
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* dynarmic: Add Unsafe_InaccurateNaN optimizationMerryMage2021-01-022-0/+6
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* core/memory: Read and write page table atomicallyReinUsesLisp2020-12-302-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | Squash attributes into the pointer's integer, making them an uintptr_t pair containing 2 bits at the bottom and then the pointer. These bits are currently unused thanks to alignment requirements. Configure Dynarmic to mask out these bits on pointer reads. While we are at it, remove some unused attributes carried over from Citra. Read/Write and other hot functions use a two step unpacking process that is less readable to stop MSVC from emitting an extra AND instruction in the hot path: mov rdi,rcx shr rdx,0Ch mov r8,qword ptr [rax+8] mov rax,qword ptr [r8+rdx*8] mov rdx,rax -and al,3 and rdx,0FFFFFFFFFFFFFFFCh je Core::Memory::Memory::Impl::Read<unsigned char> mov rax,qword ptr [vaddr] movzx eax,byte ptr [rdx+rax]
* hle: kernel: Rewrite scheduler implementation based on Mesopshere.bunnei2020-12-061-1/+1
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* hle: kernel: physical_core: Clear exclusive state after each run.bunnei2020-12-062-0/+6
| | | | - This is closer to pre-multicore behavior, and works a bit better.
* core: arm: Implement InvalidateCacheRange for CPU cache invalidation.bunnei2020-11-295-6/+29
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* hle: kernel: multicore: Replace n-JITs impl. with 4 JITs.bunnei2020-11-295-0/+13
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* core: Eliminate remaining usages of the global system instanceLioncash2020-11-271-11/+0
| | | | | | Removes all remaining usages of the global system instance. After this, migration can begin to migrate to being constructed and managed entirely by the various frontends.
* cpu_interrupt_handler: Mark move contructor/assignment as deletedLioncash2020-11-081-2/+2
| | | | | | | | The interrupt handler contains a std::atomic_bool, which isn't copyable or movable, so the special move member functions will always be deleted, despite being defaulted. This can resolve warnings on clang and GCC.
* Merge pull request #4888 from lioncash/unicorn-removebunnei2020-11-075-381/+9
|\ | | | | core: Remove usage of unicorn
| * core: Remove usage of unicornLioncash2020-11-045-381/+9
| | | | | | | | | | | | | | | | Unicorn long-since lost most of its use, due to dynarmic gaining support for handling most instructions. At this point any further issues encountered should be used to make dynarmic better. This also allows us to remove our dependency on Python.
* | General: Resolve a few missing initializer warningsLioncash2020-10-301-2/+10
|/ | | | Resolves a few -Wmissing-initializer warnings.
* Revert "core: Fix clang build"bunnei2020-10-219-69/+53
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* core: Fix clang buildLioncash2020-10-189-53/+69
| | | | | | | Recent changes to the build system that made more warnings be flagged as errors caused building via clang to break. Fixes #4795
* General: Make use of std::nullopt where applicableLioncash2020-09-221-3/+3
| | | | | | | | Allows some implementations to avoid completely zeroing out the internal buffer of the optional, and instead only set the validity byte within the structure. This also makes it consistent how we return empty optionals.
* arm_dynarmic_cp15: Initialize member variablesLioncash2020-09-171-2/+2
| | | | | Ensures that the member variables are always initialized to a deterministic value on creation.
* cpu_interrupt_handler: Misc style changesReinUsesLisp2020-08-262-5/+3
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* cpu_interrupt_handler: Make is_interrupted an atomicReinUsesLisp2020-08-262-2/+3
| | | | Fixes a race condition detected from tsan
* dynarmic: Add unsafe optimizationsMerryMage2020-08-162-2/+24
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* configure_cpu: Show/Hide debugging optionsMerryMage2020-07-112-46/+50
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* configuration: Add settings to enable/disable specific CPU optimizationsMerryMage2020-07-112-10/+50
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* cpu_interrupt_handler: Remove #pragma once from .cpp fileMerryMage2020-07-071-2/+0
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* Core/Common: Address Feedback.Fernando Sahmkow2020-06-288-10/+12
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* SVC: Implement 32-bits wrappers and update Dynarmic.Fernando Sahmkow2020-06-272-4/+9
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* ARM: Update Dynarmic and Setup A32 according to latest interface.Fernando Sahmkow2020-06-277-93/+166
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* ArmDynarmic32: Setup CNTPCT correctlyFernando Sahmkow2020-06-271-1/+1
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* ARMDynarmicInterface: Correct GCC Build Errors.Fernando Sahmkow2020-06-272-6/+6
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* Clang Format.Fernando Sahmkow2020-06-272-4/+4
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* ARMInterface/Externals: Update dynarmic and fit to latest version.Fernando Sahmkow2020-06-271-7/+7
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* ARMInterface: Correct rebase errors.Fernando Sahmkow2020-06-273-5/+5
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* Dynarmic Interface: don't clear cache if JIT has not been created.Fernando Sahmkow2020-06-272-0/+6
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* General: Cleanup legacy code.Fernando Sahmkow2020-06-272-2/+0
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* SingleCore: Use Cycle Timing instead of Host Timing.Fernando Sahmkow2020-06-277-34/+62
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* General: Move ARM_Interface into Threads.Fernando Sahmkow2020-06-277-0/+17
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* Core: Refactor ARM Interface.Fernando Sahmkow2020-06-277-18/+26
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* X64 Clock: Reduce accuracy to be less or equal to guest accuracy.Fernando Sahmkow2020-06-271-0/+3
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* ARM/WaitTree: Better track the CallStack for each thread.Fernando Sahmkow2020-06-272-0/+60
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* SVC/ARM: Correct svcSendSyncRequest and cache ticks on arm interface.Fernando Sahmkow2020-06-272-4/+19
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* ARM: Addapt to new Exclusive Monitor Interface.Fernando Sahmkow2020-06-273-22/+20
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* General: Fix microprofile on dynarmic/svc, fix wait tree showing which threads were running.Fernando Sahmkow2020-06-272-8/+1
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* ARM/Memory: Correct Exclusive Monitor and Implement Exclusive Memory Writes.Fernando Sahmkow2020-06-273-15/+63
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* Scheduler: Remove arm_interface lock and a few corrections.Fernando Sahmkow2020-06-271-10/+0
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* Core: Correct rebase.Fernando Sahmkow2020-06-271-12/+6
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* General: Add better safety for JIT use.Fernando Sahmkow2020-06-271-0/+10
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* General: Recover Prometheus project from harddrive failure Fernando Sahmkow2020-06-279-29/+103
| | | | | | | This commit: Implements CPU Interrupts, Replaces Cycle Timing for Host Timing, Reworks the Kernel's Scheduler, Introduce Idle State and Suspended State, Recreates the bootmanager, Initializes Multicore system.
* arm_dynarmic_64: Log the instruction when an exception is raisedMorph2020-06-221-2/+2
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* arm_dynarmic_32: Log under Core_ARM instead of HW_GPUMorph2020-06-221-1/+1
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* arm_dynarmic_32: Fix implicit conversion error in SetTPIDR_EL0ReinUsesLisp2020-06-181-1/+1
| | | | On MSVC builds we treat conversion warnings as errors.
* arm_dynarmic_cp15: Implement CNTPCTMerryMage2020-06-171-0/+13
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* arm_dynarmic_cp15: Update CP15MerryMage2020-06-174-142/+73
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* arm_dynarmic_32: InterpreterFallback should never happenMerryMage2020-06-171-2/+3
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* physical_core: Make use of std::make_unique instead of std::make_shared in ctorLioncash2020-04-243-7/+12
| | | | | | | We can also allow unicorn to be constructed in 32-bit mode or 64-bit mode to satisfy the need for both interpreter instances. Allows this code to compile successfully of non x86-64 architectures.
* Merge pull request #3724 from bunnei/fix-unicornbunnei2020-04-211-0/+11
|\ | | | | core: arm_unicorn: Fix interpret fallback by temporarily mapping instruction page.
| * core: arm_unicorn: Fix interpret fallback by temporarily mapping instruction page.bunnei2020-04-191-0/+11
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* | dynarmic: Add option to disable CPU JIT optimizationsMerryMage2020-04-201-2/+8
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* dynarmic: Enable strict alignment checks.bunnei2020-04-171-1/+4
| | | | - Also add a missing include.
* core: memory: Move to Core::Memory namespace.bunnei2020-04-174-5/+5
| | | | - helpful to disambiguate Kernel::Memory namespace.
* core: kernel: Move SVC to its own namesapce.bunnei2020-04-173-3/+3
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* arm_interface: Ensure ThreadContext is zero'd out.bunnei2020-04-171-16/+16
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* CMakeLists: Specify -Wextra on linux buildsLioncash2020-04-161-2/+2
| | | | | | | | | | | Allows reporting more cases where logic errors may exist, such as implicit fallthrough cases, etc. We currently ignore unused parameters, since we currently have many cases where this is intentional (virtual interfaces). While we're at it, we can also tidy up any existing code that causes warnings. This also uncovered a few bugs as well.
* core: Implement separate A32/A64 ARM interfaces.bunnei2020-03-038-71/+367
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* core: dynarmic: Add CP15 from Citra.bunnei2020-03-032-0/+232
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* ARM_Interface: Cache the JITs instead of deleting/recreating.Fernando Sahmkow2020-02-262-4/+19
| | | | | | This was a bug inherited from citra which was fixed by then at some time. This commit corrects such bug and ensures JITs are correctly recycled.
* Core: Set all hardware emulation constants in a single file.Fernando Sahmkow2020-02-121-1/+2
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* core/arm: Remove usage of global GetCurrentThread()Lioncash2020-01-312-2/+4
| | | | | Now both CPU backends go through their referenced system instance to obtain the current thread.
* System: Address FeedbackFernando Sahmkow2020-01-272-3/+5
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* Core: Refactor CpuCoreManager to CpuManager and Cpu to Core Manager.Fernando Sahmkow2020-01-261-1/+1
| | | | This commit instends on better naming the new purpose of this classes.
* ArmInterface: Delegate Exclusive monitor factory to exclusive monitor interfasce.Fernando Sahmkow2020-01-262-1/+22
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* core/memory + arm/dynarmic: Use a global offset within our arm page table.Markus Wick2020-01-011-0/+1
| | | | | | This saves us two x64 instructions per load/store instruction. TODO: Clean up our memory code. We can use this optimization here as well.
* core/memory: Migrate over Write{8, 16, 32, 64, Block} to the Memory classLioncash2019-11-272-15/+22
| | | | | | | | | The Write functions are used slightly less than the Read functions, which make these a bit nicer to move over. The only adjustments we really need to make here are to Dynarmic's exclusive monitor instance. We need to keep a reference to the currently active memory instance to perform exclusive read/write operations.
* core/memory: Migrate over Read{8, 16, 32, 64, Block} to the Memory classLioncash2019-11-272-18/+18
| | | | | | | | | | | | | | With all of the trivial parts of the memory interface moved over, we can get right into moving over the bits that are used. Note that this does require the use of GetInstance from the global system instance to be used within hle_ipc.cpp and the gdbstub. This is fine for the time being, as they both already rely on the global system instance in other functions. These will be removed in a change directed at both of these respectively. For now, it's sufficient, as it still accomplishes the goal of de-globalizing the memory code.
* core: Prepare various classes for memory read/write migrationLioncash2019-11-276-9/+14
| | | | | | | | | | Amends a few interfaces to be able to handle the migration over to the new Memory class by passing the class by reference as a function parameter where necessary. Notably, within the filesystem services, this eliminates two ReadBlock() calls by using the helper functions of HLERequestContext to do that for us.
* arm_unicorn: Resolve sign conversion warningsLioncash2019-11-123-8/+10
| | | | | While we're at it, this also resolves a type truncation warning as well, given the code was truncating from a 64-bit value to a 32-bit one.
* Core_Timing: Address Feedback and suppress warnings.Fernando Sahmkow2019-10-112-2/+2
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* Core Timing: Rework Core Timing to run all cores evenly.Fernando Sahmkow2019-10-092-2/+2
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* Revert "arm_dynarmic: Check if jit is nullptr when preparing reschedule"bunnei2019-09-301-3/+0
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* Merge pull request #2574 from DarkLordZach/dynarmic-jit-nullptrbunnei2019-09-301-0/+3
|\ | | | | arm_dynarmic: Check if jit is nullptr when preparing reschedule
| * arm_dynarmic: Check if jit is nullptr when preparing rescheduleZach Hilman2019-06-101-0/+3
| | | | | | | | Prevents crash with multiprocess loading.
* | core: Remove CurrentArmInterface() global accessorLioncash2019-07-131-3/+6
| | | | | | | | | | Replaces the final usage of the global accessor function and removes it. Removes one more enabler of global state.
* | core/arm: Remove obsolete Unicorn memory mappingLioncash2019-07-115-31/+0
| | | | | | | | | | | | | | | | This was initially necessary when AArch64 JIT emulation was in its infancy and all memory-related instructions weren't implemented. Given the JIT now has all of these facilities implemented, we can remove these functions from the CPU interface.
* | loader: Move NSO module tracking to AppLoaderZach Hilman2019-05-261-8/+19
| | | | | | Also cleanup of general stuff
* | arm_interface: Expand backtrace generationZach Hilman2019-05-252-7/+194
|/ | | | Returns results as a vector of entries for further processing. Logs addresses, offsets, and mangled name.
* core/cpu_core_manager: Create threads separately from initialization.Lioncash2019-04-124-20/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Our initialization process is a little wonky than one would expect when it comes to code flow. We initialize the CPU last, as opposed to hardware, where the CPU obviously needs to be first, otherwise nothing else would work, and we have code that adds checks to get around this. For example, in the page table setting code, we check to see if the system is turned on before we even notify the CPU instances of a page table switch. This results in dead code (at the moment), because the only time a page table switch will occur is when the system is *not* running, preventing the emulated CPU instances from being notified of a page table switch in a convenient manner (technically the code path could be taken, but we don't emulate the process creation svc handlers yet). This moves the threads creation into its own member function of the core manager and restores a little order (and predictability) to our initialization process. Previously, in the multi-threaded cases, we'd kick off several threads before even the main kernel process was created and ready to execute (gross!). Now the initialization process is like so: Initialization: 1. Timers 2. CPU 3. Kernel 4. Filesystem stuff (kind of gross, but can be amended trivially) 5. Applet stuff (ditto in terms of being kind of gross) 6. Main process (will be moved into the loading step in a following change) 7. Telemetry (this should be initialized last in the future). 8. Services (4 and 5 should ideally be alongside this). 9. GDB (gross. Uses namespace scope state. Needs to be refactored into a class or booted altogether). 10. Renderer 11. GPU (will also have its threads created in a separate step in a following change). Which... isn't *ideal* per-se, however getting rid of the wonky intertwining of CPU state initialization out of this mix gets rid of most of the footguns when it comes to our initialization process.
* kernel/svc: Deglobalize the supervisor call handlersLioncash2019-04-084-39/+37
| | | | | | | | | | | Adjusts the interface of the wrappers to take a system reference, which allows accessing a system instance without using the global accessors. This also allows getting rid of all global accessors within the supervisor call handling code. While this does make the wrappers themselves slightly more noisy, this will be further cleaned up in a follow-up. This eliminates the global system accessors in the current code while preserving the existing interface.
* arm/arm_dynarmic: Remove unnecessary current_page_table memberLioncash2019-04-072-8/+0
| | | | | Given the page table will always be guaranteed to be that of whatever the current process is, we no longer need to keep this around.
* Merge pull request #2240 from FearlessTobi/port-4651bunnei2019-04-062-3/+4
|\ | | | | Port citra-emu/citra#4651: "gdbstub: Fix some bugs in IsMemoryBreak() and ServeBreak. Add workaround to let watchpoints break into GDB."
| * gdbstub: Fix some bugs in IsMemoryBreak() and ServeBreak. Add workaround to let watchpoints break into GDB. (#4651)Dimitri A2019-03-152-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * gdbstub: fix IsMemoryBreak() returning false while connected to client As a result, the only existing codepath for a memory watchpoint hit to break into GDB (InterpeterMainLoop, GDB_BP_CHECK, ARMul_State::RecordBreak) is finally taken, which exposes incorrect logic* in both RecordBreak and ServeBreak. * a blank BreakpointAddress structure is passed, which sets r15 (PC) to NULL * gdbstub: DynCom: default-initialize two members/vars used in conditionals * gdbstub: DynCom: don't record memory watchpoint hits via RecordBreak() For now, instead check for GDBStub::IsMemoryBreak() in InterpreterMainLoop and ServeBreak. Fixes PC being set to a stale/unhit breakpoint address (often zero) when a memory watchpoint (rwatch, watch, awatch) is handled in ServeBreak() and generates a GDB trap. Reasons for removing a call to RecordBreak() for memory watchpoints: * The``breakpoint_data`` we pass is typed Execute or None. It describes the predicted next code breakpoint hit relative to PC; * GDBStub::IsMemoryBreak() returns true if a recent Read/Write operation hit a watchpoint. It doesn't specify which in return, nor does it trace it anywhere. Thus, the only data we could give RecordBreak() is a placeholder BreakpointAddress at offset NULL and type Access. I found the idea silly, compared to simply relying on GDBStub::IsMemoryBreak(). There is currently no measure in the code that remembers the addresses (and types) of any watchpoints that were hit by an instruction, in order to send them to GDB as "extended stop information." I'm considering an implementation for this. * gdbstub: Change an ASSERT to DEBUG_ASSERT I have never seen the (Reg[15] == last_bkpt.address) assert fail in practice, even after several weeks of (locally) developping various branches around GDB. Only leave it inside Debug builds.
* | core: Add missing override specifiers where applicableLioncash2019-04-043-4/+3
| | | | | | | | | | | | | | | | | | Applies the override specifier where applicable. In the case of destructors that are defaulted in their definition, they can simply be removed. This also removes the unnecessary inclusions being done in audin_u and audrec_u, given their close proximity.
* | core: Move PageTable struct into Common.bunnei2019-03-171-2/+2
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* | Corrections, documenting and fixes.Fernando Sahmkow2019-02-161-1/+1
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* | Use u128 on Clock Cycles calculation.Fernando Sahmkow2019-02-161-1/+1
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* | Correct CNTPCT to use Clock Cycles instead of Cpu Cycles.Fernando Sahmkow2019-02-161-2/+3
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* core_timing: Convert core timing into a classLioncash2019-02-164-10/+24
| | | | | | | | | | | Gets rid of the largest set of mutable global state within the core. This also paves a way for eliminating usages of GetInstance() on the System class as a follow-up. Note that no behavioral changes have been made, and this simply extracts the functionality into a class. This also has the benefit of making dependencies on the core timing functionality explicit within the relevant interfaces.
* core_timing: Rename CoreTiming namespace to Core::TimingLioncash2019-02-122-5/+5
| | | | | | Places all of the timing-related functionality under the existing Core namespace to keep things consistent, rather than having the timing utilities sitting in its own completely separate namespace.
* arm_interface: Make include path relative for arm_interface.hLioncash2018-12-311-1/+1
| | | | Makes it consistent with the rest of the includes.
* arm_interface: Make LogBacktrace() a const member functionLioncash2018-12-312-2/+2
| | | | This function doesn't modify instance state, so it can be made const.
* arm_interface: Mark variables as const where applicable in LogBacktrace()Lioncash2018-12-311-3/+4
| | | | | Two of these variables have fixed values, so we can make that immediately obvious from the get-go.
* arm_interface: Remove unnecessary semicolonLioncash2018-12-311-1/+1
| | | | | Namespaces don't require the use of a semicolon. Silences a -Wextra-semi warning.
* Merge pull request #1847 from ogniK5377/backtrace-breakbunnei2018-12-303-0/+35
|\ | | | | Print backtrace on svcBreak
| * Moved log backtrace to arm_interface.cpp. Added printing of error code to fatalDavid Marcec2018-12-292-17/+33
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| * Moved backtrace to ArmInterfaceDavid Marcec2018-12-195-36/+17
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| * Moved backtrace to ArmInterfaceDavid Marcec2018-12-035-0/+38
| | | | | | | | Added to both dynarmic and unicorn
* | arm_dynarmic: Set CNTFRQ valueMerryMage2018-12-181-0/+1
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* core: Make the exclusive monitor a unique_ptr instead of a shared_ptrLioncash2018-10-152-6/+5
| | | | | | Like the barrier, this is owned entirely by the System and will always outlive the encompassing state, so shared ownership semantics aren't necessary here.
* kernel/thread: Use a regular pointer for the owner/current processLioncash2018-10-101-1/+1
| | | | | | | | | | | There's no real need to use a shared pointer in these cases, and only makes object management more fragile in terms of how easy it would be to introduce cycles. Instead, just do the simple thing of using a regular pointer. Much of this is just a hold-over from citra anyways. It also doesn't make sense from a behavioral point of view for a process' thread to prolong the lifetime of the process itself (the process is supposed to own the thread, not the other way around).
* kernel/thread: Make all instance variables privateLioncash2018-10-042-2/+2
| | | | | | | | | | | | | | | | | | | | Many of the member variables of the thread class aren't even used outside of the class itself, so there's no need to make those variables public. This change follows in the steps of the previous changes that made other kernel types' members private. The main motivation behind this is that the Thread class will likely change in the future as emulation becomes more accurate, and letting random bits of the emulator access data members of the Thread class directly makes it a pain to shuffle around and/or modify internals. Having all data members public like this also makes it difficult to reason about certain bits of behavior without first verifying what parts of the core actually use them. Everything being public also generally follows the tendency for changes to be introduced in completely different translation units that would otherwise be better introduced as an addition to the Thread class' public interface.
* kernel/process: Make data member variables privateLioncash2018-09-301-2/+2
| | | | | | | Makes the public interface consistent in terms of how accesses are done on a process object. It also makes it slightly nicer to reason about the logic of the process class, as we don't want to expose everything to external code.
* arm_interface: Add missing fpsr/tpidr members to the ThreadContext structLioncash2018-09-302-4/+14
| | | | | | | | | Internally within the kernel, it also includes a member variable for the floating-point status register, and TPIDR, so we should do the same here to match it. While we're at it, also fix up the size of the struct and add a static assertion to ensure it always stays the correct size.
* Merge pull request #1395 from lioncash/vmbunnei2018-09-291-2/+3
|\ | | | | process/vm_manager: Initial modifications to load NPDM metadata
| * memory: Dehardcode the use of a 36-bit address spaceLioncash2018-09-251-2/+3
| | | | | | | | | | Given games can also request a 32-bit or 39-bit address space, we shouldn't be hardcoding the address space range as 36-bit.
* | FPCR register was uninitialized at start upPhilippe Babin2018-09-231-1/+1
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* arm_interface: Replace kernel vm_manager include with a forward declarationLioncash2018-09-213-1/+9
| | | | | | Avoids an unnecessary inclusion and also uncovers three places where indirect inclusions were relied upon, which allows us to also resolve those.
* arm_dynarmic: Halt when BRK encounteredMerryMage2018-09-201-0/+1
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* arm_dynarmic: Support BKPT instructionMerryMage2018-09-191-0/+11
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* Merge pull request #1344 from lioncash/armbunnei2018-09-185-72/+59
|\ | | | | arm_interface: Remove ARM11-isms from the CPU interface
| * arm_interface: Remove ARM11-isms from the CPU interfaceLioncash2018-09-185-72/+59
| | | | | | | | | | | | | | | | | | This modifies the CPU interface to more accurately match an AArch64-supporting CPU as opposed to an ARM11 one. Two of the methods don't even make sense to keep around for this interface, as Adv Simd is used, rather than the VFP in the primary execution state. This is essentially a modernization change that should have occurred from the get-go.
* | arm_dynarmic: Correct ExclusiveWrite128()'s operationLioncash2018-09-181-2/+2
|/ | | | | | Previously the second half of the value being written would overwrite the first half. Thankfully this wasn't a bug that was being encountered, as the function is currently unused.
* Port #4182 from Citra: "Prefix all size_t with std::"fearlessTobi2018-09-156-36/+37
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* Update microprofile scopes.Markus Wick2018-09-042-2/+6
| | | | | | Blame the subsystems which deserve the blame :) The updated list is not complete, just the ones I've spotted on random sampling the stack trace.
* core/core: Replace includes with forward declarations where applicableLioncash2018-08-311-0/+1
| | | | | | | | | | | The follow-up to e2457418dae19b889b2ad85255bb95d4cd0e4bff, which replaces most of the includes in the core header with forward declarations. This makes it so that if any of the headers the core header was previously including change, then no one will need to rebuild the bulk of the core, due to core.h being quite a prevalent inclusion. This should make turnaround for changes much faster for developers.
* core: Namespace all code in the arm subdirectory under the Core namespaceLioncash2018-08-257-2/+30
| | | | Gets all of these types and interfaces out of the global namespace.
* dynarmic: Update to 550d662MerryMage2018-08-161-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | 550d662 load_store_exclusive: Define s == t state to be Constraint_NONE 0b69381 A64/translate: Allow for unpredictable behaviour to be defined 6d236d4 system: Implement MRS CNTFRQ_EL0 6cbb6fb A32/testenv: Add missing headers 6729328 externals: Update xbyak to v5.67 1812bd2 Squashed 'externals/xbyak/' changes from 2794cde7..671fc805 9a95802 externals: Document subtrees 714a840 A64: Implement SQ{ADD, SUB}, and UQ{ADD, SUB}'s vector variants 8cab459 A64: Implement UQADD/UQSUB's scalar variants 18a8151 ir: Add opcodes for unsigned saturating add and subtract a5660ee x64/reg_alloc: Use type alias for array returned by GetArgumentInfo() 29489b5 ir/value: Use type alias CoprocessorInfo for std::array<u8, 8> e23ba26 status_register_access: Add support for bits 0 and 1 of mask to MSR 55190bd fuzz_with_unicorn: Split utility functions into fuzz_util 23b049d A32/translate/load_store: Correct detection of writeback 7ec9f15 A32/translate: Add TranslateSingleInstruction efeecb4 A32/ir_emitter: Bug fix: IREmitter::ExceptionRaised using incorrect opcode 08d1d19 A32/decoders: Split instruction list into include file 2d929cc tests: Refactor unicorn_emu to allow for A32 unicorn f672368 microinstruction: Improve assert messages 7ebff50 emit_x64_vector: EmitVectorNarrow16: AVX512 implementation edce230 emit_x64_vector: EmitVectorNarrow32: prefer pblendw to loading constant
* arm_dynarmic: Remove IsExecuting check from PrepareRescheduleMerryMage2018-08-131-3/+1
| | | | No longer required. HaltExecution is a no-op if it is not currently executing.
* CPU/Timing: Use an approximated amortized amount of ticks when advancing timing.Subv2018-08-131-1/+10
| | | | | | | | We divide the number of ticks to add by the number of cores (4) to obtain a more or less rough estimate of the actual number of ticks added. This assumes that all 4 cores are doing similar work. Previously we were adding ~4 times the number of ticks, thus making the games think that time was going way too fast. This lets us bypass certain hangs in some games like Breath of the Wild. We should modify our CoreTiming to support multiple cores (both running in a single thread, and in multiple host threads).
* GDBStub works with both Unicorn and Dynarmic now (#941)Hedges2018-08-071-1/+1
| | | | | | * GDBStub works with both Unicorn and Dynarmic now * Tidy up
* Merge pull request #876 from lioncash/includebunnei2018-08-011-1/+1
|\ | | | | kernel: Remove unnecessary includes
| * kernel: Remove unnecessary includesLioncash2018-07-311-1/+1
| | | | | | | | | | Removes unnecessary direct dependencies in some headers and also gets rid of indirect dependencies that were being relied on to be included.
* | arm_dynarmic: Make SetTlsAddress() prototype and definition consistentLioncash2018-07-311-1/+1
| | | | | | | | Makes the definition use the same type aliases as in its prototype.
* | arm_dynarmic: Remove unnecessary qualifying of ThreadContextLioncash2018-07-311-3/+3
| | | | | | | | | | Given the ARM_Dynarmic class inherits from ARM_Interface, we don't need to qualify here.
* | arm_dynarmic: Correct initializer list orderLioncash2018-07-311-5/+3
|/ | | | | | | | | Amends the initializer list to be in the same order that each variable would be initialized in. We also do this to ensure we don't use a bogus uninitialized instance of the exclusive monitor within MakeJit() We can also remove the jit member from the initializer list as this is initialized by PageTableChanged()
* arm_dynarmic: Make MakeJit() a const member functionLioncash2018-07-242-3/+3
| | | | | This functions doesn't modify instance state, so it can be a made a const member function.
* exclusive_monitor: Use consistent type alias for u64Lioncash2018-07-243-22/+18
| | | | | Uses the same type aliases we use for virtual addresses, and converts one lingering usage of std::array<uint64_t, 2> to u128 for consistency.
* Implement exclusive monitorMerryMage2018-07-224-8/+119
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* Merge pull request #750 from lioncash/ctxbunnei2018-07-213-9/+0
|\ | | | | arm_interface: Remove unused tls_address member of ThreadContext
| * arm_interface: Remove unused tls_address member of ThreadContextLioncash2018-07-213-9/+0
| | | | | | | | | | Currently, the TLS address is set within the scheduler, making this member unused.
* | CPU: Save and restore the TPIDR_EL0 system register on every context switch.Subv2018-07-215-0/+26
|/ | | | Note that there's currently a dynarmic bug preventing this register from being written.
* scheduler: Clear exclusive state when switching contextsMerryMage2018-07-165-0/+10
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* More improvements to GDBStub (#653)Hedges2018-07-131-2/+2
| | | | | | | | | | | * More improvements to GDBStub - Debugging of threads should work correctly with source and assembly level stepping and modifying registers and memory, meaning threads and callstacks are fully clickable in VS. - List of modules is available to the client, with assumption that .nro and .nso are backed up by an .elf with symbols, while deconstructed ROMs keep N names. - Initial support for floating point registers. * Tidy up as requested in PR feedback * Tidy up as requested in PR feedback
* Update clang formatJames Rowe2018-07-031-1/+1
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* Rename logging macro back to LOG_*James Rowe2018-07-031-1/+1
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* GDB Stub Improvements (#508)Hedges2018-06-062-1/+41
| | | | | | | | | | * GDB Stub should work now. * Applied clang-format. * Replaced htonll with swap64. * Tidy up.
* core: Implement multicore support.bunnei2018-05-111-1/+1
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* general: Make formatting of logged hex values more straightforwardLioncash2018-05-022-2/+2
| | | | | | This makes the formatting expectations more obvious (e.g. any zero padding specified is padding that's entirely dedicated to the value being printed, not any pretty-printing that also gets tacked on).
* general: Convert assertion macros over to be fmt-compatibleLioncash2018-04-272-3/+3
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* core: Replace remaining old non-generic logger usages with fmt-capable equivalentsLioncash2018-04-261-2/+2
| | | | | | LOG_GENERIC usages will be amended in a follow-up to keep API changes separate from interface changes, as it will require removing a parameter from the relevant function in the VMManager class.
* arm_dynarmic: Fix timingMerryMage2018-03-241-7/+3
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* Clean Warnings (?)N00byKing2018-03-191-1/+1
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* Merge pull request #193 from N00byKing/3184_2_robotic_boogaloobunnei2018-03-195-35/+31
|\ | | | | Implement Pull #3184 from citra: core/arm: Improve timing accuracy before service calls in JIT (Rebased)
| * Implements citra-emu/citra#3184N00byKing2018-02-255-35/+31
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* | arm_interface: Support unmapping previously mapped memory.bunnei2018-03-165-2/+15
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* | core: Move process creation out of global state.bunnei2018-03-141-1/+2
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* | Merge pull request #212 from mailwl/stubsbunnei2018-02-241-1/+2
|\ \ | | | | | | Stub some functions
| * | Stub am::SetScreenShotPermission, and bsd::StartMonitoring functionsmailwl2018-02-221-1/+2
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* | dynarmic: Update to 6b4c6b0MerryMage2018-02-211-2/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 6b4c6b0 impl: Update PC when raising exception 7a1313a A64: Implement FDIV (vector) b2d781d system: Raise exception for YIELD, WFE, WFI, SEV, SEVL b277bf5 Correct FPSR and FPCR 7673933 A64: Implement USHL 8d0e558 A64: Implement UCVTF (vector, integer), scalar variant da9a4f8 A64: Partially implement FCVTZU (scalar, fixed-point) and FCVTZS (scalar, fixed-point) 7479684 A64: Implement system register TPIDR_EL0 0fd75fd A64: Implement system registers FPCR and FPSR 31e370c A64: Implement system register CNTPCT_EL0 9a88fd3 A64: Implement system register CTR_EL0 1d16896 A64: Implement NEG (vector) 3184edf IR: Add IR instruction ZeroVector 31f8fbc emit_x64_floating_point: Add maybe_unused to preprocess parameter 567eb1a A64: Implement FMINNM (scalar) c6d8fa1 A64: Implement FMAXNM (scalar) 616056d constant_pool: Add frame parameter a3747cb A64: Implement ADDP (scalar) 5cd5d9f reg_alloc: Only exchange GPRs dd0452a A64: Implement DUP (element), scalar variant e5732ea emit_x64_floating_point: Correct FP{Max,Min}{32,64} implementations for -0/+0 40eb9c3 A64: Implement FMAX (scalar), FMIN (scalar) 7cef39b fuzz_with_unicorn: QEMU's implementation of FCVT is incorrect 826dce2 travis: Switch unicorn repository 9605f28 a64/config: Allow NaN emulation accuracy to be set e9435bc a64_emit_x64: Add conf to A64EmitContext 30b596d fuzz_with_unicorn: Explicitly test floating point instructions be292a8 A64: Implement FSQRT (scalar) 3c42d48 backend_x64: Accurately handle NaNs 4aefed0 fuzz_with_unicorn: Print AArch64 disassembly
* | arm_dynarmic: LOG_INFO on unicorn fallbackMerryMage2018-02-211-0/+4
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* arm_dynarmic: Support direct page table accessMerryMage2018-02-121-6/+14
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* dynarmic: Update to 41ae12263MerryMage2018-02-092-31/+45
| | | | Changes: Primarily implementing more A64 instructions
* Fixes some cast warnings, partial port of citra #3064 (#106)River City Ransomware2018-01-201-3/+3
| | | | | | | | * Fixes some cast warnings, partially fixes citra #3064 * Converted casts to uint32_t to u32 * Ran clang-format
* clang-formatMerryMage2018-01-161-1/+2
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* Build: Automagically handle unicornJames Rowe2018-01-161-1/+1
| | | | | | | On MSVC if unicorn isn't found, fallback to bundled unicorn On everything else, fallback to building unicorn in externals Also fixes loading unicorn in msvc
* Build: Add unicorn as a submodule and build it if neededJames Rowe2018-01-161-1/+1
| | | | | | | Adds a cmake custom target that will build unicorn on first compile and uses this in the build scripts as well. Updates Appveyor and Travis build scripts to work with the new unicorn build, and updates the paths to all of the different artifacts.
* Update dynarmic to bc73004MerryMage2018-01-131-12/+17
| | | | | | | | | | | | | | | | | | bc73004 a64_merge_interpret_blocks: Remove debug output 4e656ed tests/A64: Randomize PSTATE.<NZCV> fd9530b A64: Optimization: Merge interpret blocks 3c9eb04 testenv: Use format constants 324f3fc tests/A64: Unicorn interface fixes 98ecbe7 tests/A64: Fuzz against unicorn b1d38e7 tests/A64: Move TestEnvironment to own header 5218ad9 A64/data_processing_pcrel: bug: ADR{,P} instructions sign extend their immediate b1a8c39 A64/data_processing_addsub: bug: {ADD,SUB}S (extended register) instructions write to ZR when d = 31 64827fb a64_emit_x64: bug: A64CallSupervisor trampled callee-save registers 1bfa04d emit_x64: bug: OP m/r64, imm32 form instructions sign-extend their immediate on x64 edadeea A64 inferface: Use two argument static_assert 9ab1304 A64: Add ExceptionRaised IR instruction 6843eed Update readme 7438d07 A64/translate: Add TranslateSingleInstruction function
* arm_unicorn: Log unmapped memory access address.bunnei2018-01-131-1/+1
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* yuzu: Update license text to be consistent across project.bunnei2018-01-134-4/+4
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* arm_dynarmic: Implement coreMerryMage2018-01-125-62/+161
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* arm_unicorn: Load/release unicorn DLL.bunnei2018-01-041-0/+16
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* unicorn: Use for arm interface on Windows.bunnei2018-01-042-0/+240
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* arm_dynarmic: More cleanup.bunnei2018-01-041-6/+0
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* arm_dynarmic: Gut interface until dynarmic is ready for general use.bunnei2018-01-042-142/+44
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* arm: Remove SkyEye/Dyncom code that is ARMv6-only.bunnei2018-01-0328-14492/+6
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* logging: Rename category "Core_ARM11" to "Core_ARM".bunnei2017-10-237-86/+86
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* Merge remote-tracking branch 'upstream/master' into nxbunnei2017-10-107-86/+80
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | # Conflicts: # src/core/CMakeLists.txt # src/core/arm/dynarmic/arm_dynarmic.cpp # src/core/arm/dyncom/arm_dyncom.cpp # src/core/hle/kernel/process.cpp # src/core/hle/kernel/thread.cpp # src/core/hle/kernel/thread.h # src/core/hle/kernel/vm_manager.cpp # src/core/loader/3dsx.cpp # src/core/loader/elf.cpp # src/core/loader/ncch.cpp # src/core/memory.cpp # src/core/memory.h # src/core/memory_setup.h
| * Moved down_count to CoreTimingHuw Pascoe2017-09-305-28/+2
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| * ARM_Interface: Implement PageTableChangedMerryMage2017-09-255-6/+34
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| * Merge pull request #2842 from Subv/switchable_page_tableB3n302017-09-151-1/+3
| |\ | | | | | | Kernel/Memory: Give each process its own page table and allow switching the current page table upon reschedule
| | * CPU/Dynarmic: Disable the fast page-table access in dynarmic until it supports switching page tables at runtime.Subv2017-09-151-1/+3
| | |
| * | CPU/Dynarmic: Fixed a warning when incrementing the number of ticks in ExecuteInstructions.Subv2017-08-211-1/+1
| | |
| * | Dyncom: Use size_t instead of int to store the instruction offsets in the instruction cache.Subv2017-08-212-4/+4
| | | | | | | | | | | | Fixes a few warnings.
| * | Dyncom: Fixed a conversion warning when decoding thumb instructions.Subv2017-08-211-1/+1
| |/
* | arm_interface: Set TLS address for dynarmic core.bunnei2017-09-305-0/+32
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* | arm: Use 64-bit addressing in a bunch of places.bunnei2017-09-305-74/+107
|/
* Merge pull request #2692 from Subv/vfp_ftzSebastian Valle2017-05-222-0/+26
|\ | | | | Dyncom/VFP: Convert denormal outputs into 0 when the FTZ flag is enabled.
| * fixup! Dyncom/VFP: Convert denormal outputs into 0 when the FTZ flag is enabled.Subv2017-05-222-4/+0
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| * Dyncom/VFP: Convert denormal outputs into 0 when the FTZ flag is enabled.Subv2017-05-082-0/+30
| | | | | | | | Inputs are still not flushed to 0 if they are denormals.
* | Merge pull request #2694 from Subv/vfp_vsub_ftzMerry2017-05-221-2/+12
|\ \ | | | | | | Dyncom/VFP: Perform flush-to-zero on the second operand of vsub before sending it to vadd.
| * | Dyncom/VFP: Perform flush-to-zero on the second operand of vsub before sending it to vadd.Subv2017-05-141-2/+12
| |/ | | | | | | | | | | | | | | | | Previously we were letting vadd flush the value to positive 0, but there are cases where this behavior is wrong, for example, vsub: -0 - +0 = -0 vadd: -0 + +0 = +0 Now we'll flush the value to +0 inside vsub, and then negate it.
* | Merge pull request #2696 from Subv/vfp_revertYuri Kunde Schlesner2017-05-093-59/+30
|\ \ | | | | | | Dyncom/VFP: Revert edf30d8 and fix the FPSCR getting invalid values.
| * | Dyncom/VFP: Strip the VFP_NAN_FLAG sentinel value when setting vfp exceptions.Subv2017-05-092-2/+2
| | |
| * | Revert "Remove `exceptions` parameter from `normaliseround` VFP functions"Subv2017-05-093-57/+28
| |/ | | | | | | | | | | | | | | | | This reverts commit edf30d84cc0e8299d61c98f5bb40a6428d1576bc. Conflicts: src/core/arm/skyeye_common/vfp/vfp_helper.h src/core/arm/skyeye_common/vfp/vfpdouble.cpp src/core/arm/skyeye_common/vfp/vfpsingle.cpp
* | Dyncom: Remove disassembler codeYuri Kunde Schlesner2017-05-083-1587/+2
| | | | | | | | | | | | Had licensing issue around it, in addition to several bugs. Closes #1632, #1280
* | Dyncom: Tweak types and log formattingYuri Kunde Schlesner2017-05-083-8/+10
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* | Remove unused symbols codeYuri Kunde Schlesner2017-05-082-44/+0
|/
* dyncom: Correct SXTAB16 and SXTB16MerryMage2017-02-181-4/+4
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* arm_dynarmic: Update memory interfaceMerryMage2017-02-031-10/+10
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* arm_dynarmic: CP15 supportMerryMage2017-02-034-5/+128
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* Merge pull request #2366 from MerryMage/MemoryReadCodebunnei2016-12-221-0/+1
|\ | | | | arm_dynarmic: Provide MemoryReadCode callback
| * arm_dynarmic: Provide MemoryReadCode callbackMerryMage2016-12-221-0/+1
| | | | | | | | Change of interface in dynarmic 36082087ded632079b16d24137fdd0c450ce82ea
* | ThreadContext: Move from "core" to "arm_interface".bunnei2016-12-225-22/+21
|/
* gdbstub: Remove global variable from public interfaceLioncash2016-12-152-3/+3
| | | | | | | | | Currently, this is only ever queried, so adding a function to check if the server is enabled is more sensible. If directly modifying this externally is ever desirable, it should be done by adding a function to the interface, rather than exposing implementation details directly.
* core: Add missing #pragma once directives where applicableLioncash2016-12-151-0/+2
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* Core: Add a forgotten #include <cstring> for memcpy.Emmanuel Gil Peyrot2016-12-111-0/+1
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* dynarmic: Add ticks based on ticks executed, not ticks requestedMerryMage2016-11-261-2/+2
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* Expose page table to dynarmic for optimized reads and writes to the JITJames Rowe2016-11-251-0/+1
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* Use negative priorities to avoid special-casing the self-includeYuri Kunde Schlesner2016-09-2111-11/+11
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* Remove empty newlines in #include blocks.Emmanuel Gil Peyrot2016-09-2115-40/+18
| | | | | | | This makes clang-format useful on those. Also add a bunch of forgotten transitive includes, which otherwise prevented compilation.
* Manually tweak source formatting and then re-run clang-formatYuri Kunde Schlesner2016-09-196-16/+15
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* Sources: Run clang-format on everything.Emmanuel Gil Peyrot2016-09-1822-6274/+5726
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* Dyncom: Disable clang-format on the decoding table.Emmanuel Gil Peyrot2016-09-181-0/+3
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* arm_dynarmic: Implement GetVFPSystemReg/SetVFPSystemReg.bunnei2016-09-151-5/+12
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* arm: ResetContext shouldn't be part of ARM_Interface.bunnei2016-09-155-29/+0
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* arm_dynarmic/arm_dyncom: Remove unnecessary "virtual" keyword.bunnei2016-09-152-2/+2
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* dyncom: Use VFP_FPSCR/VFP_FPEXC.bunnei2016-09-151-4/+4
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* dynarmic: Implement ARM CPU interface.bunnei2016-09-152-0/+227
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* ARM: add ClearInstructionCache functionwwylele2016-08-273-0/+11
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* dyncom: Read-after-write in SMLAMerryMage2016-08-221-2/+4
| | | | | In the case when RD === RN, RD was updated before AddOverflow was called to check for an overflow, resulting in an incorrect state of the Q flag.
* Dyncom: Correct implementation of STM for R15MerryMage2016-08-141-3/+4
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* dyncom: Fix translation of thumb REVSHMerryMage2016-07-281-4/+13
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* Make arm_dyncom_trans* into a fully fledged compilation unitarchshift2016-06-123-53/+71
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* arm_dyncom_interpreter: slightly change AllocBuffer to be intuitivearchshift2016-06-121-15/+15
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* arm_dyncom_interpreter: Add specialized GetAddressingOpLoadStoreT funcarchshift2016-06-112-39/+19
| | | | | | This allows us to get the addressing operation for STRT, LDRT, STRBT, and LDRBT. We do this so that translation functions don't need to see the addressing ops directly.
* arm_dyncom_interpreter: rename operation functions to fit style guidearchshift2016-06-112-34/+34
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* arm_dyncom_interpreter: Rename anonymous enum to TransExtDataarchshift2016-06-114-166/+164
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* arm_dyncom_interpreter.cpp: #include translation info from inc filesarchshift2016-06-113-2648/+2652
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* Merge pull request #1568 from JayFoxRox/fix-printfMat M2016-05-273-26/+61
|\ | | | | Fix ftoi and disable VFPv3
| * Fix ftoi behaviourJannik Vogel2016-05-162-22/+53
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| * Respect fpscr in ftoizJannik Vogel2016-05-162-4/+4
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| * Disable VFP3 instructionsJannik Vogel2016-05-161-0/+4
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* | Remove `exceptions` parameter from `normaliseround` VFP functionsJannik Vogel2016-05-183-28/+57
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* | Fix exception propagation for VFP single precisionJannik Vogel2016-05-182-33/+38
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* | Fix exception propagation for VFP double precisionJannik Vogel2016-05-182-34/+39
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* | Fix read-after-write in SMUAD, SMLAD, SMUSD, SMLSDJannik Vogel2016-05-181-4/+8
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* | Set fpscr for new threadsJannik Vogel2016-05-171-0/+1
|/
* dyncom: Reset the context into user mode correctlyLioncash2016-05-091-1/+1
| | | | The other mode was system mode.
* Common: Remove section measurement from profiler (#1731)Yuri Kunde Schlesner2016-04-291-7/+0
| | | | This has been entirely superseded by MicroProfile. The rest of the code can go when a simpler frametime/FPS meter is added to the GUI.
* Fix BLX LR opcode interpretationmailwl2016-04-091-2/+3
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* Update cpsr (T)humb bit while creating threadmailwl2016-04-081-1/+1
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* Fix thumb ADR instruction alignmentmailwl2016-04-061-6/+2
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* Merge pull request #1643 from MerryMage/make_uniqueMathew Maidment2016-04-061-3/+2
|\ | | | | Common: Remove Common::make_unique, use std::make_unique
| * Common: Remove Common::make_unique, use std::make_uniqueMerryMage2016-04-051-3/+2
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* | Merge pull request #1618 from MerryMage/one-stepMathew Maidment2016-03-311-26/+57
|\ \ | | | | | | Prevent cache overflow when single stepping
| * | DynCom: Optimize single steppingMerryMage2016-03-301-26/+57
| |/
* / armstate: Correct FIQ register bankingLioncash2016-03-211-4/+3
|/ | | | FIQ has seven banked registers (R8 to R14), not two.
* ARM_Disasm::DisassembleMemHalf: actually use width in determining opcode namerob turner2016-01-191-9/+9
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* arm_dyncom_dec: Fix decoding of VMLSLioncash2015-12-302-206/+202
| | | | | | Previously, all VMLS variants would misdecode as CDP (which isn't necessarily wrong in itself, however VMLS has it's own label of execution)
* dyncom: Handle modifying the APSR via an MRC instructionLioncash2015-12-281-12/+9
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* dyncom: Remove PC dispatch from several instructionsLioncash2015-12-211-94/+0
| | | | These instructions aren't capable of using the PC as a destination
* dyncom: Handle unprivileged load/store variants correctlyLioncash2015-12-201-7/+33
| | | | | | | LDRT/LDRBT/STRBT/STRT should simulate the load or store as if the host CPU is in user mode. STRT is also allowed to use the PC as an operand
* dyncom: Remove static keyword from header functionsLioncash2015-12-063-19/+19
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* arm_interface: Make GetNumInstructions constLioncash2015-12-061-1/+1
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* arm_interface: directly initialize class membersLioncash2015-12-061-7/+2
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* dyncom: const correctness changesLioncash2015-12-063-7/+7
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* armstate: Zero out the registers on creationLioncash2015-11-291-11/+11
| | | | | std::array isn't always guaranteed to explicitly zero out it's contents without an initializer list.
* Merge pull request #1122 from polaris-/gdbstubbunnei2015-11-123-9/+68
|\ | | | | gdbstub implementation
| * Remove unnecessary new lines, changed Deinit to Shutdownpolaris-2015-10-121-1/+0
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| * Use BreakpointAddress struct instead of passing address directlypolaris-2015-10-041-3/+3
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| * Implement gdbstubpolaris-2015-10-043-9/+69
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* | CitraQt, SkyEye, Loader, VideoCore: Remove newlines in LOG_* calls.Emmanuel Gil Peyrot2015-10-093-45/+45
|/ | | | The LOG_* function itself already appends one.
* general: Silence some warnings when using clangLioncash2015-09-161-1/+0
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* General: Replace NULL and '0' usages with nullptr where applicableLioncash2015-09-113-30/+30
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* DynCom: Converted all 0xE condition code checks to ConditionCode::ALarchshift2015-09-062-132/+132
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* dyncom: Simplify some comparisons in CondPassedLioncash2015-08-261-4/+4
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* dyncom: Change return type of CondPassed to boolLioncash2015-08-261-57/+39
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* Integrate the MicroProfile profiling libraryYuri Kunde Schlesner2015-08-251-0/+7
| | | | | This brings goodies such as a configurable user interface and multi-threaded timeline view.
* Merge pull request #1025 from yuriks/heap-managementYuri Kunde Schlesner2015-08-222-2/+0
|\ | | | | Kernel: Correct(er) handling of Heap and Linear Heap allocations
| * Memory: Move address type conversion routines to memory.cpp/hYuri Kunde Schlesner2015-08-162-2/+0
| | | | | | | | | | These helpers aren't really part of the kernel, and mem_map.cpp/h is going to be moved there next.
* | vfp: use std::swap where applicableLioncash2015-08-162-12/+6
|/
* Merge pull request #1027 from lioncash/debuggerbunnei2015-08-144-1/+49
|\ | | | | debugger: Add the ability to view VFP register contents
| * arm_interface: Implement interface for retrieving VFP registersLioncash2015-08-074-1/+49
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* | ARM Core, Video Core, CitraQt, Citrace: Use CommonTypes types instead of the standard u?int*_t types.Emmanuel Gil Peyrot2015-08-114-305/+310
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* | arm_disasm: ARMv6 mul/div and abs media instructionsaroulin2015-08-112-1/+119
| | | | | | | | | | | | SMLAD, SMUAD, SMLSD, SMUSD, SMLALD, SMLSLD, SMMLA, SMMUL, SMMLS USAD8, USADA8
* | arm_disasm: ARMv6 parallel add/sub media instructionsaroulin2015-08-112-0/+167
| | | | | | | | {S, U, Q, UQ, SH, UH}{ADD16, ASX, SAX, SUB16, ADD8, SUB8}
* | arm_disasm: ARMv6 reversal media instructionsaroulin2015-08-092-0/+26
| | | | | | | | | | REV, REV16, REVSH Only their ARM encoding, Thumb encoding is still missing.
* | arm_disasm: ARMv6 saturation media instructionsaroulin2015-08-092-2/+55
| | | | | | | | SSAT, SSAT16, USAT, USAT16
* | arm_disasm: ARMv6 packing and sign-extend media instructionsaroulin2015-08-092-1/+181
| | | | | | | | | | | | PKH, SEL SXTAB, SXTAB16, SXTB, SXTB16, SXTH, SXTAH UXTAB, UXTAB16, UXTB, UXTB16, UXTH, UXTAH
* | Merge pull request #1026 from lioncash/disasmLioncash2015-08-071-12/+4
|\ \ | |/ |/| arm_disasm: Remove unnecessary code
| * arm_disasm: Remove unnecessary codeLioncash2015-08-071-12/+4
| | | | | | | | This part of disassembly only determines the opcode, there's no need for offset calculation here.
* | Disassembler: ARMv6K REX instructionsaroulin2015-08-062-6/+97
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* | Disassembler: ARMv6K hint instructionsaroulin2015-08-062-0/+56
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* | Merge pull request #1008 from lioncash/pcbunnei2015-07-302-21/+40
|\ \ | | | | | | dyncom: Handle the case where PC is the source register for STR/VSTM/VLDM
| * | dyncom: Handle the case where PC is the source register for STR/VSTM/VLDMLioncash2015-07-292-21/+40
| |/
* / dyncom: Remove an unused variableLioncash2015-07-291-3/+0
|/ | | | This was used prior to InterpreterTranslate existing.
* dyncom: Handle left-operand PC correctly for data-processing opsLioncash2015-07-291-7/+33
| | | | | | This is considered deprecated in the ARM manual (using PC as an operand), however, this is still able to be executed on the MPCore (which I'm quite sure would be rare to begin with).
* dyncom: Remove an unnecessary typedefLioncash2015-07-282-7/+5
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* dyncom: Use enum class for instruction decoding resultsLioncash2015-07-285-41/+40
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* dyncom: Remove code duplication regarding thumb instructionsLioncash2015-07-283-23/+12
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* dyncom: Migrate exclusive memory access control into armstateLioncash2015-07-282-50/+35
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* dyncom: Remove duplicated typedef and externLioncash2015-07-281-4/+0
| | | | These are already present in arm_dyncom_dec.h.
* dyncom: Use std::array for register arraysLioncash2015-07-262-28/+29
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* dyncom: Use ARMul_State as an objectLioncash2015-07-2611-1102/+1022
| | | | Gets rid of C-like parameter passing.
* dyncom: Remove unnecessary initialization code.Lioncash2015-07-264-59/+2
| | | | | | Targeting ARM version variants was only a thing on armemu. The reset routine also does basically the same thing as NewState.
* dyncom: Remove unnecessary abort-related cruftLioncash2015-07-262-48/+1
| | | | Both the MPCore and the ARM9 have the same data abort model (base restored), so differentiating isn't necessary.
* dyncom: Rename armdefs.h to armstate.hLioncash2015-07-2613-31/+31
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* dyncom: Get rid of skyeye typedefsLioncash2015-07-267-61/+55
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* dyncom: Move helper functions to their own headerLioncash2015-07-269-41/+56
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* dyncom: Move arminit.cpp and armsupp.cpp into skyeye_commonLioncash2015-07-262-0/+0
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* armdefs: Remove unnecessary extern keywordsLioncash2015-07-261-25/+25
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* dyncom: Pass SVC immediates directly.Lioncash2015-07-211-1/+2
| | | | Previously it would just re-read the already decoded instruction and extract the immediate value.
* dyncom: Properly retrieve the PC value in BX if used.Lioncash2015-07-201-3/+5
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* Dyncom: Support for a missing ARMv6 Thumb MOV encodingYuri Kunde Schlesner2015-07-181-10/+4
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* arm_dyncom_interpreter: Simplify assignment in SMLAWLioncash2015-07-171-1/+1
| | | | Also a side-benefit of not having implementation-defined behavior.
* Merge pull request #876 from linkmauve/include-cleanupsYuri Kunde Schlesner2015-07-114-4/+12
|\ | | | | Cleanup includes, mostly in common
| * Core, VideoCore: Replace or fix exit() calls.Emmanuel Gil Peyrot2015-06-282-4/+6
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| * Core: Cleanup core includes.Emmanuel Gil Peyrot2015-06-281-0/+5
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| * Common: Fix FileUtil includes, and everything relying on those.Emmanuel Gil Peyrot2015-06-281-0/+1
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* | vfp: Change return type of VFPInit from unsigned int to void.Lioncash2015-06-292-4/+2
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* | vfp: Handle accesses to FPINST/FPINST2 system registersLioncash2015-06-294-42/+53
|/ | | | Also has a side-benefit of correcting access to the FPEXC register.
* vfp: Handle accesses to the VFP media feature registersLioncash2015-06-133-4/+8
| | | | These are able to be accessed in any privilege mode.
* vfp: Implement VMOVBCR/VMOVBRCLioncash2015-06-122-5/+8
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* arm_dyncom_thumb: Fix handling of writeback for thumb LDMIALioncash2015-06-041-5/+19
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* arm_dyncom_thumb: Fix encoding of BKPT's immediateLioncash2015-06-011-1/+4
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* arm_dyncom_thumb: Implement CPS and SETENDLioncash2015-06-011-0/+13
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* arm_dyncom_thumb: Implement SXTH, SXTB, UXTH, and UXTB.Lioncash2015-06-011-0/+11
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* arm_dyncom_thumb: Implement REV, REV16, and REVSH.Lioncash2015-06-011-2/+12
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* Remove every trailing whitespace from the project (but externals).Emmanuel Gil Peyrot2015-05-296-24/+24
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* Merge pull request #826 from lioncash/tablesYuri Kunde Schlesner2015-05-271-22/+11
|\ | | | | arm_dyncom_thumb: Merge STR/LDR table subsets.
| * arm_dyncom_thumb: Merge STR/LDR table subsets.Lioncash2015-05-271-22/+11
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* | arm_dyncom_interpreter: Remove unused variableLioncash2015-05-261-5/+1
| | | | | | | | Thum decoding directly checks if the thumb bit is set instead of using a temporary.
* | arm_dyncom_interpreter: Remove unused macroLioncash2015-05-251-1/+0
|/
* dyncom: Get rid of armemu.hLioncash2015-05-244-49/+29
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* dyncom: Remove unused cpu parameter from decode_thumb_instrLioncash2015-05-231-3/+2
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* dyncom: remove load_r15 from arm_instLioncash2015-05-232-490/+331
| | | | It's entirely unused. Also allows getting rid of more clunky macros.
* dyncom: Remove unnecessary parameter for load/store operationsLioncash2015-05-231-39/+39
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* VFP: Log as trace to get rid of spamming.bunnei2015-05-231-23/+23
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* dyncom: Eliminate clang warningsLioncash2015-05-214-406/+404
| | | | Gets rid of a whole load of missing brace initialization warnings.
* Merge pull request #772 from lioncash/warnbunnei2015-05-182-6/+6
|\ | | | | core/video_core: Fix a few warnings when compiling on MSVC.
| * vfp: Get rid of warningsLioncash2015-05-142-6/+6
| | | | | | | | | | - Unary minus operator applied to unsigned type. - Unsafe use of bool.
* | Merge pull request #774 from lioncash/decodingsYuri Kunde Schlesner2015-05-152-33/+191
|\ \ | | | | | | dyncom: Add ARMv6K NOP and hint instructions to the interpreter.
| * | dyncom: Add ARMv6K NOP and hint instructions to the decoding tableLioncash2015-05-142-12/+152
| | |
| * | dyncom: Handle some MSR variants individuallyLioncash2015-05-142-24/+41
| | | | | | | | | | | | This is necessary, as hint instructions will be recognized as MSR, which is pretty bad.
| * | dyncom: Move exclusive load/stores above bbl and swi in the decoding tableLioncash2015-05-142-14/+15
| |/
* | Merge pull request #770 from lioncash/dyncom_cleanbunnei2015-05-152-275/+260
|\ \ | | | | | | dyncom: Minor cleanup.
| * | dyncom: Remove duplicate enums/prototypesLioncash2015-05-141-7/+1
| | | | | | | | | | | | These are already defined in arm_dyncom_interpreter_dec.cpp.
| * | dyncom: Remove unnecessary definesLioncash2015-05-141-4/+4
| | | | | | | | | | | | These can simply be const vars.
| * | dyncom: Make translation-unit functions and variables staticLioncash2015-05-141-66/+64
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| * | dyncom: Remove unnecessary typedefsLioncash2015-05-142-196/+197
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| * | dyncom: Remove unused structsLioncash2015-05-141-8/+0
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* / Memmap: Re-organize memory function in two filesYuri Kunde Schlesner2015-05-153-3/+2
|/ | | | | | | memory.cpp/h contains definitions related to acessing memory and configuring the address space mem_map.cpp/h contains higher-level definitions related to configuring the address space accoording to the kernel and allocating memory.
* dyncom: Removed irrelevant log.bunnei2015-05-141-2/+0
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* dyncom: Fix decoding of BKPT's immediateLioncash2015-05-131-1/+1
| | | | A shift here is intended since the representation is imm12:imm4
* Merge pull request #752 from lioncash/flushbunnei2015-05-123-84/+98
|\ | | | | vfp: Handle flush-to-zero mode.
| * vfp: Handle flush-to-zero mode.Lioncash2015-05-113-84/+98
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* | dyncom: Stub MCRR and MRRCLioncash2015-05-121-7/+68
|/ | | | | There's no other coprocessor outside the VFP (which has its own VMOV variants) in which the MPCore can send/retrieve data from. Stubbed so citra won't crash and burn on the odd chance someone actually tries to use these.
* Merge pull request #728 from lioncash/varsLioncash2015-05-081-19/+17
|\ | | | | dyncom: Remove an unnecessary variable in the interpreter
| * dyncom: Remove an unnecessary variable in the interpreterLioncash2015-05-081-19/+17
| | | | | | | | All this was doing was needlessly aliasing a variable.
* | Remove unnecessary dyncom header filesLioncash2015-05-085-80/+2
|/
* Common: Remove common.hYuri Kunde Schlesner2015-05-073-2/+2
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* Clean-up includesYuri Kunde Schlesner2015-05-072-0/+4
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* HLE: Clean up SVC dispatch mechanismYuri Kunde Schlesner2015-05-061-2/+2
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* Dyncom: Move cream cache to ARMul_State.bunnei2015-05-024-25/+18
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* dyncom: Remove more unused/unnecessary codeLioncash2015-04-204-92/+1
| | | | Gets rid of a sizeable amount of stuff in armdefs.
* dyncom: Remove unused/unnecessary VFP cruftLioncash2015-04-186-822/+15
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* Core_ARM11: Replace debug prints with our own logging functions in vfpsingle.Emmanuel Gil Peyrot2015-04-142-39/+36
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* Headers: Add some forgotten overrides, thanks clang!Emmanuel Gil Peyrot2015-04-141-1/+1
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* dyncom: Remove unnecessary enum and typedefLioncash2015-04-075-50/+30
| | | | Also fixes descriptions in the process.
* vfp: Make the FPSID values match the MPCoreLioncash2015-04-061-7/+7
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* vfp: Get rid of the VFP_OFFSET macroLioncash2015-04-065-64/+69
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* Merge pull request #685 from lioncash/cpregsbunnei2015-04-068-134/+212
|\ | | | | dyncom: Set the MPCore CP15 register reset values on initialization.
| * core: Migrate 3DS-specific CP15 register setting into InitLioncash2015-04-061-8/+0
| |
| * arm_interface: Support retrieval/storage to CP15 registersLioncash2015-04-063-0/+25
| |
| * Move CP15 enum definitions into their own enum.Lioncash2015-04-065-168/+163
| | | | | | | | Also gets rid of preprocessor mumbo-jumbo
| * dyncom: Properly return the value of the user RO thread registerLioncash2015-04-062-4/+10
| |
| * dyncom: Set CP15 reset values on initializationLioncash2015-04-061-0/+60
| |
* | dyncom: Suppress uninitialized variable warningsLioncash2015-04-061-4/+4
|/ | | | The switch cases will always be hit, but this makes compilers stop complaining.
* dyncom: Move CP15 register writing into its own function.Lioncash2015-04-024-88/+265
| | | | Also implements writing to the rest of the ARM11 MPCore CP15 register set.
* dyncom: Move CP15 register reading into its own function.Lioncash2015-04-024-49/+253
| | | | Keeps everything contained. Added all supported readable registers in an ARM11 MPCore.
* dyncom: Migrate InAPrivilegedMode to armsuppLioncash2015-03-263-4/+7
| | | | It's a generic helper function, so it should be here anyway.
* Merge pull request #674 from lioncash/sys-instrsbunnei2015-03-251-2/+62
|\ | | | | dyncom: Implement RFE and SRS.
| * dyncom: Implement SRSLioncash2015-03-241-1/+32
| |
| * dyncom: Implement RFELioncash2015-03-241-1/+30
| |
* | dyncom: Remove unused/unnecessary macros and macro constantsLioncash2015-03-242-39/+2
|/
* armmmu: Remove unnecessary enum valuesLioncash2015-03-211-30/+20
| | | | We don't need to care about XScale or Intel specific ARM stuff.
* Merge pull request #659 from lioncash/setendbunnei2015-03-205-83/+233
|\ | | | | Implement SETEND.
| * dyncom: Make Load/Store instructions support big endianLioncash2015-03-175-82/+198
| |
| * dyncom: Implement SETENDLioncash2015-03-151-1/+35
| |
* | arm_interface: Get rid of GetTicks.Lioncash2015-03-163-12/+0
|/ | | | Removes a TODO.
* dyncom: Minor cleanupLioncash2015-03-101-26/+7
| | | | Assemblers will exit with an error when trying to assemble instructions with disallowed registers.
* dyncom: Fix an indexing bug in STMLioncash2015-03-091-5/+4
| | | | Previously it would write the contents of register 13 for the case where the link register (r14) is supposed to be written.
* dyncom: General cleanup of STMLioncash2015-03-091-16/+14
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* dyncom: Increment addr when accessing LR in LDMLioncash2015-03-091-0/+2
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* Merge pull request #538 from yuriks/perf-statTony Wasserka2015-03-071-0/+8
|\ | | | | Add profiling infrastructure and widget
| * Add profiling infrastructure and widgetYuri Kunde Schlesner2015-03-021-0/+8
| |
* | vfp: Get rid of warningsLioncash2015-03-042-4/+4
|/
* Merge pull request #620 from lioncash/bkptbunnei2015-02-281-2/+3
|\ | | | | arm_disasm: Show conditional code for BKPT instructions.
| * arm_disasm: Show conditional code for BKPT instructions.Lioncash2015-02-281-2/+3
| | | | | | | | Changed cond_to_str to take a uint32, since unsigned numbers are only ever passed to it, and this can be a source of warnings for some compilers (also indexing an array without bounds checking a signed number is kind of iffy).
* | arm_disasm: Remove unused variableLioncash2015-02-281-2/+1
|/ | | | Also declared an array as static, as it's only used in this translation unit.
* arm: The CP15 Main ID register is not writeableLioncash2015-02-261-3/+1
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* arm: Remove unnecessary booleansLioncash2015-02-252-22/+5
| | | | We don't care about any of these.
* Cleaned up unaligned access.Kevin Hartman2015-02-221-17/+2
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* Merge pull request #582 from lioncash/warningsbunnei2015-02-181-4/+4
|\ | | | | vfpinstr: Fix trivial signed/unsigned mismatch warnings
| * vfpinstr: Fix trivial signed/unsigned mismatch warningsLioncash2015-02-181-4/+4
| |
* | Merge pull request #579 from lioncash/bkptbunnei2015-02-182-2/+28
|\ \ | |/ |/| dyncom: Support conditional BKPT instructions
| * dyncom: Support conditional BKPT instructionsLioncash2015-02-172-2/+28
| |
* | Merge pull request #574 from lioncash/warnbunnei2015-02-161-2/+2
|\ \ | |/ |/| vfpdouble: Use %p for printing pointer addresses.
| * vfpdouble: Use %p for printing pointer addresses.Lioncash2015-02-151-2/+2
| |
* | dyncom: Actually set the destination register for USAD8/USADA8.Lioncash2015-02-161-0/+1
|/ | | | Idiotville: Population: 1 - Inhabitant name: Lioncash
* arm: Set the A bit on reset.Lioncash2015-02-151-1/+1
| | | | This enum value is ORed against in ARMul_Reset (and used to refer to all interrupt bits in the CPSR). So simply updating this is enough.
* core: Apply static to local functionsLioncash2015-02-135-221/+227
|
* arm: General cleanupLioncash2015-02-1313-227/+116
| | | | | | | - Remove several typedefs for ARMul_State. - Remove unused functions - Remove unused/unnecessary headers - Removed unused enums, etc.
* dyncom: Switch the app and system cores into the correct mode at initializationLioncash2015-02-134-12/+17
|
* dyncom: Clean up the constructorLioncash2015-02-133-16/+7
| | | | Some function calls aren't necessary and would be handled by regular initialization routines.
* dyncom: Remove warning for SXTAHLioncash2015-02-131-1/+0
| | | | This is tested to work correctly.
* arm: Remove ARMul_EmulateInitLioncash2015-02-124-55/+1
| | | | This was only used for armemu, which has since been removed. Removed components related to this as well.
* armdefs: Remove unnecessary extern CLioncash2015-02-121-6/+0
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* arm: Remove ARM26 support.Lioncash2015-02-112-45/+4
| | | | This will never be used. 32-bit is the norm.
* Merge pull request #559 from lioncash/cleanbunnei2015-02-114-24/+40
|\ | | | | arm: Some cleanup. Also fixed the initial ARM mode that is emulated.
| * arm: Get rid of some magic constants. Specify proper ARM mode.Lioncash2015-02-113-3/+10
| | | | | | | | Initially, we were starting the emulator in USER26MODE, which is incorrect, this should be USER32MODE.
| * arm: Change some more constants into enumsLioncash2015-02-112-21/+30
| |
* | Asserts: break/crash program, fit to style guide; log.h->assert.harchshift2015-02-112-1/+2
| | | | | | | | | | | | | | Involves making asserts use printf instead of the log functions (log functions are asynchronous and, as such, the log won't be printed in time) As such, the log type argument was removed (printf obviously can't use it, and it's made obsolete by the file and line printing) Also removed some GEKKO cruft.
* | Merge pull request #556 from lioncash/cleanbunnei2015-02-114-28/+19
|\| | | | | arm: Remove TRUE/FALSE defines
| * arm: Remove TRUE/FALSE definesLioncash2015-02-104-28/+19
| | | | | | | | | | - Removed the Debug parameter from ARMul_State since it isn't used. - Changed ARMul_CoProInit to a void function. It always returned true.
* | arm_dyncom_thumb: Make lookup tables staticLioncash2015-02-101-7/+7
|/ | | | These don't need to be recreated all the time.
* Merge pull request #553 from lioncash/denormbunnei2015-02-102-0/+6
|\ | | | | vfp: Normalize accumulator for multiply accumulate instructions
| * vfp: Normalize accumulator for multiply accumulate instructionsLioncash2015-02-102-0/+6
| |
* | dyncom: Add more regs to MCR/MRCLioncash2015-02-102-18/+35
|/ | | | Adds the registers that were left out of some coprocessor ranges.
* Scheduler refactor Pt. 1Kevin Hartman2015-02-103-56/+20
| | | | | | | | | | | | | * Simplifies scheduling logic, specifically regarding thread status. It should be much clearer which statuses are valid for a thread at any given point in the system. * Removes dead code from thread.cpp. * Moves the implementation of resetting a ThreadContext to the corresponding core's implementation. Other changes: * Fixed comments in arm interfaces. * Updated comments in thread.cpp * Removed confusing, useless, functions like MakeReady() and ChangeStatus() from thread.cpp. * Removed stack_size from Thread. In the CTR kernel, the thread's stack would be allocated before thread creation.
* vfpdouble: Fix the FTOUI NaN sign settingLioncash2015-02-091-1/+1
| | | | This was fixed for vfpsingle, but not vfpdouble
* Throw more unused/unnecessary VFP code outLioncash2015-02-093-215/+1
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* vfp_helper: Convert some flags to enums. Throw out more duplicated FPSCR stuffLioncash2015-02-094-192/+153
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* vfp_helper: Normalize tabs to spacesLioncash2015-02-091-172/+170
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* vfp_helper: Remove unnecessary extern C blocksLioncash2015-02-061-17/+1
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* vfp: Move FPSID, FPEXC, and FPSCR values over to enums.Lioncash2015-02-063-150/+104
| | | | Also got rid of duplicate definitions of some of these values.
* Merge pull request #537 from lioncash/vfpbunnei2015-02-041-6/+6
|\ | | | | vfp: Fix VCVT
| * vfp: Fix VCVTLioncash2015-02-041-6/+6
| | | | | | | | | | These variants exclusively read from the single precision regs and write to double-precision registers Fixes issues where converted values would be way off from what they should be due to the results being stored in the wrong registers.
* | Merge pull request #536 from lioncash/deadbunnei2015-02-042-1765/+0
|\ \ | |/ |/| vfp: Throw out unused code
| * vfp: Throw out unused codeLioncash2015-02-042-1765/+0
| |
* | dyncom: Remove more unnecessary codeLioncash2015-02-031-45/+3
|/
* core: Fix some warnings on OSXLioncash2015-02-031-2/+4
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* Merge pull request #525 from lioncash/armwarnbunnei2015-02-012-6/+3
|\ | | | | vfp: Get rid of some compile warnings
| * vfp: Get rid of some compile warningsLioncash2015-02-012-6/+3
| |
* | arm: Clean up ARMul_StateLioncash2015-02-013-136/+83
|/ | | | Remove unnecessary/unused struct variables.
* arm: Adios armemuLioncash2015-02-0112-8576/+164
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* dyncom: clean up arm_dyncom_dec.hLioncash2015-01-301-43/+2
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* arm: Move headers over to pragma onceLioncash2015-01-307-31/+11
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* arm: Get rid of armcpu.h and skyeye_types.hLioncash2015-01-305-113/+0
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* arm: Clean out armos.h and armmmu.hLioncash2015-01-302-181/+23
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* arm: Throw out a lot of unnecessary codeLioncash2015-01-306-1536/+56
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* armdefs: Move some defines over to enumsLioncash2015-01-301-131/+112
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* dyncom: Minor cleanupLioncash2015-01-271-126/+137
| | | | Narrow scopes for the instruction variables. Remove unnecessary parentheses.
* Update vfp.cppbunnei2015-01-271-1/+1
| | | VFP: Changed a debug log to trace.
* Merge pull request #410 from chinhodado/cleanupbunnei2015-01-245-483/+157
|\ | | | | Cleanup: Logging in Core
| * Cleanup: Logging in CoreChin2015-01-195-483/+157
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* | vfp: Clean up vertical alignment for instructionsLioncash2015-01-231-131/+125
| |
* | dyncom: Minor cleanupLioncash2015-01-221-282/+270
| | | | | | | | Removes some unused macros and cleans up indentation inconsistencies
* | dyncom: Clarify precedence for ternary statementsLioncash2015-01-203-3/+3
| |
* | dyncom: Implement missing shifts in ScaledRegisterPostIndexed, etcLioncash2015-01-191-7/+33
|/
* dyncom: Handle the ARM A2 encoding of STRT/LDRTLioncash2015-01-171-10/+24
| | | | These were also missing the shifted register case.
* dyncom: Handle the ARM A2 encoding of LDRBT/STRBT.Lioncash2015-01-171-17/+15
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* vfp: Remove dead codeLioncash2015-01-121-50/+14
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* dyncom: Fix 32-bit ASR shifts for immediatesLioncash2015-01-121-5/+3
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* dyncom: Remove unused flag macrosLioncash2015-01-121-15/+3
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* dyncom: Get rid of unnecessary outer-scope variables in InterpreterMainLoopLioncash2015-01-121-97/+108
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* dyncom: Fix overflow flag setting for ADD/RSB/RSC/SUB/SBCLioncash2015-01-121-38/+41
| | | | Also cleans up CMN, and CMP.
* dyncom: Add a helper function for addition with a carryLioncash2015-01-123-12/+26
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* dyncom: Fix ADC overflow flag settingLioncash2015-01-121-8/+12
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* dyncom: Fix conditional execution of MSRLioncash2015-01-121-29/+31
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* Move ThreadContext to core/core.h and deal with the falloutYuri Kunde Schlesner2015-01-095-11/+16
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* DynCom: Add a comment to GetTicks.Subv2015-01-091-0/+1
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* Timing: Use CoreTiming::GetTicks to keep track of ticks.Subv2015-01-092-6/+2
| | | | This will keep track of idle ticks for us, and fixes some tickcount-related issues
* dyncom: Fix UMAALLioncash2015-01-081-4/+4
| | | | These need to be done as a 64-bit operation.
* Merge pull request #442 from lioncash/smulbunnei2015-01-071-10/+7
|\ | | | | dyncom: Fix SMULWB/SMULWT
| * dyncom: Fix SMULWB/SMULWTLioncash2015-01-071-10/+7
| | | | | | | | Wasn't doing proper sign-extension
* | Merge pull request #425 from Subv/coretimingbunnei2015-01-072-1/+9
|\ \ | |/ |/| Ported the CoreTiming namespace from PPSSPP
| * CoreTiming: Ported the CoreTiming namespace from PPSSPPSubv2015-01-072-1/+9
| | | | | | | | | | | | Implemented the required calls to make it work. CoreTiming: Added a new logging class Core_Timing.
* | Merge pull request #438 from lioncash/swpbunnei2015-01-071-0/+1
|\ \ | | | | | | dyncom: Fix SWPB
| * | dyncom: Fix SWPBLioncash2015-01-071-0/+1
| | |
* | | dyncom: Move over SMLALXYLioncash2015-01-071-1/+56
|/ /
* | Merge pull request #417 from kevinhartman/exclusive-tag-fixbunnei2015-01-062-16/+18
|\ \ | |/ |/| Added exclusive reservation granule from ARMv7 spec to dyncom...
| * Added exclusive reservation granule from ARMv7 spec to dyncom to protect LDR/STREX.Kevin Hartman2015-01-062-16/+18
| |
* | dyncom: Partially emulate BXJLioncash2015-01-051-8/+25
| | | | | | | | Just in case some game studio let the intern write inline assembly or something.
* | dyncom: Actually set the Q flag for SMLABB/SMLABT/SMLATB/SMLATTLioncash2015-01-051-1/+2
| | | | | | | | Easy skyeye todo fix.
* | Merge pull request #418 from lioncash/qdbunnei2015-01-054-25/+117
|\ \ | | | | | | dyncom: Implement QADD/QSUB/QDADD/QDSUB
| * | dyncom: Implement QADD/QSUB/QDADD/QDSUBLioncash2015-01-054-25/+117
| | |
* | | skyeye: Remove duplicate typedefsLioncash2015-01-044-41/+17
|/ / | | | | | | citra already has its own typedefs like this.
* | Merge pull request #398 from lioncash/smbunnei2015-01-031-1/+43
|\ \ | |/ |/| dyncom: Implement SMLAW
| * dyncom: Implement SMLAWLioncash2015-01-031-1/+43
| |
* | VFP: Minor cleanup, functionally the same.bunnei2015-01-031-2587/+2476
|/
* Merge pull request #395 from lioncash/revbunnei2015-01-031-45/+45
|\ | | | | dyncom: Implement REVSH
| * dyncom: Implement REVSHLioncash2015-01-031-45/+45
| | | | | | | | Also joins the REV ops into one common place.
* | dyncom: Implement SMLALD/SMLSLDLioncash2015-01-031-3/+72
|/
* Merge pull request #392 from lioncash/smbunnei2015-01-031-3/+64
|\ | | | | dyncom: Implement SMMLA/SMMUL/SMMLS
| * dyncom: Implement SMMLA/SMMUL/SMMLSLioncash2015-01-031-3/+64
| |
* | dyncom: Implemented LDREXD/STREXD/LDREXH/STREXHbunnei2015-01-033-227/+282
|/
* Merge pull request #390 from lioncash/wutbunnei2015-01-031-27/+0
|\ | | | | dyncom: Remove dead function InterpreterInitInstLength
| * dyncom: Remove dead function InterpreterInitInstLengthLioncash2015-01-031-27/+0
| | | | | | | | Technically eliminates two memory leaks as well.
* | armemu: Fix missing Q flag check for SMLSD.Lioncash2015-01-031-2/+6
| |
* | dyncom: Implement SMLAD/SMUAD/SMLSD/SMUSDLioncash2015-01-035-50/+84
|/
* dyncom: Implement SXTAB16 and SXTB16Lioncash2015-01-021-3/+58
|
* Merge pull request #379 from lioncash/shbunnei2015-01-021-8/+110
|\ | | | | dyncom: Implement SHADD8/SHADD16/SHSUB8/SHSUB16/SHASX/SHSAX
| * dyncom: Implement SHADD8/SHADD16/SHSUB8/SHSUB16/SHASX/SHSAXLioncash2015-01-011-8/+110
| |
* | Fix SADD8/SSUB8 in the armemuLioncash2015-01-011-50/+28
| |
* | dyncom: Implement SADD8/SSUB8Lioncash2015-01-011-55/+108
|/
* Merge pull request #375 from lioncash/uopsbunnei2014-12-311-9/+208
|\ | | | | dyncom: Implement UADD8/UADD16/USUB8/USUB16/UASX/USAX
| * dyncom: Implement UADD8/UADD16/USUB8/USUB16/UASX/USAXLioncash2014-12-311-9/+208
| |
* | dyncom: Massive refactorbunnei2014-12-312-654/+221
| |
* | Merge pull request #369 from darkf/mingw_bunnei2014-12-311-0/+8
|\ \ | | | | | | Fix MinGW build (2)
| * \ Fix merge conflictsdarkf2014-12-3022-9156/+8501
| |\ \
| * | | Add comment regarding __WIN32__ in SkyEye codedarkf2014-11-291-0/+4
| | | |
| * | | Fix MinGW builddarkf2014-11-291-0/+4
| | | |
* | | | vfp: Get rid of a few warningsLioncash2014-12-302-2/+2
| |_|/ |/| |
* | | vfp: Implement VMOVBRRSSLioncash2014-12-303-12/+44
| | |
* | | dyncom: Implement USAT16/SSAT16Lioncash2014-12-301-2/+61
| |/ |/|
* | dyncom: Implement USAT/SSATbunnei2014-12-303-2/+131
| |
* | dyncom: Various cleanups to match coding style, no functional changes.bunnei2014-12-305-7087/+5962
| |
* | Merge pull request #361 from lioncash/moreqopsbunnei2014-12-294-65/+142
|\ \ | | | | | | dyncom/armemu: Implement QADD8/QSUB8.
| * | dyncom: Implement QADD8/QSUB8Lioncash2014-12-291-32/+42
| | |
| * | armemu: Implement QADD8/QSUB8Lioncash2014-12-293-33/+100
| | |
* | | dyncom: Fix SMLALXY's instruction labelsLioncash2014-12-291-2/+2
|/ / | | | | | | They were erroneously labeled as SMLAL.
* | dyncom: Implement UXTB16/UXTAB16Lioncash2014-12-291-2/+55
| |
* | Merge pull request #355 from lioncash/simpbunnei2014-12-291-225/+142
|\ \ | | | | | | armemu: Simplify some instructions.
| * | armemu: Simplify SSAT/SSAT16/SXTB/SXTABLioncash2014-12-281-71/+48
| | |
| * | armemu: Simplify REV/REV16/SXTH/SXTAHLioncash2014-12-281-38/+26
| | |
| * | armemu: Simplify USAT16/UXTB/UXTABLioncash2014-12-281-65/+42
| | |
| * | armemu: Simplify REVSH/UXTH/UXTAHLioncash2014-12-281-48/+23
| | |
* | | vfp: Actually make the code somewhat readableLioncash2014-12-295-1664/+1053
| | |
* | | dyncom: Implement PKHBT and PKHTB.bunnei2014-12-281-2/+57
| | |
* | | armemu: Fix PKHTB to do an arithmetic shift and correctly decode immediate field.bunnei2014-12-281-13/+5
| | |
* | | dyncom: Implement USAD8/USADA8Lioncash2014-12-283-3/+53
| | |
* | | Merge pull request #354 from lioncash/usaduflowbunnei2014-12-283-4/+14
|\ \ \ | |/ / |/| | armemu: Fix underflows in USAD8/USADA8
| * | armemu: Fix underflows in USAD8/USADA8Lioncash2014-12-283-4/+14
| | | | | | | | | | | | Initially reported by xdec.
* | | dyncom: Implement UQADD8, UQADD16, UQSUB8, UQSUB16, UQASX, and UQSAX.Lioncash2014-12-273-12/+102
| | |
* | | armemu: Implement UQADD8, UQADD16, UQSUB16, UQASX, and UQSAXLioncash2014-12-273-19/+93
|/ /
* | dyncom: Implement UHADD8, UHADD16, UHSUB8, UHSUB16, UHASX, and UHSAXLioncash2014-12-271-11/+123
| |
* | armemu: Implement UHADD8, UHADD16, UHSUB8, UHSUB16, UHASX, and UHSAXLioncash2014-12-271-2/+73
| |
* | Merge pull request #339 from bunnei/fixup-gsp-synchbunnei2014-12-265-95/+31
|\ \ | | | | | | Fixup gsp synch
| * | ARM: Add a mechanism for faking CPU time elapsed during HLE.bunnei2014-12-265-95/+31
| | | | | | | | | | | | - Also a few cleanups.
* | | Merge pull request #343 from lioncash/smmlabunnei2014-12-261-2/+30
|\ \ \ | | | | | | | | armemu: Implement SMMUL, SMMLA, and SMMLS.
| * | | armemu: Implement SMMUL, SMMLA, and SMMLS.Lioncash2014-12-251-2/+30
| |/ /
* | | Merge pull request #341 from lioncash/moresmopsbunnei2014-12-261-2/+33
|\ \ \ | | | | | | | | armemu: Implement SMLALD/SMLSLD
| * | | armemu: Implement SMLALD/SMLSLDLioncash2014-12-241-2/+33
| |/ /
* / / armemu: Fix GE/Q flag setting semanticsLioncash2014-12-241-62/+56
|/ /
* | armemu: Set the Q flag correctly for much of the other opsLioncash2014-12-231-8/+8
| | | | | | | | They were setting the old S flag.
* | armemu: Set the Q flag properly for SMLAD/SMUADLioncash2014-12-233-13/+28
| |
* | Merge pull request #334 from lioncash/cpsrbunnei2014-12-231-1/+1
|\ \ | | | | | | armemu: Fix retrieval of the CPSR in MRS instructions.
| * | armemu: Fix retrieval of the CPSR in MRS instructions.Lioncash2014-12-231-1/+1
| | |
* | | Merge pull request #335 from lioncash/cpsrcreatebunnei2014-12-234-25/+78
|\ \ \ | | | | | | | | armemu: Emulate the GE and Q flags.
| * | | armemu: Properly set the Q flag for SSAT16/USAT16 upon saturation.Lioncash2014-12-231-9/+23
| | | |
| * | | armemu: Fix SELLioncash2014-12-231-1/+1
| | | | | | | | | | | | | | | | Needs to use the updated state of the CPSR.
| * | | armemu: Fix construction of the CPSRLioncash2014-12-234-15/+54
| |/ /
* / / dyncom: Move over QADD16/QASX/QSAX/QSUB16Lioncash2014-12-221-7/+87
|/ /
* | Merge pull request #322 from chinhodado/masterbunnei2014-12-223-9/+6
|\ \ | | | | | | More warning cleanups
| * | More warning cleanupsChin2014-12-213-9/+6
| | |
* | | dyncom: Move SEL overLioncash2014-12-221-1/+58
| | |
* | | Merge pull request #324 from lioncash/dyncbunnei2014-12-221-7/+102
|\ \ \ | | | | | | | | dyncom: Move over SASX/SSAX/SADD16/SSUB16
| * | | dyncom: Move over SASX/SSAX/SADD16/SSUB16Lioncash2014-12-221-7/+102
| | | |
* | | | Merge pull request #291 from purpasmart96/licensebunnei2014-12-218-8/+8
|\ \ \ \ | |/ / / |/| | | License change
| * | | License changepurpasmart962014-12-218-8/+8
| | | |
* | | | armemu: Implement SADD8/SSUB8Lioncash2014-12-211-14/+87
| |/ / |/| |
* | | Merge pull request #296 from lioncash/dynbunnei2014-12-201-1/+47
|\ \ \ | | | | | | | | dyncom: Implement UMAAL
| * | | dyncom: Implement UMAALLioncash2014-12-191-1/+47
| |/ /
* | | Merge pull request #310 from lioncash/ssat16bunnei2014-12-201-14/+20
|\ \ \ | | | | | | | | armemu: Fix SSAT16.
| * | | armemu: Fix SSAT16Lioncash2014-12-191-1/+1
| | | | | | | | | | | | | | | | The lower-bound would never be negative like it should
| * | | armemu: Clean up naming and formatting for SSAT16Lioncash2014-12-191-14/+20
| |/ /
* | | armemu: Should be using labs for USAD8/USADA8Lioncash2014-12-201-4/+4
| | |
* | | Merge pull request #311 from lioncash/usadabunnei2014-12-201-1/+24
|\ \ \ | | | | | | | | armemu: Implement USAD8 and USADA8
| * | | armemu: Implement USAD8 and USADA8Lioncash2014-12-191-1/+24
| | | |
* | | | Merge pull request #313 from lioncash/smlsdbunnei2014-12-201-6/+10
|\ \ \ \ | | | | | | | | | | armemu: Implement SMLSD
| * | | | armemu: Implement SMLSDLioncash2014-12-191-6/+10
| | |/ / | |/| |
* | | | Merge pull request #314 from lioncash/qsax-qasxbunnei2014-12-201-7/+20
|\ \ \ \ | | | | | | | | | | armemu: Implement QASX and QSAX
| * | | | armemu: Implement QASX and QSAXLioncash2014-12-191-7/+20
| |/ / /
* | | | Merge pull request #294 from lioncash/varbunnei2014-12-191-12/+9
|\ \ \ \ | | | | | | | | | | armemu: Narrow the scope of some variables in handle_v6_insn
| * | | | armemu: Narrow the scope of some variables in handle_v6_insnLioncash2014-12-171-12/+9
| | | | | | | | | | | | | | | | | | | | There's no reason to have these in the outer-most scope.
* | | | | Merge pull request #305 from lioncash/parenbunnei2014-12-191-4/+4
|\ \ \ \ \ | |_|/ / / |/| | | | armemu: Get rid of bitwise parenthesis warnings
| * | | | armemu: Get rid of bitwise parenthesis warningsLioncash2014-12-181-4/+4
| | |/ / | |/| |
* | | | Merge pull request #304 from lioncash/sflagsbunnei2014-12-181-4/+29
|\ \ \ \ | | | | | | | | | | armemu: Set GE flags properly for SSUB16, SADD16, SSAX, and SASX.
| * | | | armemu: Set GE flags correctly for SSUB16, SADD16, SSAX, and SASX.Lioncash2014-12-181-4/+29
| |/ / /
* | | | armemu: Fix lower-bounds clamping for USAT16Lioncash2014-12-181-1/+6
| | | |
* | | | armemu: More concise names for USAT16-related variablesLioncash2014-12-181-11/+15
|/ / /
* | | Merge pull request #299 from lioncash/joinbunnei2014-12-181-34/+23
|\ \ \ | | | | | | | | Combine SSUB16, SADD16, SASX, and SSAX.
| * | | armemu: Combine SSUB16, SADD16, SASX, and SSAX.Lioncash2014-12-181-34/+23
| | | |
* | | | Merge pull request #298 from lioncash/flagsbunnei2014-12-181-4/+22
|\ \ \ \ | | | | | | | | | | armemu: Unset GE flags for UADD8 if results are < 0x100
| * | | | armemu: Unset GE flags for UADD8 if results are < 0x100Lioncash2014-12-171-4/+22
| | | | | | | | | | | | | | | | | | | | Reference manual states these must be set to zero if this case is true.
* | | | | Merge pull request #295 from lioncash/umaalbunnei2014-12-181-3/+25
|\ \ \ \ \ | |_|/ / / |/| | | | armemu: Implement UMAAL
| * | | | armemu: Implement UMAALLioncash2014-12-171-3/+25
| | |/ / | |/| |
* | | | Merge pull request #292 from lioncash/backportsbunnei2014-12-181-19/+30
|\ \ \ \ | | | | | | | | | | Backport more skyeye fixes from 3dmoo
| * | | | armemu: Fix PKHTBNormmatt2014-12-171-6/+12
| | | | |
| * | | | armemu: Implement REVSHNormmatt2014-12-171-5/+9
| | | | |
| * | | | armemu: Fix UXTAB/UXTAHNormmatt2014-12-171-4/+4
| | | | |
| * | | | armemu: Fix SXTABNormmatt2014-12-171-2/+2
| | | | |
| * | | | armemu: Fix SXTAHNormmatt2014-12-171-2/+3
| |/ / /
* | / / armemu: Fix SSUB16Lioncash2014-12-171-8/+8
| |/ / |/| | | | | | | | | | | | | | | | | Broken from the same reason SADD16 was. The lo part of the result should only be constructed from the lo halfwords of rm and rn. The hi part of the result should only be constructed from the hi halfwords of rm and rn.
* | | Merge pull request #293 from lioncash/sopsbunnei2014-12-171-8/+9
|\ \ \ | | | | | | | | armemu: Fix SADD16
| * | | armemu: Fix SADD16Lioncash2014-12-171-8/+9
| |/ / | | | | | | | | | The lo and hi parts of the result were being constructed as a result of hi and lo halfword intermixing from the rm and rn regs. However the lo part of the result should be constructed only from the lo halfwords of rm and rn, and the hi part of the result should only be constructed from the hi halfwords of rm and rn.
* | | Merge pull request #287 from lioncash/qaddsub16bunnei2014-12-171-33/+37
|\ \ \ | |/ / |/| | armemu: Join QADD16/QSUB16 and fix saturation clamping.
| * | armemu: Fix lower-bound signed saturation clamping for QADD16/QSUB16.Lioncash2014-12-161-2/+2
| | |
| * | armemu: Join QADD16 and QSUB16 together.Lioncash2014-12-161-33/+37
| | | | | | | | | | | | The only difference between these ops is one adds and one subtracts. Everything is literally the same.
* | | Merge pull request #289 from lioncash/smopsbunnei2014-12-171-38/+35
|\ \ \ | | | | | | | | Join SMUAD, SMUSD, and SMLAD ops. Also fix them as well.
| * | | armemu: Fix SMUAD, SMUSD, and SMLADLioncash2014-12-161-3/+3
| | | | | | | | | | | | | | | | Wrong values were being multiplied together.
| * | | armemu: Join SMUAD, SMUSD, and SMLADLioncash2014-12-161-38/+35
| |/ /
* | | Merge pull request #290 from lioncash/vsubbunnei2014-12-171-2/+5
|\ \ \ | | | | | | | | armemu: Backport some VFP fixes from 3dmoo.
| * | | armemu: Fix FTOUI NaN sign.Normmatt2014-12-161-1/+1
| | | |
| * | | armemu: Fix FSUBS bug where NaN shouldn't be negatedNormmatt2014-12-161-1/+4
| |/ /
* / / armemu: Implement UXTAB16Lioncash2014-12-161-10/+25
|/ /
* | armemu: Fix UXTB16Lioncash2014-12-151-12/+12
| | | | | | | | Rotation bits are 10 and 11, not 9 and 10.
* | Merge pull request #276 from lioncash/decrappifybunnei2014-12-151-306/+169
|\ \ | | | | | | Clean up armdefs.h a little.
| * | Clean up armdefs.hLioncash2014-12-141-306/+169
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* | | ARM: Pull some SkyEye fixes from 3dmoo.bunnei2014-12-153-419/+485
|/ /
* | Convert old logging calls to new logging macrosYuri Kunde Schlesner2014-12-135-109/+109
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* | armemu: Fix SSAXLioncash2014-12-081-1/+1
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* | armemu: Fix SASXLioncash2014-12-081-1/+1
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* | armemu: Fix parenthesis warnings regarding bitwise opsLioncash2014-12-081-4/+4
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* | Merge pull request #235 from yuriks/dyncom-mapbunnei2014-11-301-33/+15
|\ \ | | | | | | dyncom: Use unordered_map rather than the terrible 2-level bb_map
| * | dyncom: Use unordered_map rather than the terrible 2-level bb_mapYuri Kunde Schlesner2014-11-291-33/+15
| |/ | | | | | | | | | | Seems (probably just placebo/wishful thinking) to make it slightly faster. Also reduces memory usage and makes shutdown when debugging from MSVC fast.
* / arm_dyncom_interpreter: Get rid of unused var warningsLioncash2014-11-291-4/+2
|/
* Remove unused includes to common/thread.hEmmanuel Gil Peyrot2014-11-251-2/+0
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* HLE: Revamp error handling throrough the HLE codeYuri Kunde Schlesner2014-11-241-16/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | All service calls in the CTR OS return result codes indicating the success or failure of the call. Previous to this commit, Citra's HLE emulation of services and the kernel universally either ignored errors or returned dummy -1 error codes. This commit makes an initial effort to provide an infrastructure for error reporting and propagation which can be use going forward to make HLE calls accurately return errors as the original system. A few parts of the code have been updated to use the new system where applicable. One part of this effort is the definition of the `ResultCode` type, which provides facilities for constructing and parsing error codes in the structured format used by the CTR. The `ResultVal` type builds on `ResultCode` by providing a container for values returned by function that can report errors. It enforces that correct error checking will be done on function returns by preventing the use of the return value if the function returned an error code. Currently this change is mostly internal since errors are still suppressed on the ARM<->HLE border, as a temporary compatibility hack. As functionality is implemented and tested this hack can be eventually removed.
* Change some SkyEye defines to const intsYuri Kunde Schlesner2014-11-242-34/+16
| | | | | This prevents them from interfering with other constants defined in different namespaces.
* Remove trailing spaces in every file but the ones imported from SkyEye, AOSP or generatedEmmanuel Gil Peyrot2014-11-197-12/+12
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* Fix documentation of parametersLioncash2014-11-182-2/+2
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* Merge pull request #194 from lioncash/virtbunnei2014-11-151-1/+1
|\ | | | | ARM_Interface: Make destructor virtual
| * ARM_Interface: Make destructor virtualLioncash2014-11-141-1/+1
| | | | | | | | Fixes some warnings on OSX.
* | ARM: Fixed dyncom to use reg15 for PC (this core doesn't use pc variable).bunnei2014-11-121-2/+2
| | | | | | | | - Fixes single stepping in debugger.
* | ARM: Removed unnecessary goto with each instruction.bunnei2014-11-121-43/+39
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* | ARM: Fixed several dyncom bugs.bunnei2014-11-123-17/+25
| | | | | | | | | | | | | | - Fixed NZCVT flags to properly save state when function returns. - Fixed counter to keep track of the actual number of instructions executed. - Fixed single-step mode to only execute one instruction at a time. - DefaultIni: Removed comment that no longer applied to dyncom.
* | Fix compilation errorsSean Maas2014-11-031-2/+2
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* | ARM: Merged additional ARMv6 instructions implemented by 3dmoo.bunnei2014-11-021-42/+234
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* | ARM: Merge latest VFP fixes from 3dmoo team.bunnei2014-11-024-2096/+2388
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* | Fix VFP compilation errors with gccYuri Kunde Schlesner2014-10-311-12/+12
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* | Merge pull request #153 from yuriks/add-overridebunnei2014-10-282-18/+18
|\ \ | | | | | | Add override keyword where appropriate
| * | Add `override` keyword through the code.Yuri Kunde Schlesner2014-10-262-18/+18
| | | | | | | | | | | | This was automated using `clang-modernize`.
* | | vfp_helper: Get rid of integer type redefinitionsLioncash2014-10-261-7/+1
|/ /
* | ARM: Removed unnecessary and unused SkyEye MMU code.bunnei2014-10-2521-7728/+326
| | | | | | | | Added license header back in. I originally removed this because I mostly rewrote the file, but meh
* | ARM: Removed unused armos code from SkyEye.bunnei2014-10-253-746/+0
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* | ARM: Updated dyncom core to use fast label lookup table on clang.bunnei2014-10-251-3/+7
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* | ARM: Integrate SkyEye faster "dyncom" interpreter.bunnei2014-10-2518-50/+8216
| | | | | | | | | | | | | | | | | | | | Fixed typo (make protected member public) Added license header back in. I originally removed this because I mostly rewrote the file, but meh ARM: Fixed a type error in dyncom interpreter. ARM: Updated dyncom to use unique_ptr for internal ARM state.
* | ARM: Reorganized file structure to move shared SkyEye code to a more common area.bunnei2014-10-2531-63/+63
| | | | | | | | Removed s_ prefix
* | Merge pull request #97 from archshift/cleanupbunnei2014-09-141-1/+1
|\ \ | | | | | | Small, general code cleanup
| * | Dead code removal: video_core.cpp, load_symbol_map.cpparchshift2014-09-071-1/+1
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* | | Merge pull request #99 from archshift/ext-checkbunnei2014-09-111-39/+39
|\ \ \ | | | | | | | | loader.cpp: improved file extension checking, made Upper/LowerStr useful, moved string_util into Common namespace
| * | | Added string_util to common, small changes in loader.cpparchshift2014-09-091-39/+39
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* / | core: Prune redundant includesarchshift2014-09-091-1/+0
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* / core: Make the ARM disassembler use std::string internallyLioncash2014-09-063-189/+143
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* Threading: Fix thread starting to execute first instruction correctly.bunnei2014-08-281-1/+1
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* ARM: Remove a forgotten const in vfp.Emmanuel Gil Peyrot2014-08-202-2/+2
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* ARM: Synchronize Citra's SkyEye core with 3dmoo's.bunnei2014-07-246-5919/+5303
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* core: Kill off type redefenitions in armdefs.hLioncash2014-07-201-7/+0
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* Merge branch 'threading' of https://github.com/bunnei/citrabunnei2014-06-144-20/+18
|\ | | | | | | | | | | Conflicts: src/core/hle/function_wrappers.h src/core/hle/service/gsp.cpp
| * arm: fixed a bug where ARM_Interpreter::ExecuteInstructions was actually executing one more instruction than expectedbunnei2014-06-051-1/+1
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| * arm: fixed bug in how thread context switch occurs with SkyEyebunnei2014-06-051-2/+5
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| * arm: reverting a change made with cb0663de - this has to have been a typo!bunnei2014-06-051-1/+1
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| * arm: added option to prepare CPU core (while mid-instruction) for thread reschedulebunnei2014-06-023-0/+11
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| * arm: removed unnecessary code when calling SVC from skyeyebunnei2014-05-301-16/+0
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* | Added 'this' reference to num_instructions field so it's properly updated,as before the method was affecting the local method parameter rather than the class fieldDisruption2014-06-011-1/+1
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* | Merge branch 'threading'bunnei2014-05-237-36/+119
|\|
| * arm_interpreter: fixed load context to currently resume a threadbunnei2014-05-231-1/+4
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| * arm: removed include of windows.h from armdefs.h to arminit.c (only module that uses it)bunnei2014-05-212-4/+3
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| * armemu: missed rename of "Syscall" to "SVC"bunnei2014-05-211-1/+1
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| * ARM_Interpreter/ARM_Interface: Fixed member variable naming to be consistent with style guidebunnei2014-05-213-45/+45
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| * ARM_Interface: added SaveContext and LoadContext functions for HLE thread switchingbunnei2014-05-213-1/+63
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| * VFP: disable DBG messages because they spam the console with unimportant skyeye junkbunnei2014-05-201-1/+1
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| * ignore thumbemu 0xDEADCODE debugging catch on MCRbunnei2014-05-171-2/+1
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| * Merge branch 'master' into threadingbunnei2014-05-175-20/+30
| |\
| * \ Merge master into threading to add support for VFPbunnei2014-05-1728-136/+14183
| |\ \
| * | | added option to set CPSR register to arm_interfacebunnei2014-05-123-0/+20
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* | | | Merge pull request #2 from archshift/issue-7-fixbunnei2014-05-204-10/+10
|\ \ \ \ | |_|_|/ |/| | | Fixes issues with building Citra on OSX
| * | | Fixed vfp issuesarchshift2014-05-174-10/+10
| | |/ | |/|
* / | updated how we call ARM core to make things much fasterbunnei2014-05-175-20/+30
|/ /
* | same fix as last commit - just for vfpsingle.cppbunnei2014-05-171-2/+2
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* | another VFP fix for GCCbunnei2014-05-171-2/+2
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* | fixed VFP DBG log for GCCbunnei2014-05-171-1/+1
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* | - reenabled MCR and MRC functions now that VFP is attachedbunnei2014-05-172-95/+92
| | | | | | | | - removed HLE::CallMCR function (was pointless)
* | - removed unused stubbed out codebunnei2014-05-175-33/+27
| | | | | | | | | | - fixed some compiler issues with xscale_copro when porting code to Windows - fixed some #include's
* | added maverick.cpp to ARM core from skyeyebunnei2014-05-161-0/+1206
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* | fixed includesbunnei2014-05-161-2/+2
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* | enabled CP_ACCESS_ALLOWEDbunnei2014-05-161-6/+4
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* | fixed include pathbunnei2014-05-161-1/+1
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* | removed undefined function ARMul_ConsolePrintbunnei2014-05-161-1/+1
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* | added missing armcopro from skyeyebunnei2014-05-163-251/+1093
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* | added missing skyeye mmu codebunnei2014-05-169-17/+3272
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* | fixed armmmu importsbunnei2014-05-161-5/+5
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* | - moved mmu to arm/interpreter folderbunnei2014-05-1613-0/+8755
|/ | | | - added initial VFP code from skyeye
* - disable strict alignment on LDRD/STRDbunnei2014-05-071-17/+22
| | | | - handle RD in STREX/STREXB
* commented out useless debug logs that just spammed consolebunnei2014-05-061-3/+3
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* - added CallMCR function to coprocessor HLE modulebunnei2014-05-021-22/+23
| | | | - moved instruction decoding to coprocessor HLE module
* renamed hle "mrc" module to "coprocessor"bunnei2014-05-021-8/+8
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* added a module to load symbol map files for debuggingbunnei2014-05-012-0/+46
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* removed DISALLOW_COPY_AND_ASSIGN in favor of NonCopyable classbunnei2014-04-282-3/+1
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* removed commented out line - this was for an unimplemented MRC call, no longer need to leave this herebunnei2014-04-281-1/+0
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* moved HLE::MRC to its own module, added support for catching data synchronization barrier commandbunnei2014-04-252-3/+5
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* added disassembly to unimplemented instructionbunnei2014-04-251-1/+6
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* fixes to build on linuxbunnei2014-04-231-0/+2
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* - added HLE to connect to "srv:" servicebunnei2014-04-131-33/+35
| | | | | | - added a manager for keeping track of services/ports - added a memory mapped region for memory accessed by HLE - added HLE for GetThreadCommandBuffer function
* hacked CPU interpreter to ignore branch on SVC instruction (as we are HLEing this...)bunnei2014-04-121-2/+6
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* added a SETABORT method that does not update LR (for HLE'd SVC that does not jump appcore CPU to an IRQ vector)bunnei2014-04-121-0/+11
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* base code to call a syscall from ARM11 appcorebunnei2014-04-111-0/+3
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* missed this file with commit 95e5436fbunnei2014-04-111-1/+10
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* cleaned up arm_interface, added a setter to set registers for use with HLE return valuesbunnei2014-04-112-6/+70
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* fixed licensing and updated code style naming for arm_interface/arm_interpreter frontend modulebunnei2014-04-093-94/+57
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* fixed project includes to use new directory structurebunnei2014-04-0910-27/+27
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* got rid of 'src' folders in each sub-projectbunnei2014-04-0925-0/+15528
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