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authorReinUsesLisp <reinuseslisp@airmail.cc>2018-12-17 23:03:53 +0100
committerReinUsesLisp <reinuseslisp@airmail.cc>2019-01-15 21:54:52 +0100
commit6ca31f544a4559eca547b45b5158d210932cc428 (patch)
treebb809c281c4252dbdd6ecb8f5e7d88380cb05ac4 /src/video_core/shader/decode
parentshader_decode: Implement ISCADD (diff)
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Diffstat (limited to 'src/video_core/shader/decode')
-rw-r--r--src/video_core/shader/decode/other.cpp12
1 files changed, 8 insertions, 4 deletions
diff --git a/src/video_core/shader/decode/other.cpp b/src/video_core/shader/decode/other.cpp
index 0416d7eaa..5b3f9aa30 100644
--- a/src/video_core/shader/decode/other.cpp
+++ b/src/video_core/shader/decode/other.cpp
@@ -50,11 +50,15 @@ u32 ShaderIR::DecodeOther(BasicBlock& bb, u32 pc) {
UNIMPLEMENTED_IF_MSG(instr.bra.constant_buffer != 0,
"BRA with constant buffers are not implemented");
- const Tegra::Shader::ConditionCode cc = instr.flow_condition_code;
- UNIMPLEMENTED_IF(cc != Tegra::Shader::ConditionCode::T);
-
const u32 target = pc + instr.bra.GetBranchTarget();
- bb.push_back(Operation(OperationCode::Bra, Immediate(target)));
+ const Node branch = Operation(OperationCode::Bra, Immediate(target));
+
+ const Tegra::Shader::ConditionCode cc = instr.flow_condition_code;
+ if (cc != Tegra::Shader::ConditionCode::T) {
+ bb.push_back(Conditional(GetConditionCode(cc), {branch}));
+ } else {
+ bb.push_back(branch);
+ }
break;
}
case OpCode::Id::SSY: {