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authorSubv <subv2112@gmail.com>2018-07-04 05:32:59 +0200
committerSubv <subv2112@gmail.com>2018-07-04 05:32:59 +0200
commit5a9df3c6753e66519acaa13685abb89231e45ade (patch)
tree8f567cbd7f15670e34f2191ee0848f859c32b6ff /src/video_core/renderer_opengl/gl_rasterizer_cache.h
parentMerge pull request #609 from Subv/clear_buffers (diff)
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Diffstat (limited to 'src/video_core/renderer_opengl/gl_rasterizer_cache.h')
-rw-r--r--src/video_core/renderer_opengl/gl_rasterizer_cache.h9
1 files changed, 7 insertions, 2 deletions
diff --git a/src/video_core/renderer_opengl/gl_rasterizer_cache.h b/src/video_core/renderer_opengl/gl_rasterizer_cache.h
index 7aaf371bd..8005a81b8 100644
--- a/src/video_core/renderer_opengl/gl_rasterizer_cache.h
+++ b/src/video_core/renderer_opengl/gl_rasterizer_cache.h
@@ -326,13 +326,18 @@ struct SurfaceParams {
return addr <= (region_addr + region_size) && region_addr <= (addr + size_in_bytes);
}
- /// Creates SurfaceParams from a texture configation
+ /// Creates SurfaceParams from a texture configuration
static SurfaceParams CreateForTexture(const Tegra::Texture::FullTextureInfo& config);
- /// Creates SurfaceParams from a framebuffer configation
+ /// Creates SurfaceParams from a framebuffer configuration
static SurfaceParams CreateForFramebuffer(
const Tegra::Engines::Maxwell3D::Regs::RenderTargetConfig& config);
+ /// Creates SurfaceParams for a depth buffer configuration
+ static SurfaceParams CreateForDepthBuffer(
+ const Tegra::Engines::Maxwell3D::Regs::RenderTargetConfig& config,
+ Tegra::GPUVAddr zeta_address, Tegra::DepthFormat format);
+
Tegra::GPUVAddr addr;
bool is_tiled;
u32 block_height;