1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
|
// Copyright 2021 yuzu Emulator Project
// Licensed under GPLv2 or any later version
// Refer to the license.txt file included.
#pragma once
#include "common/bit_field.h"
#include "common/common_types.h"
#include "shader_recompiler/shader_info.h"
namespace Shader::IR {
enum class FmzMode : u8 {
DontCare, // Not specified for this instruction
FTZ, // Flush denorms to zero, NAN is propagated (D3D11, NVN, GL, VK)
FMZ, // Flush denorms to zero, x * 0 == 0 (D3D9)
None, // Denorms are not flushed, NAN is propagated (nouveau)
};
enum class FpRounding : u8 {
DontCare, // Not specified for this instruction
RN, // Round to nearest even,
RM, // Round towards negative infinity
RP, // Round towards positive infinity
RZ, // Round towards zero
};
enum class MemoryScope : u32 {
DontCare,
Warp,
Workgroup,
Device,
System,
};
struct FpControl {
bool no_contraction{false};
FpRounding rounding{FpRounding::DontCare};
FmzMode fmz_mode{FmzMode::DontCare};
};
static_assert(sizeof(FpControl) <= sizeof(u32));
union TextureInstInfo {
u32 raw;
BitField<0, 8, TextureType> type;
BitField<8, 1, u32> is_depth;
BitField<9, 1, u32> has_bias;
BitField<10, 1, u32> has_lod_clamp;
BitField<11, 1, u32> relaxed_precision;
BitField<12, 2, u32> gather_component;
BitField<14, 2, u32> num_derivates;
BitField<16, 3, ImageFormat> image_format;
};
static_assert(sizeof(TextureInstInfo) <= sizeof(u32));
} // namespace Shader::IR
|