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* Merge pull request #558 from Subv/iadd32ibunnei2018-06-121-2/+10
|\ | | | | GPU: Implemented the iadd32i shader instruction.
| * GPU: Implemented the iadd32i shader instruction.Subv2018-06-121-2/+10
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* | gl_shader_decompiler: Implement saturate for float instructions.bunnei2018-06-121-2/+1
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* GPU: Implement the iset family of shader instructions.Subv2018-06-091-0/+9
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* GPU: Added decodings for the ISET family of instructions.Subv2018-06-091-0/+7
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* Merge pull request #550 from Subv/ssybunnei2018-06-091-0/+2
|\ | | | | GPU: Stub the SSY shader instruction.
| * GPU: Stub the SSY shader instruction.Subv2018-06-091-0/+2
| | | | | | | | This instruction tells the GPU where the flow reconverges in a non-uniform control flow scenario, we can ignore this when generating GLSL code.
* | Merge pull request #551 from bunnei/shrbunnei2018-06-091-0/+4
|\ \ | | | | | | gl_shader_decompiler: Implement SHR instruction.
| * | gl_shader_decompiler: Implement SHR instruction.bunnei2018-06-091-0/+4
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* | gl_shader_decompiler: Implement IADD instruction.bunnei2018-06-091-5/+11
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* | gl_shader_decompiler: Add missing asserts for saturate_a instructions.bunnei2018-06-091-1/+1
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* GPU: Added registers for normal and independent blending.Subv2018-06-091-5/+26
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* gl_shader_decompiler: Implement BFE_IMM instruction.bunnei2018-06-071-3/+15
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* gl_shader_decompiler: F2F: Implement rounding modes.bunnei2018-06-071-3/+12
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* shader_bytecode: Add instruction decodings for BFE, IMNMX, and XMAD.bunnei2018-06-071-0/+20
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* Merge pull request #534 from Subv/multitexturingbunnei2018-06-072-0/+37
|\ | | | | GPU: Implement sampling multiple textures in the generated glsl shaders.
| * GPU: Implement sampling multiple textures in the generated glsl shaders.Subv2018-06-062-0/+37
| | | | | | | | | | | | All tested games that use a single texture show no regression. Only Texture2D textures are supported right now, each shader gets its own "tex_fs/vs/gs" sampler array to maintain independent textures between shader stages, the textures themselves are reused if possible.
* | gl_shader_decompiler: Implement LD_C instruction.bunnei2018-06-071-0/+16
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* | gl_shader_decompiler: Refactor uniform handling to allow different decodings.bunnei2018-06-061-6/+10
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* Merge pull request #516 from Subv/f2i_rbunnei2018-06-061-4/+20
|\ | | | | GPU: Implemented the F2I_R shader instruction.
| * GPU: Implemented the F2I_R shader instruction.Subv2018-06-051-4/+20
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* | Merge pull request #521 from Subv/brabunnei2018-06-051-4/+5
|\ \ | | | | | | GPU: Corrected the branch targets for the shader bra instruction.
| * | GPU: Corrected the branch targets for the shader bra instruction.Subv2018-06-051-4/+5
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* | | gl_shader_decompiler: Implement SHL instruction.bunnei2018-06-051-13/+17
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* | GPU: Implement the ISCADD shader instructions.Subv2018-06-051-0/+16
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* | GPU: Added decodings for the ISCADD instructions.Subv2018-06-051-0/+7
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* Merge pull request #514 from Subv/lop32ibunnei2018-06-051-1/+15
|\ | | | | GPU: Implemented the LOP32I instruction.
| * GPU: Implemented the LOP32I instruction.Subv2018-06-041-1/+15
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* | Merge pull request #510 from Subv/isetpbunnei2018-06-051-0/+10
|\ \ | | | | | | GPU: Implemented the ISETP_R and ISETP_C instructions
| * | GPU: Implemented the ISETP_R and ISETP_C shader instructions.Subv2018-06-041-0/+10
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* | Merge pull request #512 from Subv/fsetbunnei2018-06-051-1/+1
|\ \ | | | | | | GPU: Corrected the FSET and I2F instructions.
| * | GPU: Use the bf bit in FSET to determine whether to write 0xFFFFFFFF or 1.0f.Subv2018-06-041-1/+1
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* | Merge pull request #501 from Subv/shader_brabunnei2018-06-051-0/+15
|\ \ | | | | | | GPU: Partially implemented the bra shader instruction
| * | GPU: Partially implemented the shader BRA instruction.Subv2018-06-041-0/+13
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| * | GPU: Added decoding for the BRA instruction.Subv2018-06-041-0/+2
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* / GPU: Calculate the correct viewport dimensions based on the scale and translate registers.Subv2018-06-041-12/+28
|/ | | | This is how nouveau calculates the viewport width and height. For some reason some games set 0xFFFF in the VIEWPORT_HORIZ and VIEWPORT_VERT registers, maybe those are a misnomer and actually refer to something else?
* Merge pull request #500 from Subv/long_queriesbunnei2018-06-041-9/+24
|\ | | | | GPU: Partial implementation of long GPU queries.
| * GPU: Partial implementation of long GPU queries.Subv2018-06-041-9/+24
| | | | | | | | | | | | | | | | Long queries write a 128-bit result value to memory, which consists of a 64 bit query value and a 64 bit timestamp. In this implementation, only select=Zero of the Crop unit is implemented, this writes the query sequence as a 64 bit value, and a 0u64 value for the timestamp, since we emulate an infinitely fast GPU. This specific type was hwtested, but more rigorous tests should be performed in the future for the other types.
* | gl_shader_decompiler: Implement TEXS component mask.bunnei2018-06-031-2/+16
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* | Merge pull request #494 from bunnei/shader-texbunnei2018-06-031-0/+15
|\ \ | | | | | | gl_shader_decompiler: Implement TEX, fixes for TEXS.
| * | gl_shader_decompiler: Implement TEX instruction.bunnei2018-06-011-0/+10
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| * | gl_shader_decompiler: Support multi-destination for TEXS.bunnei2018-06-011-0/+5
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* / gl_shader_decompiler: Implement RRO as a register move.bunnei2018-06-031-3/+7
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* Merge pull request #489 from Subv/vertexidbunnei2018-05-301-0/+4
|\ | | | | Shaders: Implemented reading the gl_InstanceID and gl_VertexID variables in the vertex shader.
| * Shaders: Implemented reading the gl_InstanceID and gl_VertexID variables in the vertex shader.Subv2018-05-301-0/+4
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* | gl_shader_decompiler: Partially implement F2F_R instruction.bunnei2018-05-301-3/+3
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* shader_bytecode: Implement other variants of FMNMX.bunnei2018-05-261-3/+7
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* Merge pull request #458 from Subv/fmnmxbunnei2018-05-211-0/+5
|\ | | | | Shaders: Implemented the FMNMX shader instruction.
| * Shaders: Implemented the FMNMX shader instruction.Subv2018-05-211-0/+5
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* | ShadersDecompiler: Added decoding for the PSETP instruction.Subv2018-05-191-0/+3
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* maxwell_3d: Reset vertex counts after drawing.bunnei2018-04-291-0/+10
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* shader_bytecode: Add decoding for FMNMX instruction.bunnei2018-04-291-0/+2
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* Merge pull request #416 from bunnei/shader-ints-p3bunnei2018-04-291-8/+25
|\ | | | | gl_shader_decompiler: Implement MOV32I, partially implement I2I, I2F
| * gl_shader_decompiler: Partially implement I2I_R, and I2F_R.bunnei2018-04-291-8/+8
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| * shader_bytecode: Add decodings for i2i instructions.bunnei2018-04-291-3/+20
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| * gl_shader_decompiler: Implement MOV32_IMM instruction.bunnei2018-04-291-2/+2
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* | fermi_2d: Fix surface copy block height.bunnei2018-04-292-2/+7
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* general: Convert assertion macros over to be fmt-compatibleLioncash2018-04-271-2/+2
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* gl_shader_decompiler: Boilerplate for handling integer instructions.bunnei2018-04-261-1/+9
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* Merge pull request #396 from Subv/shader_opsbunnei2018-04-261-8/+35
|\ | | | | Shaders: Implemented the FSET instruction.
| * Shaders: Added bit decodings for the I2I instruction.Subv2018-04-251-0/+6
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| * Shaders: Added decodings for the FSET instructions.Subv2018-04-251-8/+29
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* | GPU: Partially implemented the Fermi2D surface copy operation.Subv2018-04-252-0/+59
| | | | | | | | | | The hardware allows for some rather complicated operations to be performed on the data during the copy, this is not implemented. Only same-format same-size raw copies are implemented for now.
* | GPU: Added surface copy registers to Fermi2DSubv2018-04-251-1/+57
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* | GPU: Added boilerplate code for the Fermi2D engineSubv2018-04-252-2/+33
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* | GPU: Reduce the number of registers of Maxwell3D to 0xE00.Subv2018-04-252-5/+5
| | | | | | | | The rest are just macro shim registers.
* | GPU: Move the Maxwell3D macro uploading code to the inside of the Maxwell3D processor.Subv2018-04-252-8/+23
| | | | | | | | It doesn't belong in the PFIFO handler.
* | video-core: Move logging macros over to new fmt-capable onesLioncash2018-04-251-2/+2
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* memory_manager: Make GpuToCpuAddress return an optional.bunnei2018-04-241-10/+11
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* memory_manager: Use GPUVAdddr, not PAddr, for GPU addresses.bunnei2018-04-241-6/+5
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* Merge pull request #386 from Subv/gpu_querybunnei2018-04-242-2/+53
|\ | | | | GPU: Added asserts to our code for handling the QUERY_GET GPU command.
| * GPU: Added asserts to our code for handling the QUERY_GET GPU command.Subv2018-04-242-2/+53
| | | | | | | | | | This is based on research from nouveau. Many things are currently unknown and will require hwtests in the future. This commit also stubs QueryMode::Write2 to do the same as Write. Nouveau code treats them interchangeably, it is currently unknown what the difference is.
* | GPU: Support multiple enabled vertex arrays.Subv2018-04-231-0/+5
|/ | | | | | The vertex arrays will be copied to the stream buffer one after the other, and the attributes will be set using the ARB_vertex_attrib_binding extension. yuzu now thus requires OpenGL 4.3 or the ARB_vertex_attrib_binding extension.
* shader_bytecode: Add several more instruction decodings.bunnei2018-04-211-5/+52
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* shader_bytecode: Decode instructions based on bit strings.bunnei2018-04-211-185/+172
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* ShaderGen: Implemented predicated instruction execution.Subv2018-04-211-1/+5
| | | | Each predicated instruction will be wrapped in an `if (predicate) { instruction_body; }` in the GLSL, where `predicate` is one of the predicate boolean variables previously set by fsetp.
* ShaderGen: Implemented the fsetp instruction.Subv2018-04-211-3/+40
| | | | | | | | | | Predicate variables are now added to the generated shader code in the form of 'pX' where X is the predicate id. These predicate variables are initialized to false on shader startup and are set via the fsetp instructions. TODO: * Not all the comparison types are implemented. * Only the single-predicate version is implemented.
* ShaderGen: Register id 255 is special and is hardcoded to return 0 (SR_ZERO).Subv2018-04-201-0/+3
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* ShaderGen: Implemented the fmul32i shader instruction.Subv2018-04-191-3/+14
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* gl_shader_gen: Support vertical/horizontal viewport flipping. (#347)bunnei2018-04-181-1/+10
| | | | | | * gl_shader_gen: Support vertical/horizontal viewport flipping. * fixup! gl_shader_gen: Support vertical/horizontal viewport flipping.
* GPU: Pitch textures are now supported, don't assert when encountering them.Subv2018-04-181-2/+3
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* Merge pull request #346 from bunnei/misc-gpu-improvementsbunnei2018-04-181-1/+2
|\ | | | | Misc gpu improvements
| * maxwell3d: Allow Texture2DNoMipmap as Texture2D.bunnei2018-04-181-1/+2
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* | Merge pull request #344 from bunnei/shader-decompiler-p2bunnei2018-04-181-10/+33
|\ \ | | | | | | Shader decompiler changes part 2
| * | shader_bytecode: Make ctor's constexpr and explicit.bunnei2018-04-181-7/+7
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| * | gl_shader_decompiler: Implement FMUL/FADD/FFMA immediate instructions.bunnei2018-04-171-0/+14
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| * | gl_shader_decompiler: Add support for TEXS instruction.bunnei2018-04-171-5/+14
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* / renderer_opengl: Implement BlendEquation and BlendFunc.bunnei2018-04-182-4/+48
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* gl_rasterizer: Implement indexed vertex mode.bunnei2018-04-172-2/+46
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* GPU: Added a function to determine whether a shader stage is enabled or not.Subv2018-04-152-0/+24
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* shaders: Add NumTextureSamplers const, remove unused #pragma.bunnei2018-04-151-2/+0
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* shaders: Address PR review feedback.bunnei2018-04-141-1/+1
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* shaders: Fix GCC and clang build issues.bunnei2018-04-141-3/+3
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* gl_shader_decompiler: Implement negate, abs, etc. and lots of cleanup.bunnei2018-04-141-20/+39
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* shader_bytecode: Add FSETP and KIL to GetInfo.bunnei2018-04-141-0/+3
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* shader_bytecode: Add SubOp decoding.bunnei2018-04-141-0/+10
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* maxwell_3d: Make memory_manager public.bunnei2018-04-141-2/+1
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* maxwell_3d: Fix shader_config decodings.bunnei2018-04-141-6/+3
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* shader_bytecode: Add initial module for shader decoding.bunnei2018-04-141-0/+297
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* GPU: Assert when finding a texture with a format type other than UNORM.Subv2018-04-071-0/+2
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* GPU: Use the MacroInterpreter class to execute the GPU macros instead of HLEing them.Subv2018-04-012-121/+13
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* GPU: Implemented a gpu macro interpreter.Subv2018-04-012-0/+8
| | | | | | The Ryujinx macro interpreter and envydis were used as reference. Macros are programs that are uploaded by the games during boot and can later be called by writing to their method id in a GPU command buffer.
* gl_rasterizer: Add a SyncViewport method.bunnei2018-03-271-0/+10
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* gl_rasterizer: Normalize vertex array data as appropriate.bunnei2018-03-271-0/+4
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* maxwell_3d: Use names that match envytools for VertexType.bunnei2018-03-271-8/+8
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* maxwell_3d: Add VertexAttribute struct and cleanup.bunnei2018-03-271-121/+160
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* Maxwell3D: Call AccelerateDrawBatch on DrawArrays.bunnei2018-03-271-1/+8
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* gl_rasterizer: Implement AnalyzeVertexArray.bunnei2018-03-271-0/+35
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* maxwell: Add RenderTargetFormat enum.bunnei2018-03-271-3/+4
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* GPU: Load the sampler info (TSC) when retrieving active textures.Subv2018-03-262-21/+67
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* GPU: Make the debug_context variable a member of the frontend instead of a global.Subv2018-03-251-11/+13
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* GPU: Added a function to retrieve the active textures for a shader stage.Subv2018-03-242-50/+59
| | | | TODO: A shader may not use all of these textures at the same time, shader analysis should be performed to determine which textures are actually sampled.
* GPU: Implement the Incoming/FinishedPrimitiveBatch debug breakpoints.Subv2018-03-241-0/+7
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* GPU: Implement the MaxwellCommandLoaded/Processed debug breakpoints.Subv2018-03-241-0/+10
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* GPU: Added a method to unswizzle a texture without decoding it.Subv2018-03-241-1/+1
| | | | Allow unswizzling of DXT1 textures.
* GPU: Preliminary work for texture decoding.Subv2018-03-241-0/+45
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* GPU: Added viewport registers to Maxwell3D's reg structure.Subv2018-03-241-1/+18
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* maxwell_3d: Add some format decodings and string helper functions.bunnei2018-03-231-3/+107
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* GPU: Added vertex attribute format registers.Subv2018-03-211-1/+14
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* GPU: Added registers for the number of vertices to render.Subv2018-03-211-2/+13
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* Merge pull request #253 from Subv/rt_depthMat M2018-03-201-1/+48
|\ | | | | GPU: Added registers for color and Z buffers.
| * GPU: Added Z buffer registers to Maxwell3D's reg structure.Subv2018-03-191-1/+17
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| * GPU: Added the render target (RT) registers to Maxwell3D's reg structure.Subv2018-03-191-1/+32
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* | Clang FixesN00byKing2018-03-191-1/+2
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* | Clean Warnings (?)N00byKing2018-03-191-1/+1
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* GPU: Added the TSC registers to the Maxwell3D register structure.Subv2018-03-191-1/+15
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* GPU: Added the TIC registers to the Maxwell3D register structure.Subv2018-03-191-1/+16
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* GPU: Implement macro 0xE1A BindTextureInfoBuffer in HLE.Subv2018-03-192-1/+29
| | | | This macro simply sets the current CB_ADDRESS to the texture buffer address for the input shader stage.
* GPU: Implement the BindStorageBuffer macro method in HLE.Subv2018-03-182-1/+36
| | | | | | This macro binds the SSBO Info Buffer as the current ConstBuffer. This buffer is usually bound to c0 during shader execution. Games seem to use this macro instead of directly writing the address for some reason.
* GPU: Handle writes to the CB_DATA method.Subv2018-03-182-0/+39
| | | | | | Writing to this method will cause the written value to be stored in the currently-set ConstBuffer plus CB_POS. This method is usually used to upload uniforms or other shader-visible data.
* GPU: Store uploaded GPU macros and keep track of the number of method parameters.Subv2018-03-182-11/+24
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* GPU: Macros are specific to the Maxwell3D engine, so handle them internally.Subv2018-03-186-31/+55
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* GPU: Renamed ShaderType to ShaderStage as that is less confusing.Subv2018-03-182-19/+19
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* GPU: Store shader constbuffer bindings in the GPU state.Subv2018-03-182-5/+61
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* GPU: Corrected some register offsets and removed superfluous macro registers.Subv2018-03-181-9/+3
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* GPU: Make the SetShader macro call do the same as the real macro's code.Subv2018-03-182-3/+44
| | | | | | It'll now set the CB_SIZE, CB_ADDRESS and CB_BIND registers when it's called. Presumably this SetShader function is binding the constant shader uniforms to buffer 1 (c1[]).
* GPU: Corrected the parameter documentation for the SetShader macro call.Subv2018-03-172-11/+12
| | | | | | Register 0xE24 is actually a macro that sets some shader parameters in the register structure. Macros are uploaded to the GPU at startup and have their own ISA, we'll probably write an interpreter for this in the future.
* Merge pull request #242 from Subv/set_shaderbunnei2018-03-172-4/+38
|\ | | | | GPU: Handle the SetShader method call (0xE24) and store the shader config.
| * GPU: Handle the SetShader method call (0xE24) and store the shader config.Subv2018-03-172-4/+38
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* | GPU: Added the vertex array registers.Subv2018-03-171-2/+33
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* Merge pull request #241 from Subv/gpu_method_callbunnei2018-03-176-1/+56
|\ | | | | GPU: Process command mode 5 (IncreaseOnce) differently from other commands
| * GPU: Process command mode 5 (IncreaseOnce) differently from other commands.Subv2018-03-176-1/+56
| | | | | | | | | | | | Accumulate all arguments before calling the desired method. Note: Maybe we should do the same for the NonIncreasing mode?
* | GPU: Assert that we get a 0 CODE_ADDRESS register in the 3D engine.Subv2018-03-171-0/+8
| | | | | | | | Shader address calculation depends on this value to some extent, we do not currently know what it being 0 entails.
* | GPU: Added Maxwell registers for Shader Program control.Subv2018-03-171-2/+55
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* GPU: Intercept writes to the VERTEX_END_GL register.Subv2018-03-052-1/+18
| | | | | | This is the register that gets written after a game calls DrawArrays(). We should collect all GPU state and draw using our graphics API here.
* maxwell_3d: Make constructor explicitLioncash2018-02-141-1/+1
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* GPU: Partially implemented the QUERY_* registers in the Maxwell3D engine.Subv2018-02-122-2/+94
| | | | Only QueryMode::Write is supported at the moment.
* Make a GPU class in VideoCore to contain the GPU state.Subv2018-02-126-18/+24
| | | | Also moved the GPU MemoryManager class to video_core since it makes more sense for it to be there.
* GPU: Added a command processor to decode the GPU pushbuffers and forward the commands to their respective engines.Subv2018-02-126-0/+99
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