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-rw-r--r--src/video_core/command_processor.cpp29
1 files changed, 17 insertions, 12 deletions
diff --git a/src/video_core/command_processor.cpp b/src/video_core/command_processor.cpp
index fb65a3a0a..3ab4af374 100644
--- a/src/video_core/command_processor.cpp
+++ b/src/video_core/command_processor.cpp
@@ -243,6 +243,15 @@ static void WritePicaReg(u32 id, u32 value, u32 mask) {
ASSERT(!g_state.geometry_pipeline.NeedIndexInput());
g_state.geometry_pipeline.Setup(shader_engine);
g_state.geometry_pipeline.SubmitVertex(output);
+
+ // TODO: If drawing after every immediate mode triangle kills performance,
+ // change it to flush triangles whenever a drawing config register changes
+ // See: https://github.com/citra-emu/citra/pull/2866#issuecomment-327011550
+ VideoCore::g_renderer->Rasterizer()->DrawTriangles();
+ if (g_debug_context) {
+ g_debug_context->OnEvent(DebugContext::Event::FinishedPrimitiveBatch,
+ nullptr);
+ }
}
}
}
@@ -250,16 +259,7 @@ static void WritePicaReg(u32 id, u32 value, u32 mask) {
}
case PICA_REG_INDEX(pipeline.gpu_mode):
- if (regs.pipeline.gpu_mode == PipelineRegs::GPUMode::Configuring) {
- MICROPROFILE_SCOPE(GPU_Drawing);
-
- // Draw immediate mode triangles when GPU Mode is set to GPUMode::Configuring
- VideoCore::g_renderer->Rasterizer()->DrawTriangles();
-
- if (g_debug_context) {
- g_debug_context->OnEvent(DebugContext::Event::FinishedPrimitiveBatch, nullptr);
- }
- }
+ // This register likely just enables vertex processing and doesn't need any special handling
break;
case PICA_REG_INDEX_WORKAROUND(pipeline.command_buffer.trigger[0], 0x23c):
@@ -398,6 +398,11 @@ static void WritePicaReg(u32 id, u32 value, u32 mask) {
range.second, range.first);
}
+ VideoCore::g_renderer->Rasterizer()->DrawTriangles();
+ if (g_debug_context) {
+ g_debug_context->OnEvent(DebugContext::Event::FinishedPrimitiveBatch, nullptr);
+ }
+
break;
}
@@ -632,6 +637,6 @@ void ProcessCommandList(const u32* list, u32 size) {
}
}
-} // namespace
+} // namespace CommandProcessor
-} // namespace
+} // namespace Pica