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-rw-r--r--src/video_core/pica.h57
1 files changed, 21 insertions, 36 deletions
diff --git a/src/video_core/pica.h b/src/video_core/pica.h
index 4ab4f1f40..731540b99 100644
--- a/src/video_core/pica.h
+++ b/src/video_core/pica.h
@@ -99,7 +99,8 @@ struct Regs {
TEXCOORD1_U = 14,
TEXCOORD1_V = 15,
- // TODO: Not verified
+ TEXCOORD0_W = 16,
+
VIEW_X = 18,
VIEW_Y = 19,
VIEW_Z = 20,
@@ -871,7 +872,7 @@ struct Regs {
LightSrc light[8];
LightColor global_ambient; // Emission + (material.ambient * lighting.ambient)
INSERT_PADDING_WORDS(0x1);
- BitField<0, 3, u32> num_lights; // Number of enabled lights - 1
+ BitField<0, 3, u32> max_light_index; // Number of enabled lights - 1
union {
BitField<2, 2, LightingFresnelSelector> fresnel_selector;
@@ -1048,7 +1049,7 @@ struct Regs {
BitField<48, 12, u64> attribute_mask;
// number of total attributes minus 1
- BitField<60, 4, u64> num_extra_attributes;
+ BitField<60, 4, u64> max_attribute_index;
};
inline VertexAttributeFormat GetFormat(int n) const {
@@ -1079,7 +1080,7 @@ struct Regs {
}
inline int GetNumTotalAttributes() const {
- return (int)num_extra_attributes + 1;
+ return (int)max_attribute_index + 1;
}
// Attribute loaders map the source vertex data to input attributes
@@ -1179,7 +1180,12 @@ struct Regs {
}
} command_buffer;
- INSERT_PADDING_WORDS(0x07);
+ INSERT_PADDING_WORDS(4);
+
+ /// Number of input attributes to the vertex shader minus 1
+ BitField<0, 4, u32> max_input_attrib_index;
+
+ INSERT_PADDING_WORDS(2);
enum class GPUMode : u32 {
Drawing = 0,
@@ -1217,42 +1223,21 @@ struct Regs {
union {
// Number of input attributes to shader unit - 1
- BitField<0, 4, u32> num_input_attributes;
+ BitField<0, 4, u32> max_input_attribute_index;
};
// Offset to shader program entry point (in words)
BitField<0, 16, u32> main_offset;
- union {
- BitField<0, 4, u64> attribute0_register;
- BitField<4, 4, u64> attribute1_register;
- BitField<8, 4, u64> attribute2_register;
- BitField<12, 4, u64> attribute3_register;
- BitField<16, 4, u64> attribute4_register;
- BitField<20, 4, u64> attribute5_register;
- BitField<24, 4, u64> attribute6_register;
- BitField<28, 4, u64> attribute7_register;
- BitField<32, 4, u64> attribute8_register;
- BitField<36, 4, u64> attribute9_register;
- BitField<40, 4, u64> attribute10_register;
- BitField<44, 4, u64> attribute11_register;
- BitField<48, 4, u64> attribute12_register;
- BitField<52, 4, u64> attribute13_register;
- BitField<56, 4, u64> attribute14_register;
- BitField<60, 4, u64> attribute15_register;
-
- int GetRegisterForAttribute(int attribute_index) const {
- u64 fields[] = {
- attribute0_register, attribute1_register, attribute2_register,
- attribute3_register, attribute4_register, attribute5_register,
- attribute6_register, attribute7_register, attribute8_register,
- attribute9_register, attribute10_register, attribute11_register,
- attribute12_register, attribute13_register, attribute14_register,
- attribute15_register,
- };
- return (int)fields[attribute_index];
- }
- } input_register_map;
+ /// Maps input attributes to registers. 4-bits per attribute, specifying a register index
+ u32 input_attribute_to_register_map_low;
+ u32 input_attribute_to_register_map_high;
+
+ unsigned int GetRegisterForAttribute(unsigned int attribute_index) const {
+ u64 map = ((u64)input_attribute_to_register_map_high << 32) |
+ (u64)input_attribute_to_register_map_low;
+ return (map >> (attribute_index * 4)) & 0b1111;
+ }
BitField<0, 16, u32> output_mask;