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Diffstat (limited to 'src/video_core/engines/maxwell_3d.h')
-rw-r--r--src/video_core/engines/maxwell_3d.h36
1 files changed, 19 insertions, 17 deletions
diff --git a/src/video_core/engines/maxwell_3d.h b/src/video_core/engines/maxwell_3d.h
index 2dc251205..180be4ff4 100644
--- a/src/video_core/engines/maxwell_3d.h
+++ b/src/video_core/engines/maxwell_3d.h
@@ -321,6 +321,24 @@ public:
INSERT_PADDING_WORDS(1);
};
+ struct RenderTargetConfig {
+ u32 address_high;
+ u32 address_low;
+ u32 width;
+ u32 height;
+ Tegra::RenderTargetFormat format;
+ u32 block_dimensions;
+ u32 array_mode;
+ u32 layer_stride;
+ u32 base_layer;
+ INSERT_PADDING_WORDS(7);
+
+ GPUVAddr Address() const {
+ return static_cast<GPUVAddr>((static_cast<GPUVAddr>(address_high) << 32) |
+ address_low);
+ }
+ };
+
union {
struct {
INSERT_PADDING_WORDS(0x45);
@@ -333,23 +351,7 @@ public:
INSERT_PADDING_WORDS(0x1B8);
- struct {
- u32 address_high;
- u32 address_low;
- u32 width;
- u32 height;
- Tegra::RenderTargetFormat format;
- u32 block_dimensions;
- u32 array_mode;
- u32 layer_stride;
- u32 base_layer;
- INSERT_PADDING_WORDS(7);
-
- GPUVAddr Address() const {
- return static_cast<GPUVAddr>((static_cast<GPUVAddr>(address_high) << 32) |
- address_low);
- }
- } rt[NumRenderTargets];
+ RenderTargetConfig rt[NumRenderTargets];
struct {
f32 scale_x;