diff options
Diffstat (limited to 'src/video_core/engines/kepler_compute.h')
-rw-r--r-- | src/video_core/engines/kepler_compute.h | 39 |
1 files changed, 24 insertions, 15 deletions
diff --git a/src/video_core/engines/kepler_compute.h b/src/video_core/engines/kepler_compute.h index 90cf650d2..5259d92bd 100644 --- a/src/video_core/engines/kepler_compute.h +++ b/src/video_core/engines/kepler_compute.h @@ -10,6 +10,7 @@ #include "common/bit_field.h" #include "common/common_funcs.h" #include "common/common_types.h" +#include "video_core/engines/const_buffer_engine_interface.h" #include "video_core/engines/engine_upload.h" #include "video_core/gpu.h" #include "video_core/textures/texture.h" @@ -37,7 +38,7 @@ namespace Tegra::Engines { #define KEPLER_COMPUTE_REG_INDEX(field_name) \ (offsetof(Tegra::Engines::KeplerCompute::Regs, field_name) / sizeof(u32)) -class KeplerCompute final { +class KeplerCompute final : public ConstBufferEngineInterface { public: explicit KeplerCompute(Core::System& system, VideoCore::RasterizerInterface& rasterizer, MemoryManager& memory_manager); @@ -50,7 +51,7 @@ public: union { struct { - INSERT_PADDING_WORDS(0x60); + INSERT_UNION_PADDING_WORDS(0x60); Upload::Registers upload; @@ -62,7 +63,7 @@ public: u32 data_upload; - INSERT_PADDING_WORDS(0x3F); + INSERT_UNION_PADDING_WORDS(0x3F); struct { u32 address; @@ -71,11 +72,11 @@ public: } } launch_desc_loc; - INSERT_PADDING_WORDS(0x1); + INSERT_UNION_PADDING_WORDS(0x1); u32 launch; - INSERT_PADDING_WORDS(0x4A7); + INSERT_UNION_PADDING_WORDS(0x4A7); struct { u32 address_high; @@ -87,7 +88,7 @@ public: } } tsc; - INSERT_PADDING_WORDS(0x3); + INSERT_UNION_PADDING_WORDS(0x3); struct { u32 address_high; @@ -99,7 +100,7 @@ public: } } tic; - INSERT_PADDING_WORDS(0x22); + INSERT_UNION_PADDING_WORDS(0x22); struct { u32 address_high; @@ -110,11 +111,11 @@ public: } } code_loc; - INSERT_PADDING_WORDS(0x3FE); + INSERT_UNION_PADDING_WORDS(0x3FE); u32 tex_cb_index; - INSERT_PADDING_WORDS(0x374); + INSERT_UNION_PADDING_WORDS(0x374); }; std::array<u32, NUM_REGS> reg_array; }; @@ -178,7 +179,7 @@ public: }; INSERT_PADDING_WORDS(0x11); - } launch_description; + } launch_description{}; struct { u32 write_offset = 0; @@ -195,13 +196,21 @@ public: /// Write the value to the register identified by method. void CallMethod(const GPU::MethodCall& method_call); - Tegra::Texture::FullTextureInfo GetTexture(std::size_t offset) const; + Texture::FullTextureInfo GetTexture(std::size_t offset) const; - /// Given a Texture Handle, returns the TSC and TIC entries. - Texture::FullTextureInfo GetTextureInfo(const Texture::TextureHandle tex_handle, - std::size_t offset) const; + /// Given a texture handle, returns the TSC and TIC entries. + Texture::FullTextureInfo GetTextureInfo(Texture::TextureHandle tex_handle) const; - u32 AccessConstBuffer32(u64 const_buffer, u64 offset) const; + u32 AccessConstBuffer32(ShaderType stage, u64 const_buffer, u64 offset) const override; + + SamplerDescriptor AccessBoundSampler(ShaderType stage, u64 offset) const override; + + SamplerDescriptor AccessBindlessSampler(ShaderType stage, u64 const_buffer, + u64 offset) const override; + + u32 GetBoundBuffer() const override { + return regs.tex_cb_index; + } private: Core::System& system; |