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-rw-r--r--src/core/arm/nce/arm_nce.cpp255
-rw-r--r--src/core/arm/nce/arm_nce.h70
-rw-r--r--src/core/arm/nce/arm_nce.s80
-rw-r--r--src/core/arm/nce/guest_context.h8
-rw-r--r--src/core/arm/nce/patcher.cpp2
5 files changed, 166 insertions, 249 deletions
diff --git a/src/core/arm/nce/arm_nce.cpp b/src/core/arm/nce/arm_nce.cpp
index f7bdafd39..b42a32a0b 100644
--- a/src/core/arm/nce/arm_nce.cpp
+++ b/src/core/arm/nce/arm_nce.cpp
@@ -6,6 +6,7 @@
#include "common/signal_chain.h"
#include "core/arm/nce/arm_nce.h"
+#include "core/arm/nce/guest_context.h"
#include "core/arm/nce/patcher.h"
#include "core/core.h"
#include "core/memory.h"
@@ -38,7 +39,7 @@ fpsimd_context* GetFloatingPointState(mcontext_t& host_ctx) {
} // namespace
-void* ARM_NCE::RestoreGuestContext(void* raw_context) {
+void* ArmNce::RestoreGuestContext(void* raw_context) {
// Retrieve the host context.
auto& host_ctx = static_cast<ucontext_t*>(raw_context)->uc_mcontext;
@@ -71,7 +72,7 @@ void* ARM_NCE::RestoreGuestContext(void* raw_context) {
return tpidr;
}
-void ARM_NCE::SaveGuestContext(GuestContext* guest_ctx, void* raw_context) {
+void ArmNce::SaveGuestContext(GuestContext* guest_ctx, void* raw_context) {
// Retrieve the host context.
auto& host_ctx = static_cast<ucontext_t*>(raw_context)->uc_mcontext;
@@ -103,7 +104,7 @@ void ARM_NCE::SaveGuestContext(GuestContext* guest_ctx, void* raw_context) {
host_ctx.regs[0] = guest_ctx->esr_el1.exchange(0);
}
-bool ARM_NCE::HandleGuestFault(GuestContext* guest_ctx, void* raw_info, void* raw_context) {
+bool ArmNce::HandleGuestFault(GuestContext* guest_ctx, void* raw_info, void* raw_context) {
auto& host_ctx = static_cast<ucontext_t*>(raw_context)->uc_mcontext;
auto* info = static_cast<siginfo_t*>(raw_info);
@@ -134,7 +135,7 @@ bool ARM_NCE::HandleGuestFault(GuestContext* guest_ctx, void* raw_info, void* ra
// - If we lose the race, then SignalInterrupt will send us a signal we are masking,
// and it will do nothing when it is unmasked, as we have already left guest code.
// - If we win the race, then SignalInterrupt will wait for us to unlock first.
- auto& thread_params = guest_ctx->parent->running_thread->GetNativeExecutionParameters();
+ auto& thread_params = guest_ctx->parent->m_running_thread->GetNativeExecutionParameters();
thread_params.lock.store(SpinLockLocked);
// Return to host.
@@ -142,97 +143,93 @@ bool ARM_NCE::HandleGuestFault(GuestContext* guest_ctx, void* raw_info, void* ra
return false;
}
-void ARM_NCE::HandleHostFault(int sig, void* raw_info, void* raw_context) {
+void ArmNce::HandleHostFault(int sig, void* raw_info, void* raw_context) {
return g_orig_action.sa_sigaction(sig, static_cast<siginfo_t*>(raw_info), raw_context);
}
-HaltReason ARM_NCE::RunJit() {
- // Get the thread parameters.
- // TODO: pass the current thread down from ::Run
- auto* thread = Kernel::GetCurrentThreadPointer(system.Kernel());
+void ArmNce::LockThread(Kernel::KThread* thread) {
auto* thread_params = &thread->GetNativeExecutionParameters();
+ LockThreadParameters(thread_params);
+}
- {
- // Lock our core context.
- std::scoped_lock lk{lock};
-
- // We should not be running.
- ASSERT(running_thread == nullptr);
-
- // Check if we need to run. If we have already been halted, we are done.
- u64 halt = guest_ctx.esr_el1.exchange(0);
- if (halt != 0) {
- return static_cast<HaltReason>(halt);
- }
-
- // Mark that we are running.
- running_thread = thread;
+void ArmNce::UnlockThread(Kernel::KThread* thread) {
+ auto* thread_params = &thread->GetNativeExecutionParameters();
+ UnlockThreadParameters(thread_params);
+}
- // Acquire the lock on the thread parameters.
- // This allows us to force synchronization with SignalInterrupt.
- LockThreadParameters(thread_params);
+HaltReason ArmNce::RunThread(Kernel::KThread* thread) {
+ // Check if we're already interrupted.
+ // If we are, we can just return immediately.
+ HaltReason hr = static_cast<HaltReason>(m_guest_ctx.esr_el1.exchange(0));
+ if (True(hr)) {
+ return hr;
}
+ // Get the thread context.
+ auto* thread_params = &thread->GetNativeExecutionParameters();
+ auto* process = thread->GetOwnerProcess();
+
// Assign current members.
- guest_ctx.parent = this;
- thread_params->native_context = &guest_ctx;
- thread_params->tpidr_el0 = guest_ctx.tpidr_el0;
- thread_params->tpidrro_el0 = guest_ctx.tpidrro_el0;
+ m_running_thread = thread;
+ m_guest_ctx.parent = this;
+ thread_params->native_context = &m_guest_ctx;
+ thread_params->tpidr_el0 = m_guest_ctx.tpidr_el0;
+ thread_params->tpidrro_el0 = m_guest_ctx.tpidrro_el0;
thread_params->is_running = true;
- HaltReason halt{};
-
// TODO: finding and creating the post handler needs to be locked
// to deal with dynamic loading of NROs.
- const auto& post_handlers = system.ApplicationProcess()->GetPostHandlers();
- if (auto it = post_handlers.find(guest_ctx.pc); it != post_handlers.end()) {
- halt = ReturnToRunCodeByTrampoline(thread_params, &guest_ctx, it->second);
+ const auto& post_handlers = process->GetPostHandlers();
+ if (auto it = post_handlers.find(m_guest_ctx.pc); it != post_handlers.end()) {
+ hr = ReturnToRunCodeByTrampoline(thread_params, &m_guest_ctx, it->second);
} else {
- halt = ReturnToRunCodeByExceptionLevelChange(thread_id, thread_params);
+ hr = ReturnToRunCodeByExceptionLevelChange(m_thread_id, thread_params);
}
// Unload members.
// The thread does not change, so we can persist the old reference.
- guest_ctx.tpidr_el0 = thread_params->tpidr_el0;
+ m_running_thread = nullptr;
+ m_guest_ctx.tpidr_el0 = thread_params->tpidr_el0;
thread_params->native_context = nullptr;
thread_params->is_running = false;
- // Unlock the thread parameters.
- UnlockThreadParameters(thread_params);
-
- {
- // Lock the core context.
- std::scoped_lock lk{lock};
-
- // On exit, we no longer have an active thread.
- running_thread = nullptr;
- }
-
// Return the halt reason.
- return halt;
+ return hr;
}
-HaltReason ARM_NCE::StepJit() {
+HaltReason ArmNce::StepThread(Kernel::KThread* thread) {
return HaltReason::StepThread;
}
-u32 ARM_NCE::GetSvcNumber() const {
- return guest_ctx.svc_swi;
+u32 ArmNce::GetSvcNumber() const {
+ return m_guest_ctx.svc;
+}
+
+void ArmNce::GetSvcArguments(std::span<uint64_t, 8> args) const {
+ for (size_t i = 0; i < 8; i++) {
+ args[i] = m_guest_ctx.cpu_registers[i];
+ }
+}
+
+void ArmNce::SetSvcArguments(std::span<const uint64_t, 8> args) {
+ for (size_t i = 0; i < 8; i++) {
+ m_guest_ctx.cpu_registers[i] = args[i];
+ }
}
-ARM_NCE::ARM_NCE(System& system_, bool uses_wall_clock_, std::size_t core_index_)
- : ARM_Interface{system_, uses_wall_clock_}, core_index{core_index_} {
- guest_ctx.system = &system_;
+ArmNce::ArmNce(System& system, bool uses_wall_clock, std::size_t core_index)
+ : ArmInterface{uses_wall_clock}, m_system{system}, m_core_index{core_index} {
+ m_guest_ctx.system = &m_system;
}
-ARM_NCE::~ARM_NCE() = default;
+ArmNce::~ArmNce() = default;
-void ARM_NCE::Initialize() {
- thread_id = gettid();
+void ArmNce::Initialize() {
+ m_thread_id = gettid();
// Setup our signals
- static std::once_flag flag;
- std::call_once(flag, [] {
+ static std::once_flag signals;
+ std::call_once(signals, [] {
using HandlerType = decltype(sigaction::sa_sigaction);
sigset_t signal_mask;
@@ -244,7 +241,7 @@ void ARM_NCE::Initialize() {
struct sigaction return_to_run_code_action {};
return_to_run_code_action.sa_flags = SA_SIGINFO | SA_ONSTACK;
return_to_run_code_action.sa_sigaction = reinterpret_cast<HandlerType>(
- &ARM_NCE::ReturnToRunCodeByExceptionLevelChangeSignalHandler);
+ &ArmNce::ReturnToRunCodeByExceptionLevelChangeSignalHandler);
return_to_run_code_action.sa_mask = signal_mask;
Common::SigAction(ReturnToRunCodeByExceptionLevelChangeSignal, &return_to_run_code_action,
nullptr);
@@ -252,14 +249,13 @@ void ARM_NCE::Initialize() {
struct sigaction break_from_run_code_action {};
break_from_run_code_action.sa_flags = SA_SIGINFO | SA_ONSTACK;
break_from_run_code_action.sa_sigaction =
- reinterpret_cast<HandlerType>(&ARM_NCE::BreakFromRunCodeSignalHandler);
+ reinterpret_cast<HandlerType>(&ArmNce::BreakFromRunCodeSignalHandler);
break_from_run_code_action.sa_mask = signal_mask;
Common::SigAction(BreakFromRunCodeSignal, &break_from_run_code_action, nullptr);
struct sigaction fault_action {};
fault_action.sa_flags = SA_SIGINFO | SA_ONSTACK | SA_RESTART;
- fault_action.sa_sigaction =
- reinterpret_cast<HandlerType>(&ARM_NCE::GuestFaultSignalHandler);
+ fault_action.sa_sigaction = reinterpret_cast<HandlerType>(&ArmNce::GuestFaultSignalHandler);
fault_action.sa_mask = signal_mask;
Common::SigAction(GuestFaultSignal, &fault_action, &g_orig_action);
@@ -272,111 +268,59 @@ void ARM_NCE::Initialize() {
});
}
-void ARM_NCE::SetPC(u64 pc) {
- guest_ctx.pc = pc;
+void ArmNce::SetTpidrroEl0(u64 value) {
+ m_guest_ctx.tpidrro_el0 = value;
}
-u64 ARM_NCE::GetPC() const {
- return guest_ctx.pc;
-}
-
-u64 ARM_NCE::GetSP() const {
- return guest_ctx.sp;
-}
-
-u64 ARM_NCE::GetReg(int index) const {
- return guest_ctx.cpu_registers[index];
-}
-
-void ARM_NCE::SetReg(int index, u64 value) {
- guest_ctx.cpu_registers[index] = value;
-}
-
-u128 ARM_NCE::GetVectorReg(int index) const {
- return guest_ctx.vector_registers[index];
-}
-
-void ARM_NCE::SetVectorReg(int index, u128 value) {
- guest_ctx.vector_registers[index] = value;
-}
-
-u32 ARM_NCE::GetPSTATE() const {
- return guest_ctx.pstate;
-}
-
-void ARM_NCE::SetPSTATE(u32 pstate) {
- guest_ctx.pstate = pstate;
-}
-
-u64 ARM_NCE::GetTlsAddress() const {
- return guest_ctx.tpidrro_el0;
-}
-
-void ARM_NCE::SetTlsAddress(u64 address) {
- guest_ctx.tpidrro_el0 = address;
-}
-
-u64 ARM_NCE::GetTPIDR_EL0() const {
- return guest_ctx.tpidr_el0;
-}
-
-void ARM_NCE::SetTPIDR_EL0(u64 value) {
- guest_ctx.tpidr_el0 = value;
-}
-
-void ARM_NCE::SaveContext(ThreadContext64& ctx) const {
- ctx.cpu_registers = guest_ctx.cpu_registers;
- ctx.sp = guest_ctx.sp;
- ctx.pc = guest_ctx.pc;
- ctx.pstate = guest_ctx.pstate;
- ctx.vector_registers = guest_ctx.vector_registers;
- ctx.fpcr = guest_ctx.fpcr;
- ctx.fpsr = guest_ctx.fpsr;
- ctx.tpidr = guest_ctx.tpidr_el0;
+void ArmNce::GetContext(Kernel::Svc::ThreadContext& ctx) const {
+ for (size_t i = 0; i < 29; i++) {
+ ctx.r[i] = m_guest_ctx.cpu_registers[i];
+ }
+ ctx.fp = m_guest_ctx.cpu_registers[29];
+ ctx.lr = m_guest_ctx.cpu_registers[30];
+ ctx.sp = m_guest_ctx.sp;
+ ctx.pc = m_guest_ctx.pc;
+ ctx.pstate = m_guest_ctx.pstate;
+ ctx.v = m_guest_ctx.vector_registers;
+ ctx.fpcr = m_guest_ctx.fpcr;
+ ctx.fpsr = m_guest_ctx.fpsr;
+ ctx.tpidr = m_guest_ctx.tpidr_el0;
}
-void ARM_NCE::LoadContext(const ThreadContext64& ctx) {
- guest_ctx.cpu_registers = ctx.cpu_registers;
- guest_ctx.sp = ctx.sp;
- guest_ctx.pc = ctx.pc;
- guest_ctx.pstate = ctx.pstate;
- guest_ctx.vector_registers = ctx.vector_registers;
- guest_ctx.fpcr = ctx.fpcr;
- guest_ctx.fpsr = ctx.fpsr;
- guest_ctx.tpidr_el0 = ctx.tpidr;
+void ArmNce::SetContext(const Kernel::Svc::ThreadContext& ctx) {
+ for (size_t i = 0; i < 29; i++) {
+ m_guest_ctx.cpu_registers[i] = ctx.r[i];
+ }
+ m_guest_ctx.cpu_registers[29] = ctx.fp;
+ m_guest_ctx.cpu_registers[30] = ctx.lr;
+ m_guest_ctx.sp = ctx.sp;
+ m_guest_ctx.pc = ctx.pc;
+ m_guest_ctx.pstate = ctx.pstate;
+ m_guest_ctx.vector_registers = ctx.v;
+ m_guest_ctx.fpcr = ctx.fpcr;
+ m_guest_ctx.fpsr = ctx.fpsr;
+ m_guest_ctx.tpidr_el0 = ctx.tpidr;
}
-void ARM_NCE::SignalInterrupt() {
- // Lock core context.
- std::scoped_lock lk{lock};
-
+void ArmNce::SignalInterrupt(Kernel::KThread* thread) {
// Add break loop condition.
- guest_ctx.esr_el1.fetch_or(static_cast<u64>(HaltReason::BreakLoop));
-
- // If there is no thread running, we are done.
- if (running_thread == nullptr) {
- return;
- }
+ m_guest_ctx.esr_el1.fetch_or(static_cast<u64>(HaltReason::BreakLoop));
// Lock the thread context.
- auto* params = &running_thread->GetNativeExecutionParameters();
+ auto* params = &thread->GetNativeExecutionParameters();
LockThreadParameters(params);
if (params->is_running) {
// We should signal to the running thread.
// The running thread will unlock the thread context.
- syscall(SYS_tkill, thread_id, BreakFromRunCodeSignal);
+ syscall(SYS_tkill, m_thread_id, BreakFromRunCodeSignal);
} else {
// If the thread is no longer running, we have nothing to do.
UnlockThreadParameters(params);
}
}
-void ARM_NCE::ClearInterrupt() {
- guest_ctx.esr_el1 = {};
-}
-
-void ARM_NCE::ClearInstructionCache() {
+void ArmNce::ClearInstructionCache() {
// TODO: This is not possible to implement correctly on Linux because
// we do not have any access to ic iallu.
@@ -384,17 +328,8 @@ void ARM_NCE::ClearInstructionCache() {
std::atomic_thread_fence(std::memory_order_seq_cst);
}
-void ARM_NCE::InvalidateCacheRange(u64 addr, std::size_t size) {
+void ArmNce::InvalidateCacheRange(u64 addr, std::size_t size) {
this->ClearInstructionCache();
}
-void ARM_NCE::ClearExclusiveState() {
- // No-op.
-}
-
-void ARM_NCE::PageTableChanged(Common::PageTable& page_table,
- std::size_t new_address_space_size_in_bits) {
- // No-op. Page table is never used.
-}
-
} // namespace Core
diff --git a/src/core/arm/nce/arm_nce.h b/src/core/arm/nce/arm_nce.h
index 5fbd6dbf3..f55c10d1d 100644
--- a/src/core/arm/nce/arm_nce.h
+++ b/src/core/arm/nce/arm_nce.h
@@ -3,11 +3,7 @@
#pragma once
-#include <atomic>
-#include <memory>
-#include <span>
-#include <unordered_map>
-#include <vector>
+#include <mutex>
#include "core/arm/arm_interface.h"
#include "core/arm/nce/guest_context.h"
@@ -20,51 +16,36 @@ namespace Core {
class System;
-class ARM_NCE final : public ARM_Interface {
+class ArmNce final : public ArmInterface {
public:
- ARM_NCE(System& system_, bool uses_wall_clock_, std::size_t core_index_);
-
- ~ARM_NCE() override;
+ ArmNce(System& system, bool uses_wall_clock, std::size_t core_index);
+ ~ArmNce() override;
void Initialize() override;
- void SetPC(u64 pc) override;
- u64 GetPC() const override;
- u64 GetSP() const override;
- u64 GetReg(int index) const override;
- void SetReg(int index, u64 value) override;
- u128 GetVectorReg(int index) const override;
- void SetVectorReg(int index, u128 value) override;
-
- u32 GetPSTATE() const override;
- void SetPSTATE(u32 pstate) override;
- u64 GetTlsAddress() const override;
- void SetTlsAddress(u64 address) override;
- void SetTPIDR_EL0(u64 value) override;
- u64 GetTPIDR_EL0() const override;
Architecture GetArchitecture() const override {
- return Architecture::Aarch64;
+ return Architecture::AArch64;
}
- void SaveContext(ThreadContext32& ctx) const override {}
- void SaveContext(ThreadContext64& ctx) const override;
- void LoadContext(const ThreadContext32& ctx) override {}
- void LoadContext(const ThreadContext64& ctx) override;
+ HaltReason RunThread(Kernel::KThread* thread) override;
+ HaltReason StepThread(Kernel::KThread* thread) override;
+
+ void GetContext(Kernel::Svc::ThreadContext& ctx) const override;
+ void SetContext(const Kernel::Svc::ThreadContext& ctx) override;
+ void SetTpidrroEl0(u64 value) override;
- void SignalInterrupt() override;
- void ClearInterrupt() override;
- void ClearExclusiveState() override;
+ void GetSvcArguments(std::span<uint64_t, 8> args) const override;
+ void SetSvcArguments(std::span<const uint64_t, 8> args) override;
+ u32 GetSvcNumber() const override;
+
+ void SignalInterrupt(Kernel::KThread* thread) override;
void ClearInstructionCache() override;
void InvalidateCacheRange(u64 addr, std::size_t size) override;
- void PageTableChanged(Common::PageTable& new_page_table,
- std::size_t new_address_space_size_in_bits) override;
-
-protected:
- HaltReason RunJit() override;
- HaltReason StepJit() override;
- u32 GetSvcNumber() const override;
+ void LockThread(Kernel::KThread* thread) override;
+ void UnlockThread(Kernel::KThread* thread) override;
+protected:
const Kernel::DebugWatchpoint* HaltedWatchpoint() const override {
return nullptr;
}
@@ -93,16 +74,15 @@ private:
static void HandleHostFault(int sig, void* info, void* raw_context);
public:
+ Core::System& m_system;
+
// Members set on initialization.
- std::size_t core_index{};
- pid_t thread_id{-1};
+ std::size_t m_core_index{};
+ pid_t m_thread_id{-1};
// Core context.
- GuestContext guest_ctx;
-
- // Thread and invalidation info.
- std::mutex lock;
- Kernel::KThread* running_thread{};
+ GuestContext m_guest_ctx{};
+ Kernel::KThread* m_running_thread{};
};
} // namespace Core
diff --git a/src/core/arm/nce/arm_nce.s b/src/core/arm/nce/arm_nce.s
index b98e09f31..4aeda4740 100644
--- a/src/core/arm/nce/arm_nce.s
+++ b/src/core/arm/nce/arm_nce.s
@@ -8,11 +8,11 @@
movk reg, #(((val) >> 0x10) & 0xFFFF), lsl #16
-/* static HaltReason Core::ARM_NCE::ReturnToRunCodeByTrampoline(void* tpidr, Core::GuestContext* ctx, u64 trampoline_addr) */
-.section .text._ZN4Core7ARM_NCE27ReturnToRunCodeByTrampolineEPvPNS_12GuestContextEm, "ax", %progbits
-.global _ZN4Core7ARM_NCE27ReturnToRunCodeByTrampolineEPvPNS_12GuestContextEm
-.type _ZN4Core7ARM_NCE27ReturnToRunCodeByTrampolineEPvPNS_12GuestContextEm, %function
-_ZN4Core7ARM_NCE27ReturnToRunCodeByTrampolineEPvPNS_12GuestContextEm:
+/* static HaltReason Core::ArmNce::ReturnToRunCodeByTrampoline(void* tpidr, Core::GuestContext* ctx, u64 trampoline_addr) */
+.section .text._ZN4Core6ArmNce27ReturnToRunCodeByTrampolineEPvPNS_12GuestContextEm, "ax", %progbits
+.global _ZN4Core6ArmNce27ReturnToRunCodeByTrampolineEPvPNS_12GuestContextEm
+.type _ZN4Core6ArmNce27ReturnToRunCodeByTrampolineEPvPNS_12GuestContextEm, %function
+_ZN4Core6ArmNce27ReturnToRunCodeByTrampolineEPvPNS_12GuestContextEm:
/* Back up host sp to x3. */
/* Back up host tpidr_el0 to x4. */
mov x3, sp
@@ -49,11 +49,11 @@ _ZN4Core7ARM_NCE27ReturnToRunCodeByTrampolineEPvPNS_12GuestContextEm:
br x2
-/* static HaltReason Core::ARM_NCE::ReturnToRunCodeByExceptionLevelChange(int tid, void* tpidr) */
-.section .text._ZN4Core7ARM_NCE37ReturnToRunCodeByExceptionLevelChangeEiPv, "ax", %progbits
-.global _ZN4Core7ARM_NCE37ReturnToRunCodeByExceptionLevelChangeEiPv
-.type _ZN4Core7ARM_NCE37ReturnToRunCodeByExceptionLevelChangeEiPv, %function
-_ZN4Core7ARM_NCE37ReturnToRunCodeByExceptionLevelChangeEiPv:
+/* static HaltReason Core::ArmNce::ReturnToRunCodeByExceptionLevelChange(int tid, void* tpidr) */
+.section .text._ZN4Core6ArmNce37ReturnToRunCodeByExceptionLevelChangeEiPv, "ax", %progbits
+.global _ZN4Core6ArmNce37ReturnToRunCodeByExceptionLevelChangeEiPv
+.type _ZN4Core6ArmNce37ReturnToRunCodeByExceptionLevelChangeEiPv, %function
+_ZN4Core6ArmNce37ReturnToRunCodeByExceptionLevelChangeEiPv:
/* This jumps to the signal handler, which will restore the entire context. */
/* On entry, x0 = thread id, which is already in the right place. */
@@ -71,17 +71,17 @@ _ZN4Core7ARM_NCE37ReturnToRunCodeByExceptionLevelChangeEiPv:
brk #1000
-/* static void Core::ARM_NCE::ReturnToRunCodeByExceptionLevelChangeSignalHandler(int sig, void* info, void* raw_context) */
-.section .text._ZN4Core7ARM_NCE50ReturnToRunCodeByExceptionLevelChangeSignalHandlerEiPvS1_, "ax", %progbits
-.global _ZN4Core7ARM_NCE50ReturnToRunCodeByExceptionLevelChangeSignalHandlerEiPvS1_
-.type _ZN4Core7ARM_NCE50ReturnToRunCodeByExceptionLevelChangeSignalHandlerEiPvS1_, %function
-_ZN4Core7ARM_NCE50ReturnToRunCodeByExceptionLevelChangeSignalHandlerEiPvS1_:
+/* static void Core::ArmNce::ReturnToRunCodeByExceptionLevelChangeSignalHandler(int sig, void* info, void* raw_context) */
+.section .text._ZN4Core6ArmNce50ReturnToRunCodeByExceptionLevelChangeSignalHandlerEiPvS1_, "ax", %progbits
+.global _ZN4Core6ArmNce50ReturnToRunCodeByExceptionLevelChangeSignalHandlerEiPvS1_
+.type _ZN4Core6ArmNce50ReturnToRunCodeByExceptionLevelChangeSignalHandlerEiPvS1_, %function
+_ZN4Core6ArmNce50ReturnToRunCodeByExceptionLevelChangeSignalHandlerEiPvS1_:
stp x29, x30, [sp, #-0x10]!
mov x29, sp
/* Call the context restorer with the raw context. */
mov x0, x2
- bl _ZN4Core7ARM_NCE19RestoreGuestContextEPv
+ bl _ZN4Core6ArmNce19RestoreGuestContextEPv
/* Save the old value of tpidr_el0. */
mrs x8, tpidr_el0
@@ -92,18 +92,18 @@ _ZN4Core7ARM_NCE50ReturnToRunCodeByExceptionLevelChangeSignalHandlerEiPvS1_:
msr tpidr_el0, x0
/* Unlock the context. */
- bl _ZN4Core7ARM_NCE22UnlockThreadParametersEPv
+ bl _ZN4Core6ArmNce22UnlockThreadParametersEPv
/* Returning from here will enter the guest. */
ldp x29, x30, [sp], #0x10
ret
-/* static void Core::ARM_NCE::BreakFromRunCodeSignalHandler(int sig, void* info, void* raw_context) */
-.section .text._ZN4Core7ARM_NCE29BreakFromRunCodeSignalHandlerEiPvS1_, "ax", %progbits
-.global _ZN4Core7ARM_NCE29BreakFromRunCodeSignalHandlerEiPvS1_
-.type _ZN4Core7ARM_NCE29BreakFromRunCodeSignalHandlerEiPvS1_, %function
-_ZN4Core7ARM_NCE29BreakFromRunCodeSignalHandlerEiPvS1_:
+/* static void Core::ArmNce::BreakFromRunCodeSignalHandler(int sig, void* info, void* raw_context) */
+.section .text._ZN4Core6ArmNce29BreakFromRunCodeSignalHandlerEiPvS1_, "ax", %progbits
+.global _ZN4Core6ArmNce29BreakFromRunCodeSignalHandlerEiPvS1_
+.type _ZN4Core6ArmNce29BreakFromRunCodeSignalHandlerEiPvS1_, %function
+_ZN4Core6ArmNce29BreakFromRunCodeSignalHandlerEiPvS1_:
/* Check to see if we have the correct TLS magic. */
mrs x8, tpidr_el0
ldr w9, [x8, #(TpidrEl0TlsMagic)]
@@ -121,7 +121,7 @@ _ZN4Core7ARM_NCE29BreakFromRunCodeSignalHandlerEiPvS1_:
/* Tail call the restorer. */
mov x1, x2
- b _ZN4Core7ARM_NCE16SaveGuestContextEPNS_12GuestContextEPv
+ b _ZN4Core6ArmNce16SaveGuestContextEPNS_12GuestContextEPv
/* Returning from here will enter host code. */
@@ -130,11 +130,11 @@ _ZN4Core7ARM_NCE29BreakFromRunCodeSignalHandlerEiPvS1_:
ret
-/* static void Core::ARM_NCE::GuestFaultSignalHandler(int sig, void* info, void* raw_context) */
-.section .text._ZN4Core7ARM_NCE23GuestFaultSignalHandlerEiPvS1_, "ax", %progbits
-.global _ZN4Core7ARM_NCE23GuestFaultSignalHandlerEiPvS1_
-.type _ZN4Core7ARM_NCE23GuestFaultSignalHandlerEiPvS1_, %function
-_ZN4Core7ARM_NCE23GuestFaultSignalHandlerEiPvS1_:
+/* static void Core::ArmNce::GuestFaultSignalHandler(int sig, void* info, void* raw_context) */
+.section .text._ZN4Core6ArmNce23GuestFaultSignalHandlerEiPvS1_, "ax", %progbits
+.global _ZN4Core6ArmNce23GuestFaultSignalHandlerEiPvS1_
+.type _ZN4Core6ArmNce23GuestFaultSignalHandlerEiPvS1_, %function
+_ZN4Core6ArmNce23GuestFaultSignalHandlerEiPvS1_:
/* Check to see if we have the correct TLS magic. */
mrs x8, tpidr_el0
ldr w9, [x8, #(TpidrEl0TlsMagic)]
@@ -146,7 +146,7 @@ _ZN4Core7ARM_NCE23GuestFaultSignalHandlerEiPvS1_:
/* Incorrect TLS magic, so this is a host fault. */
/* Tail call the handler. */
- b _ZN4Core7ARM_NCE15HandleHostFaultEiPvS1_
+ b _ZN4Core6ArmNce15HandleHostFaultEiPvS1_
1:
/* Correct TLS magic, so this is a guest fault. */
@@ -163,7 +163,7 @@ _ZN4Core7ARM_NCE23GuestFaultSignalHandlerEiPvS1_:
msr tpidr_el0, x3
/* Call the handler. */
- bl _ZN4Core7ARM_NCE16HandleGuestFaultEPNS_12GuestContextEPvS3_
+ bl _ZN4Core6ArmNce16HandleGuestFaultEPNS_12GuestContextEPvS3_
/* If the handler returned false, we want to preserve the host tpidr_el0. */
cbz x0, 2f
@@ -177,11 +177,11 @@ _ZN4Core7ARM_NCE23GuestFaultSignalHandlerEiPvS1_:
ret
-/* static void Core::ARM_NCE::LockThreadParameters(void* tpidr) */
-.section .text._ZN4Core7ARM_NCE20LockThreadParametersEPv, "ax", %progbits
-.global _ZN4Core7ARM_NCE20LockThreadParametersEPv
-.type _ZN4Core7ARM_NCE20LockThreadParametersEPv, %function
-_ZN4Core7ARM_NCE20LockThreadParametersEPv:
+/* static void Core::ArmNce::LockThreadParameters(void* tpidr) */
+.section .text._ZN4Core6ArmNce20LockThreadParametersEPv, "ax", %progbits
+.global _ZN4Core6ArmNce20LockThreadParametersEPv
+.type _ZN4Core6ArmNce20LockThreadParametersEPv, %function
+_ZN4Core6ArmNce20LockThreadParametersEPv:
/* Offset to lock member. */
add x0, x0, #(TpidrEl0Lock)
@@ -205,11 +205,11 @@ _ZN4Core7ARM_NCE20LockThreadParametersEPv:
ret
-/* static void Core::ARM_NCE::UnlockThreadParameters(void* tpidr) */
-.section .text._ZN4Core7ARM_NCE22UnlockThreadParametersEPv, "ax", %progbits
-.global _ZN4Core7ARM_NCE22UnlockThreadParametersEPv
-.type _ZN4Core7ARM_NCE22UnlockThreadParametersEPv, %function
-_ZN4Core7ARM_NCE22UnlockThreadParametersEPv:
+/* static void Core::ArmNce::UnlockThreadParameters(void* tpidr) */
+.section .text._ZN4Core6ArmNce22UnlockThreadParametersEPv, "ax", %progbits
+.global _ZN4Core6ArmNce22UnlockThreadParametersEPv
+.type _ZN4Core6ArmNce22UnlockThreadParametersEPv, %function
+_ZN4Core6ArmNce22UnlockThreadParametersEPv:
/* Offset to lock member. */
add x0, x0, #(TpidrEl0Lock)
diff --git a/src/core/arm/nce/guest_context.h b/src/core/arm/nce/guest_context.h
index 0767a0337..a7eadccce 100644
--- a/src/core/arm/nce/guest_context.h
+++ b/src/core/arm/nce/guest_context.h
@@ -3,6 +3,8 @@
#pragma once
+#include <atomic>
+
#include "common/common_funcs.h"
#include "common/common_types.h"
#include "core/arm/arm_interface.h"
@@ -10,7 +12,7 @@
namespace Core {
-class ARM_NCE;
+class ArmNce;
class System;
struct HostContext {
@@ -33,9 +35,9 @@ struct GuestContext {
u64 tpidr_el0{};
std::atomic<u64> esr_el1{};
u32 nzcv{};
- u32 svc_swi{};
+ u32 svc{};
System* system{};
- ARM_NCE* parent{};
+ ArmNce* parent{};
};
// Verify assembly offsets.
diff --git a/src/core/arm/nce/patcher.cpp b/src/core/arm/nce/patcher.cpp
index ec8527224..f97b909df 100644
--- a/src/core/arm/nce/patcher.cpp
+++ b/src/core/arm/nce/patcher.cpp
@@ -278,7 +278,7 @@ void Patcher::WriteSvcTrampoline(ModuleDestLabel module_dest, u32 svc_id) {
// Store SVC number to execute when we return
c.MOV(X2, svc_id);
- c.STR(W2, X1, offsetof(GuestContext, svc_swi));
+ c.STR(W2, X1, offsetof(GuestContext, svc));
// We are calling a SVC. Clear esr_el1 and return it.
static_assert(std::is_same_v<std::underlying_type_t<HaltReason>, u64>);
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-10 19:14:11 +0100