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-rw-r--r--src/core/arm/dyncom/arm_dyncom_thumb.cpp17
1 files changed, 13 insertions, 4 deletions
diff --git a/src/core/arm/dyncom/arm_dyncom_thumb.cpp b/src/core/arm/dyncom/arm_dyncom_thumb.cpp
index 29272fd5d..3576370d1 100644
--- a/src/core/arm/dyncom/arm_dyncom_thumb.cpp
+++ b/src/core/arm/dyncom/arm_dyncom_thumb.cpp
@@ -2,6 +2,8 @@
// Licensed under GPLv2 or any later version
// Refer to the license.txt file included.
+#include <cstddef>
+
// We can provide simple Thumb simulation by decoding the Thumb instruction into its corresponding
// ARM instruction, and using the existing ARM simulator.
@@ -293,15 +295,22 @@ ThumbDecodeStatus TranslateThumbInstruction(u32 addr, u32 instr, u32* ainstr, u3
| (BIT(tinstr, 4) << 18); // enable bit
}
} else if ((tinstr & 0x0F00) == 0x0a00) {
- static const u32 subset[3] = {
+ static const u32 subset[4] = {
0xE6BF0F30, // REV
0xE6BF0FB0, // REV16
+ 0, // undefined
0xE6FF0FB0, // REVSH
};
- *ainstr = subset[BITS(tinstr, 6, 7)] // base
- | (BITS(tinstr, 0, 2) << 12) // Rd
- | BITS(tinstr, 3, 5); // Rm
+ size_t subset_index = BITS(tinstr, 6, 7);
+
+ if (subset_index == 2) {
+ valid = ThumbDecodeStatus::UNDEFINED;
+ } else {
+ *ainstr = subset[subset_index] // base
+ | (BITS(tinstr, 0, 2) << 12) // Rd
+ | BITS(tinstr, 3, 5); // Rm
+ }
} else {
static const u32 subset[4] = {
0xE92D0000, // STMDB sp!,{rlist}