diff options
| author | ReinUsesLisp <reinuseslisp@airmail.cc> | 2020-06-30 09:31:48 +0200 |
|---|---|---|
| committer | ReinUsesLisp <reinuseslisp@airmail.cc> | 2020-07-13 06:01:09 +0200 |
| commit | 977d6c46f334493852c5c31ff824a871e94188a1 (patch) | |
| tree | d7a9105d1bd9d93b8f0b2dc6a66c188b9e14d89a /src/video_core/surface.h | |
| parent | video_core: Implement RG32_SINT render target (diff) | |
| download | yuzu-977d6c46f334493852c5c31ff824a871e94188a1.tar yuzu-977d6c46f334493852c5c31ff824a871e94188a1.tar.gz yuzu-977d6c46f334493852c5c31ff824a871e94188a1.tar.bz2 yuzu-977d6c46f334493852c5c31ff824a871e94188a1.tar.lz yuzu-977d6c46f334493852c5c31ff824a871e94188a1.tar.xz yuzu-977d6c46f334493852c5c31ff824a871e94188a1.tar.zst yuzu-977d6c46f334493852c5c31ff824a871e94188a1.zip | |
Diffstat (limited to 'src/video_core/surface.h')
| -rw-r--r-- | src/video_core/surface.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/video_core/surface.h b/src/video_core/surface.h index 3e9dd797a..6f3162986 100644 --- a/src/video_core/surface.h +++ b/src/video_core/surface.h @@ -17,6 +17,7 @@ namespace VideoCore::Surface { enum class PixelFormat { ABGR8U, ABGR8S, + ABGR8I, ABGR8UI, B5G6R5U, A2B10G10R10U, @@ -136,6 +137,7 @@ enum class SurfaceTarget { constexpr std::array<u32, MaxPixelFormat> compression_factor_shift_table = {{ 0, // ABGR8U 0, // ABGR8S + 0, // ABGR8I 0, // ABGR8UI 0, // B5G6R5U 0, // A2B10G10R10U @@ -239,6 +241,7 @@ inline constexpr u32 GetCompressionFactor(PixelFormat format) { constexpr std::array<u32, MaxPixelFormat> block_width_table = {{ 1, // ABGR8U 1, // ABGR8S + 1, // ABGR8I 1, // ABGR8UI 1, // B5G6R5U 1, // A2B10G10R10U @@ -334,6 +337,7 @@ static constexpr u32 GetDefaultBlockWidth(PixelFormat format) { constexpr std::array<u32, MaxPixelFormat> block_height_table = {{ 1, // ABGR8U 1, // ABGR8S + 1, // ABGR8I 1, // ABGR8UI 1, // B5G6R5U 1, // A2B10G10R10U @@ -429,6 +433,7 @@ static constexpr u32 GetDefaultBlockHeight(PixelFormat format) { constexpr std::array<u32, MaxPixelFormat> bpp_table = {{ 32, // ABGR8U 32, // ABGR8S + 32, // ABGR8I 32, // ABGR8UI 16, // B5G6R5U 32, // A2B10G10R10U |