summaryrefslogtreecommitdiffstats
path: root/src/video_core/shader
diff options
context:
space:
mode:
authorFernando Sahmkow <fsahmkow27@gmail.com>2019-10-08 18:00:44 +0200
committerGitHub <noreply@github.com>2019-10-08 18:00:44 +0200
commit971870b89d36c41c1c170a978a36200bb829167e (patch)
treef151ac58d839f30b571b68c01776901f08b94254 /src/video_core/shader
parentMerge pull request #2890 from Morph1984/hid_deactivatenpad (diff)
parentshader/half_set_predicate: Fix HSETP2 for constant buffers (diff)
downloadyuzu-971870b89d36c41c1c170a978a36200bb829167e.tar
yuzu-971870b89d36c41c1c170a978a36200bb829167e.tar.gz
yuzu-971870b89d36c41c1c170a978a36200bb829167e.tar.bz2
yuzu-971870b89d36c41c1c170a978a36200bb829167e.tar.lz
yuzu-971870b89d36c41c1c170a978a36200bb829167e.tar.xz
yuzu-971870b89d36c41c1c170a978a36200bb829167e.tar.zst
yuzu-971870b89d36c41c1c170a978a36200bb829167e.zip
Diffstat (limited to 'src/video_core/shader')
-rw-r--r--src/video_core/shader/decode/half_set_predicate.cpp5
1 files changed, 4 insertions, 1 deletions
diff --git a/src/video_core/shader/decode/half_set_predicate.cpp b/src/video_core/shader/decode/half_set_predicate.cpp
index 840694527..fec8f2dbe 100644
--- a/src/video_core/shader/decode/half_set_predicate.cpp
+++ b/src/video_core/shader/decode/half_set_predicate.cpp
@@ -4,6 +4,7 @@
#include "common/assert.h"
#include "common/common_types.h"
+#include "common/logging/log.h"
#include "video_core/engines/shader_bytecode.h"
#include "video_core/shader/node_helper.h"
#include "video_core/shader/shader_ir.h"
@@ -18,7 +19,7 @@ u32 ShaderIR::DecodeHalfSetPredicate(NodeBlock& bb, u32 pc) {
const Instruction instr = {program_code[pc]};
const auto opcode = OpCode::Decode(instr);
- DEBUG_ASSERT(instr.hsetp2.ftz == 0);
+ LOG_DEBUG(HW_GPU, "ftz={}", static_cast<u32>(instr.hsetp2.ftz));
Node op_a = UnpackHalfFloat(GetRegister(instr.gpr8), instr.hsetp2.type_a);
op_a = GetOperandAbsNegHalf(op_a, instr.hsetp2.abs_a, instr.hsetp2.negate_a);
@@ -32,6 +33,8 @@ u32 ShaderIR::DecodeHalfSetPredicate(NodeBlock& bb, u32 pc) {
h_and = instr.hsetp2.cbuf_and_imm.h_and;
op_b = GetOperandAbsNegHalf(GetConstBuffer(instr.cbuf34.index, instr.cbuf34.GetOffset()),
instr.hsetp2.cbuf.abs_b, instr.hsetp2.cbuf.negate_b);
+ // F32 is hardcoded in hardware
+ op_b = UnpackHalfFloat(std::move(op_b), Tegra::Shader::HalfType::F32);
break;
case OpCode::Id::HSETP2_IMM:
cond = instr.hsetp2.cbuf_and_imm.cond;