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| author | ReinUsesLisp <reinuseslisp@airmail.cc> | 2020-06-12 02:24:45 +0200 |
|---|---|---|
| committer | ReinUsesLisp <reinuseslisp@airmail.cc> | 2020-09-06 10:28:48 +0200 |
| commit | 9e871937250cb92a13336c6c06186c41f19e1738 (patch) | |
| tree | 5151b85f8c4c26e7a5971b32584723f9910ea67b /src/video_core/shader/memory_util.h | |
| parent | Merge pull request #4596 from FearlessTobi/port-5495 (diff) | |
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Diffstat (limited to 'src/video_core/shader/memory_util.h')
| -rw-r--r-- | src/video_core/shader/memory_util.h | 6 |
1 files changed, 1 insertions, 5 deletions
diff --git a/src/video_core/shader/memory_util.h b/src/video_core/shader/memory_util.h index be90d24fd..4624d38e6 100644 --- a/src/video_core/shader/memory_util.h +++ b/src/video_core/shader/memory_util.h @@ -11,10 +11,6 @@ #include "video_core/engines/maxwell_3d.h" #include "video_core/engines/shader_type.h" -namespace Core { -class System; -} - namespace Tegra { class MemoryManager; } @@ -27,7 +23,7 @@ constexpr u32 STAGE_MAIN_OFFSET = 10; constexpr u32 KERNEL_MAIN_OFFSET = 0; /// Gets the address for the specified shader stage program -GPUVAddr GetShaderAddress(Core::System& system, +GPUVAddr GetShaderAddress(Tegra::Engines::Maxwell3D& maxwell3d, Tegra::Engines::Maxwell3D::Regs::ShaderProgram program); /// Gets if the current instruction offset is a scheduler instruction |