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| author | Fernando Sahmkow <fsahmkow27@gmail.com> | 2019-11-12 15:07:22 +0100 |
|---|---|---|
| committer | FernandoS27 <fsahmkow27@gmail.com> | 2019-11-14 16:15:27 +0100 |
| commit | f3d1b370aa0fd614cf28f8a609b70906d40da751 (patch) | |
| tree | 028b5f4b34c30d477e6989b49540db508a8db075 /src/video_core/shader/decode | |
| parent | Shader_Bytecode: Add encodings for FLO, SHF and TXD (diff) | |
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Diffstat (limited to 'src/video_core/shader/decode')
| -rw-r--r-- | src/video_core/shader/decode/arithmetic_integer.cpp | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/src/video_core/shader/decode/arithmetic_integer.cpp b/src/video_core/shader/decode/arithmetic_integer.cpp index a33d242e9..9208b7bef 100644 --- a/src/video_core/shader/decode/arithmetic_integer.cpp +++ b/src/video_core/shader/decode/arithmetic_integer.cpp @@ -130,6 +130,24 @@ u32 ShaderIR::DecodeArithmeticInteger(NodeBlock& bb, u32 pc) { SetRegister(bb, instr.gpr0, value); break; } + case OpCode::Id::FLO_R: + case OpCode::Id::FLO_C: + case OpCode::Id::FLO_IMM: { + Node value; + if (instr.flo.invert) { + op_b = Operation(OperationCode::IBitwiseNot, NO_PRECISE, op_b); + } + if (instr.flo.is_signed) { + value = Operation(OperationCode::IBitMSB, NO_PRECISE, op_b); + } else { + value = Operation(OperationCode::UBitMSB, NO_PRECISE, op_b); + } + if (instr.flo.sh) { + value = Operation(OperationCode::UBitwiseXor, NO_PRECISE, value, Immediate(31)); + } + SetRegister(bb, instr.gpr0, value); + break; + } case OpCode::Id::SEL_C: case OpCode::Id::SEL_R: case OpCode::Id::SEL_IMM: { |