summaryrefslogtreecommitdiffstats
path: root/src/video_core/shader/decode/arithmetic_integer.cpp
diff options
context:
space:
mode:
authorFernando Sahmkow <fsahmkow27@gmail.com>2019-09-20 17:41:05 +0200
committerFernandoS27 <fsahmkow27@gmail.com>2019-09-21 20:28:03 +0200
commit527b841c1567fd7552153eea0fdcee119e44c53f (patch)
treeaa5d794c410047132b1be95bdab66b966fb0b8f6 /src/video_core/shader/decode/arithmetic_integer.cpp
parentShader_IR: Implement ICMP. (diff)
downloadyuzu-527b841c1567fd7552153eea0fdcee119e44c53f.tar
yuzu-527b841c1567fd7552153eea0fdcee119e44c53f.tar.gz
yuzu-527b841c1567fd7552153eea0fdcee119e44c53f.tar.bz2
yuzu-527b841c1567fd7552153eea0fdcee119e44c53f.tar.lz
yuzu-527b841c1567fd7552153eea0fdcee119e44c53f.tar.xz
yuzu-527b841c1567fd7552153eea0fdcee119e44c53f.tar.zst
yuzu-527b841c1567fd7552153eea0fdcee119e44c53f.zip
Diffstat (limited to 'src/video_core/shader/decode/arithmetic_integer.cpp')
-rw-r--r--src/video_core/shader/decode/arithmetic_integer.cpp15
1 files changed, 9 insertions, 6 deletions
diff --git a/src/video_core/shader/decode/arithmetic_integer.cpp b/src/video_core/shader/decode/arithmetic_integer.cpp
index 1aa21010a..b73f6536e 100644
--- a/src/video_core/shader/decode/arithmetic_integer.cpp
+++ b/src/video_core/shader/decode/arithmetic_integer.cpp
@@ -140,11 +140,11 @@ u32 ShaderIR::DecodeArithmeticInteger(NodeBlock& bb, u32 pc) {
}
case OpCode::Id::ICMP_CR:
case OpCode::Id::ICMP_R:
- case OpCode::Id::ICMP_RC: {
- UNIMPLEMENTED_IF(instr.icmp.is_signed != 0);
+ case OpCode::Id::ICMP_RC:
+ case OpCode::Id::ICMP_IMM: {
const Node zero = Immediate(0);
- const auto [op_a, op_b] = [&]() -> std::tuple<Node, Node> {
+ const auto [op_b, test] = [&]() -> std::pair<Node, Node> {
switch (opcode->get().GetId()) {
case OpCode::Id::ICMP_CR:
return {GetConstBuffer(instr.cbuf34.index, instr.cbuf34.offset),
@@ -154,13 +154,16 @@ u32 ShaderIR::DecodeArithmeticInteger(NodeBlock& bb, u32 pc) {
case OpCode::Id::ICMP_RC:
return {GetRegister(instr.gpr39),
GetConstBuffer(instr.cbuf34.index, instr.cbuf34.offset)};
+ case OpCode::Id::ICMP_IMM:
+ return {Immediate(instr.alu.GetSignedImm20_20()), GetRegister(instr.gpr39)};
default:
- UNIMPLEMENTED();
+ UNREACHABLE();
return {zero, zero};
}
}();
- const Node test = GetRegister(instr.gpr8);
- const Node comparison = GetPredicateComparisonInteger(instr.icmp.cond, false, test, zero);
+ const Node op_a = GetRegister(instr.gpr8);
+ const Node comparison =
+ GetPredicateComparisonInteger(instr.icmp.cond, instr.icmp.is_signed != 0, test, zero);
SetRegister(bb, instr.gpr0, Operation(OperationCode::Select, comparison, op_a, op_b));
break;
}