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authorReinUsesLisp <reinuseslisp@airmail.cc>2019-11-04 06:24:58 +0100
committerReinUsesLisp <reinuseslisp@airmail.cc>2019-11-07 05:43:38 +0100
commit39c66abd91c62f95361e63bacd253027e7617022 (patch)
treeace064fa6726873e6b473068a0f062d0e71eb4e3 /src/video_core/shader/decode/arithmetic_half_immediate.cpp
parentshader/arithmetic: Reduce RRO stub severity (diff)
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Diffstat (limited to 'src/video_core/shader/decode/arithmetic_half_immediate.cpp')
-rw-r--r--src/video_core/shader/decode/arithmetic_half_immediate.cpp8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/video_core/shader/decode/arithmetic_half_immediate.cpp b/src/video_core/shader/decode/arithmetic_half_immediate.cpp
index 6466fc011..d179b9873 100644
--- a/src/video_core/shader/decode/arithmetic_half_immediate.cpp
+++ b/src/video_core/shader/decode/arithmetic_half_immediate.cpp
@@ -19,12 +19,12 @@ u32 ShaderIR::DecodeArithmeticHalfImmediate(NodeBlock& bb, u32 pc) {
const auto opcode = OpCode::Decode(instr);
if (opcode->get().GetId() == OpCode::Id::HADD2_IMM) {
- if (instr.alu_half_imm.ftz != 0) {
- LOG_WARNING(HW_GPU, "{} FTZ not implemented", opcode->get().GetName());
+ if (instr.alu_half_imm.ftz == 0) {
+ LOG_DEBUG(HW_GPU, "{} without FTZ is not implemented", opcode->get().GetName());
}
} else {
- if (instr.alu_half_imm.precision != Tegra::Shader::HalfPrecision::None) {
- LOG_WARNING(HW_GPU, "{} FTZ not implemented", opcode->get().GetName());
+ if (instr.alu_half_imm.precision != Tegra::Shader::HalfPrecision::FTZ) {
+ LOG_DEBUG(HW_GPU, "{} without FTZ is not implemented", opcode->get().GetName());
}
}