summaryrefslogtreecommitdiffstats
path: root/src/shader_recompiler/backend/spirv/emit_spirv_memory.cpp
diff options
context:
space:
mode:
authorLiam <byteslice@airmail.cc>2024-01-11 22:50:59 +0100
committerLiam <byteslice@airmail.cc>2024-01-11 22:50:59 +0100
commit2a0d707ce1d4880dfcbd34c4d6572917a501f675 (patch)
tree5fd1b7b46158198917e7cc566c8b35f5f8081ef3 /src/shader_recompiler/backend/spirv/emit_spirv_memory.cpp
parentMerge pull request #12639 from liamwhite/format-oops (diff)
downloadyuzu-2a0d707ce1d4880dfcbd34c4d6572917a501f675.tar
yuzu-2a0d707ce1d4880dfcbd34c4d6572917a501f675.tar.gz
yuzu-2a0d707ce1d4880dfcbd34c4d6572917a501f675.tar.bz2
yuzu-2a0d707ce1d4880dfcbd34c4d6572917a501f675.tar.lz
yuzu-2a0d707ce1d4880dfcbd34c4d6572917a501f675.tar.xz
yuzu-2a0d707ce1d4880dfcbd34c4d6572917a501f675.tar.zst
yuzu-2a0d707ce1d4880dfcbd34c4d6572917a501f675.zip
Diffstat (limited to 'src/shader_recompiler/backend/spirv/emit_spirv_memory.cpp')
-rw-r--r--src/shader_recompiler/backend/spirv/emit_spirv_memory.cpp40
1 files changed, 32 insertions, 8 deletions
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_memory.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_memory.cpp
index 8693801c7..bdcbccfde 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv_memory.cpp
+++ b/src/shader_recompiler/backend/spirv/emit_spirv_memory.cpp
@@ -65,6 +65,14 @@ void WriteStorage32(EmitContext& ctx, const IR::Value& binding, const IR::Value&
WriteStorage(ctx, binding, offset, value, ctx.storage_types.U32, sizeof(u32),
&StorageDefinitions::U32, index_offset);
}
+
+void WriteStorageByCasLoop(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
+ Id value, Id bit_offset, Id bit_count) {
+ const Id pointer{StoragePointer(ctx, binding, offset, ctx.storage_types.U32, sizeof(u32),
+ &StorageDefinitions::U32)};
+ ctx.OpFunctionCall(ctx.TypeVoid(), ctx.write_storage_cas_loop_func, pointer, value, bit_offset,
+ bit_count);
+}
} // Anonymous namespace
void EmitLoadGlobalU8(EmitContext&) {
@@ -219,26 +227,42 @@ Id EmitLoadStorage128(EmitContext& ctx, const IR::Value& binding, const IR::Valu
void EmitWriteStorageU8(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
Id value) {
- WriteStorage(ctx, binding, offset, ctx.OpSConvert(ctx.U8, value), ctx.storage_types.U8,
- sizeof(u8), &StorageDefinitions::U8);
+ if (ctx.profile.support_int8) {
+ WriteStorage(ctx, binding, offset, ctx.OpSConvert(ctx.U8, value), ctx.storage_types.U8,
+ sizeof(u8), &StorageDefinitions::U8);
+ } else {
+ WriteStorageByCasLoop(ctx, binding, offset, value, ctx.BitOffset8(offset), ctx.Const(8u));
+ }
}
void EmitWriteStorageS8(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
Id value) {
- WriteStorage(ctx, binding, offset, ctx.OpSConvert(ctx.S8, value), ctx.storage_types.S8,
- sizeof(s8), &StorageDefinitions::S8);
+ if (ctx.profile.support_int8) {
+ WriteStorage(ctx, binding, offset, ctx.OpSConvert(ctx.S8, value), ctx.storage_types.S8,
+ sizeof(s8), &StorageDefinitions::S8);
+ } else {
+ WriteStorageByCasLoop(ctx, binding, offset, value, ctx.BitOffset8(offset), ctx.Const(8u));
+ }
}
void EmitWriteStorageU16(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
Id value) {
- WriteStorage(ctx, binding, offset, ctx.OpSConvert(ctx.U16, value), ctx.storage_types.U16,
- sizeof(u16), &StorageDefinitions::U16);
+ if (ctx.profile.support_int16) {
+ WriteStorage(ctx, binding, offset, ctx.OpSConvert(ctx.U16, value), ctx.storage_types.U16,
+ sizeof(u16), &StorageDefinitions::U16);
+ } else {
+ WriteStorageByCasLoop(ctx, binding, offset, value, ctx.BitOffset16(offset), ctx.Const(16u));
+ }
}
void EmitWriteStorageS16(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
Id value) {
- WriteStorage(ctx, binding, offset, ctx.OpSConvert(ctx.S16, value), ctx.storage_types.S16,
- sizeof(s16), &StorageDefinitions::S16);
+ if (ctx.profile.support_int16) {
+ WriteStorage(ctx, binding, offset, ctx.OpSConvert(ctx.S16, value), ctx.storage_types.S16,
+ sizeof(s16), &StorageDefinitions::S16);
+ } else {
+ WriteStorageByCasLoop(ctx, binding, offset, value, ctx.BitOffset16(offset), ctx.Const(16u));
+ }
}
void EmitWriteStorage32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,