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| author | ReinUsesLisp <reinuseslisp@airmail.cc> | 2021-02-22 06:45:50 +0100 |
|---|---|---|
| committer | ameerj <52414509+ameerj@users.noreply.github.com> | 2021-07-23 03:51:22 +0200 |
| commit | 18a766b3622baa40596490dbd4912f94e9980a76 (patch) | |
| tree | de34dbbbd81f6f980308b165a812445b224bd8fb /src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp | |
| parent | spirv: Fixes and Intel specific workarounds (diff) | |
| download | yuzu-18a766b3622baa40596490dbd4912f94e9980a76.tar yuzu-18a766b3622baa40596490dbd4912f94e9980a76.tar.gz yuzu-18a766b3622baa40596490dbd4912f94e9980a76.tar.bz2 yuzu-18a766b3622baa40596490dbd4912f94e9980a76.tar.lz yuzu-18a766b3622baa40596490dbd4912f94e9980a76.tar.xz yuzu-18a766b3622baa40596490dbd4912f94e9980a76.tar.zst yuzu-18a766b3622baa40596490dbd4912f94e9980a76.zip | |
Diffstat (limited to '')
| -rw-r--r-- | src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp index 4c0b5990d..329dcb351 100644 --- a/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp +++ b/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp @@ -58,12 +58,12 @@ Id EmitIMul32(EmitContext& ctx, Id a, Id b) { return ctx.OpIMul(ctx.U32[1], a, b); } -void EmitINeg32(EmitContext&) { - throw NotImplementedException("SPIR-V Instruction"); +Id EmitINeg32(EmitContext& ctx, Id value) { + return ctx.OpSNegate(ctx.U32[1], value); } -void EmitIAbs32(EmitContext&) { - throw NotImplementedException("SPIR-V Instruction"); +Id EmitIAbs32(EmitContext& ctx, Id value) { + return ctx.OpSAbs(ctx.U32[1], value); } Id EmitShiftLeftLogical32(EmitContext& ctx, Id base, Id shift) { |