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authorameerj <52414509+ameerj@users.noreply.github.com>2021-05-21 08:00:12 +0200
committerameerj <52414509+ameerj@users.noreply.github.com>2021-07-23 03:51:35 +0200
commite221baccddea3c0802c97e7f6f60c0c3e6a72b60 (patch)
tree4a94c1d2b662b2d7ace703334c41c575fc644510 /src/shader_recompiler/backend/glsl/reg_alloc.cpp
parentglsl: Fix program linking and cbuf (diff)
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Diffstat (limited to '')
-rw-r--r--src/shader_recompiler/backend/glsl/reg_alloc.cpp52
1 files changed, 34 insertions, 18 deletions
diff --git a/src/shader_recompiler/backend/glsl/reg_alloc.cpp b/src/shader_recompiler/backend/glsl/reg_alloc.cpp
index 5fdad5acb..5ad1872db 100644
--- a/src/shader_recompiler/backend/glsl/reg_alloc.cpp
+++ b/src/shader_recompiler/backend/glsl/reg_alloc.cpp
@@ -13,7 +13,6 @@
#pragma optimize("", off)
namespace Shader::Backend::GLSL {
namespace {
-constexpr std::string_view SWIZZLE = "xyzw";
std::string Representation(Id id) {
if (id.is_condition_code != 0) {
@@ -22,7 +21,6 @@ std::string Representation(Id id) {
if (id.is_spill != 0) {
throw NotImplementedException("Spilling");
}
- const u32 num_elements{id.num_elements_minus_one + 1};
const u32 index{static_cast<u32>(id.index)};
return fmt::format("R{}", index);
}
@@ -45,10 +43,11 @@ std::string MakeImm(const IR::Value& value) {
}
} // Anonymous namespace
-std::string RegAlloc::Define(IR::Inst& inst, u32 num_elements, u32 alignment) {
- const Id id{Alloc(num_elements, alignment)};
+std::string RegAlloc::Define(IR::Inst& inst, Type type) {
+ const Id id{Alloc()};
+ const auto type_str{GetType(type, id.index)};
inst.SetDefinition<Id>(id);
- return Representation(id);
+ return type_str + Representation(id);
}
std::string RegAlloc::Consume(const IR::Value& value) {
@@ -65,20 +64,37 @@ std::string RegAlloc::Consume(IR::Inst& inst) {
return Representation(inst.Definition<Id>());
}
-Id RegAlloc::Alloc(u32 num_elements, [[maybe_unused]] u32 alignment) {
- for (size_t reg = 0; reg < NUM_REGS; ++reg) {
- if (register_use[reg]) {
- continue;
+std::string RegAlloc::GetType(Type type, u32 index) {
+ if (register_defined[index]) {
+ return "";
+ }
+ register_defined[index] = true;
+ switch (type) {
+ case Type::U32:
+ return "uint ";
+ case Type::S32:
+ return "int ";
+ case Type::F32:
+ return "float ";
+ default:
+ return "";
+ }
+}
+
+Id RegAlloc::Alloc() {
+ if (num_used_registers < NUM_REGS) {
+ for (size_t reg = 0; reg < NUM_REGS; ++reg) {
+ if (register_use[reg]) {
+ continue;
+ }
+ register_use[reg] = true;
+ Id ret{};
+ ret.index.Assign(static_cast<u32>(reg));
+ ret.is_long.Assign(0);
+ ret.is_spill.Assign(0);
+ ret.is_condition_code.Assign(0);
+ return ret;
}
- num_used_registers = std::max(num_used_registers, reg + 1);
- register_use[reg] = true;
- return Id{
- .base_element = 0,
- .num_elements_minus_one = num_elements - 1,
- .index = static_cast<u32>(reg),
- .is_spill = 0,
- .is_condition_code = 0,
- };
}
throw NotImplementedException("Register spilling");
}