2 files changed, 53 insertions, 47 deletions

diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp
index a35c5c8dc..1af684fe3 100644
--- a/src/core/arm/interpreter/armemu.cpp
+++ b/src/core/arm/interpreter/armemu.cpp
@@ -5536,14 +5536,15 @@ Handle_Load_Double (ARMul_State * state, ARMword instr)
         addr = base;
 
     /* The address must be aligned on a 8 byte boundary.  */
-    if (addr & 0x7) {
-#ifdef ABORTS
-        ARMul_DATAABORT (addr);
-#else
-        ARMul_UndefInstr (state, instr);
-#endif
-        return;
-    }
+    // FIX(Normatt): Disable strict alignment on LDRD/STRD
+//    if (addr & 0x7) {
+//#ifdef ABORTS
+//        ARMul_DATAABORT (addr);
+//#else
+//        ARMul_UndefInstr (state, instr);
+//#endif
+//        return;
+//    }
 
     /* For pre indexed or post indexed addressing modes,
        check that the destination registers do not overlap
@@ -5640,14 +5641,15 @@ Handle_Store_Double (ARMul_State * state, ARMword instr)
         addr = base;
 
     /* The address must be aligned on a 8 byte boundary.  */
-    if (addr & 0x7) {
-#ifdef ABORTS
-        ARMul_DATAABORT (addr);
-#else
-        ARMul_UndefInstr (state, instr);
-#endif
-        return;
-    }
+    // FIX(Normatt): Disable strict alignment on LDRD/STRD
+//    if (addr & 0x7) {
+//#ifdef ABORTS
+//        ARMul_DATAABORT (addr);
+//#else
+//        ARMul_UndefInstr (state, instr);
+//#endif
+//        return;
+//    }
 
     /* For pre indexed or post indexed addressing modes,
        check that the destination registers do not overlap
@@ -6405,6 +6407,8 @@ handle_v6_insn (ARMul_State * state, ARMword instr)
         if (state->Aborted) {
             TAKEABORT;
         }
+        // FIX(Normmatt): Handle RD in STREX/STREXB
+        state->Reg[DESTReg] = 0; //Always succeed
 
         return 1;
      }
@@ -6432,7 +6436,8 @@ handle_v6_insn (ARMul_State * state, ARMword instr)
         if (state->Aborted) {
             TAKEABORT;
         }
-
+        // FIX(Normmatt): Handle RD in STREX/STREXB
+        state->Reg[DESTReg] = 0; //Always succeed
         //printf("In %s, strexb not implemented\n", __FUNCTION__);
         UNDEF_LSRBPC;
         /* WRITESDEST (dest); */
diff --git a/src/core/arm/interpreter/armsupp.cpp b/src/core/arm/interpreter/armsupp.cpp
index b2bbedc18..e531dceda 100644
--- a/src/core/arm/interpreter/armsupp.cpp
+++ b/src/core/arm/interpreter/armsupp.cpp
@@ -20,7 +20,7 @@
 
 //#include "ansidecl.h"
 #include "skyeye_defs.h"
-#include "core/hle/mrc.h"
+#include "core/hle/coprocessor.h"
 #include "core/arm/disassembler/arm_disasm.h"
 
 unsigned xscale_cp15_cp_access_allowed (ARMul_State * state, unsigned reg,
@@ -661,39 +661,40 @@ ARMul_STC (ARMul_State * state, ARMword instr, ARMword address)
 void
 ARMul_MCR (ARMul_State * state, ARMword instr, ARMword source)
 {
-	unsigned cpab;
+    HLE::CallMCR(instr, source);
+	//unsigned cpab;
 
-	//printf("SKYEYE ARMul_MCR, CPnum is %x, source %x\n",CPNum, source);
-	if (!CP_ACCESS_ALLOWED (state, CPNum)) {
-		//chy 2004-07-19 should fix in the future ????!!!!
-		//printf("SKYEYE ARMul_MCR, ACCESS_not ALLOWed, UndefinedInstr  CPnum is %x, source %x\n",CPNum, source);
-		ARMul_UndefInstr (state, instr);
-		return;
-	}
+	////printf("SKYEYE ARMul_MCR, CPnum is %x, source %x\n",CPNum, source);
+	//if (!CP_ACCESS_ALLOWED (state, CPNum)) {
+	//	//chy 2004-07-19 should fix in the future ????!!!!
+	//	//printf("SKYEYE ARMul_MCR, ACCESS_not ALLOWed, UndefinedInstr  CPnum is %x, source %x\n",CPNum, source);
+	//	ARMul_UndefInstr (state, instr);
+	//	return;
+	//}
 
-	cpab = (state->MCR[CPNum]) (state, ARMul_FIRST, instr, source);
+	//cpab = (state->MCR[CPNum]) (state, ARMul_FIRST, instr, source);
 
-	while (cpab == ARMul_BUSY) {
-		ARMul_Icycles (state, 1, 0);
+	//while (cpab == ARMul_BUSY) {
+	//	ARMul_Icycles (state, 1, 0);
 
-		if (IntPending (state)) {
-			cpab = (state->MCR[CPNum]) (state, ARMul_INTERRUPT,
-						    instr, 0);
-			return;
-		}
-		else
-			cpab = (state->MCR[CPNum]) (state, ARMul_BUSY, instr,
-						    source);
-	}
+	//	if (IntPending (state)) {
+	//		cpab = (state->MCR[CPNum]) (state, ARMul_INTERRUPT,
+	//					    instr, 0);
+	//		return;
+	//	}
+	//	else
+	//		cpab = (state->MCR[CPNum]) (state, ARMul_BUSY, instr,
+	//					    source);
+	//}
 
-	if (cpab == ARMul_CANT) {
-		printf ("SKYEYE ARMul_MCR, CANT, UndefinedInstr %x CPnum is %x, source %x\n", instr, CPNum, source);
-		ARMul_Abort (state, ARMul_UndefinedInstrV);
-	}
-	else {
-		BUSUSEDINCPCN;
-		ARMul_Ccycles (state, 1, 0);
-	}
+	//if (cpab == ARMul_CANT) {
+	//	printf ("SKYEYE ARMul_MCR, CANT, UndefinedInstr %x CPnum is %x, source %x\n", instr, CPNum, source);
+	//	ARMul_Abort (state, ARMul_UndefinedInstrV);
+	//}
+	//else {
+	//	BUSUSEDINCPCN;
+	//	ARMul_Ccycles (state, 1, 0);
+	//}
 }
 
 /* This function does the Busy-Waiting for an MCRR instruction.  */
@@ -739,7 +740,7 @@ ARMul_MRC (ARMul_State * state, ARMword instr)
 {
 	unsigned cpab;
 
-	ARMword result = HLE::CallMRC((HLE::ARM11_MRC_OPERATION)BITS(20, 27));
+	ARMword result = HLE::CallMRC(instr);
 
 	////printf("SKYEYE ARMul_MRC, CPnum is %x, instr %x\n",CPNum, instr);
 	//if (!CP_ACCESS_ALLOWED (state, CPNum)) {