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| author | Lioncash <mathew1800@gmail.com> | 2015-03-11 21:10:14 +0100 |
|---|---|---|
| committer | Lioncash <mathew1800@gmail.com> | 2015-03-17 20:13:32 +0100 |
| commit | 9fdb311d6e2d636c4599ddc3d4cb9adad6cec540 (patch) | |
| tree | 358501f8f2e31c7c27ee17c62996ef01e21354c7 /src/core/arm/interpreter | |
| parent | dyncom: Implement SETEND (diff) | |
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Diffstat (limited to 'src/core/arm/interpreter')
| -rw-r--r-- | src/core/arm/interpreter/armsupp.cpp | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/core/arm/interpreter/armsupp.cpp b/src/core/arm/interpreter/armsupp.cpp index ed4f6c2a2..aca2bfbbd 100644 --- a/src/core/arm/interpreter/armsupp.cpp +++ b/src/core/arm/interpreter/armsupp.cpp @@ -201,3 +201,9 @@ u32 ARMul_UnsignedSatQ(s32 value, u8 shift, bool* saturation_occurred) *saturation_occurred = false; return (u32)value; } + +// Whether or not the given CPU is in big endian mode (E bit is set) +bool InBigEndianMode(ARMul_State* cpu) +{ + return (cpu->Cpsr & (1 << 9)) != 0; +} |