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authorLioncash <mathew1800@gmail.com>2014-12-18 18:07:18 +0100
committerLioncash <mathew1800@gmail.com>2014-12-18 18:07:18 +0100
commiteaae0ad502f174823633c61c0cb934c434d1afb2 (patch)
tree78dec0b05c265ecbabe5d1167dff393e7163ce9f /src/core/arm/interpreter/armemu.cpp
parentMerge pull request #299 from lioncash/join (diff)
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Diffstat (limited to 'src/core/arm/interpreter/armemu.cpp')
-rw-r--r--src/core/arm/interpreter/armemu.cpp8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp
index b9ac8b9ad..522f9a1dd 100644
--- a/src/core/arm/interpreter/armemu.cpp
+++ b/src/core/arm/interpreter/armemu.cpp
@@ -6084,7 +6084,7 @@ L_stm_s_takeabort:
break;
}
- Rm = ((state->Reg[BITS(0, 3)] >> ror) & 0xFF) | ((state->Reg[BITS(0, 3)] << (32 - ror)) & 0xFF) & 0xFF;
+ Rm = ((state->Reg[BITS(0, 3)] >> ror) & 0xFF) | (((state->Reg[BITS(0, 3)] << (32 - ror)) & 0xFF) & 0xFF);
if (Rm & 0x80)
Rm |= 0xffffff00;
@@ -6129,7 +6129,7 @@ L_stm_s_takeabort:
if (ror == -1)
break;
- Rm = ((state->Reg[BITS(0, 3)] >> ror) & 0xFFFF) | ((state->Reg[BITS(0, 3)] << (32 - ror)) & 0xFFFF) & 0xFFFF;
+ Rm = ((state->Reg[BITS(0, 3)] >> ror) & 0xFFFF) | (((state->Reg[BITS(0, 3)] << (32 - ror)) & 0xFFFF) & 0xFFFF);
if (Rm & 0x8000)
Rm |= 0xffff0000;
@@ -6216,7 +6216,7 @@ L_stm_s_takeabort:
break;
}
- Rm = ((state->Reg[BITS(0, 3)] >> ror) & 0xFF) | ((state->Reg[BITS(0, 3)] << (32 - ror)) & 0xFF) & 0xFF;
+ Rm = ((state->Reg[BITS(0, 3)] >> ror) & 0xFF) | (((state->Reg[BITS(0, 3)] << (32 - ror)) & 0xFF) & 0xFF);
if (BITS(16, 19) == 0xf)
/* UXTB */
@@ -6260,7 +6260,7 @@ L_stm_s_takeabort:
if (ror == -1)
break;
- Rm = ((state->Reg[BITS(0, 3)] >> ror) & 0xFFFF) | ((state->Reg[BITS(0, 3)] << (32 - ror)) & 0xFFFF) & 0xFFFF;
+ Rm = ((state->Reg[BITS(0, 3)] >> ror) & 0xFFFF) | (((state->Reg[BITS(0, 3)] << (32 - ror)) & 0xFFFF) & 0xFFFF);
/* UXT */
/* state->Reg[BITS (12, 15)] = Rm; */