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authorWunkolo <Wunkolo@gmail.com>2022-03-10 03:11:46 +0100
committerWunkolo <Wunkolo@gmail.com>2022-03-11 19:27:00 +0100
commitd248c1203ea15992e6ca3a087a02fac76490deba (patch)
tree1a7900363e7ea6672f2a07b8fe077e2fb0c479e8 /src/common/x64
parentcommon/telemetry: Update `AddField` name type to `string_view` (diff)
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Diffstat (limited to 'src/common/x64')
-rw-r--r--src/common/x64/cpu_detect.cpp30
-rw-r--r--src/common/x64/cpu_detect.h21
2 files changed, 40 insertions, 11 deletions
diff --git a/src/common/x64/cpu_detect.cpp b/src/common/x64/cpu_detect.cpp
index 99d87f586..d81edb140 100644
--- a/src/common/x64/cpu_detect.cpp
+++ b/src/common/x64/cpu_detect.cpp
@@ -93,10 +93,14 @@ static CPUCaps Detect() {
caps.sse = Common::Bit<25>(cpu_id[3]);
caps.sse2 = Common::Bit<26>(cpu_id[3]);
caps.sse3 = Common::Bit<0>(cpu_id[2]);
+ caps.pclmulqdq = Common::Bit<1>(cpu_id[2]);
caps.ssse3 = Common::Bit<9>(cpu_id[2]);
caps.sse4_1 = Common::Bit<19>(cpu_id[2]);
caps.sse4_2 = Common::Bit<20>(cpu_id[2]);
+ caps.movbe = Common::Bit<22>(cpu_id[2]);
+ caps.popcnt = Common::Bit<23>(cpu_id[2]);
caps.aes = Common::Bit<25>(cpu_id[2]);
+ caps.f16c = Common::Bit<29>(cpu_id[2]);
// AVX support requires 3 separate checks:
// - Is the AVX bit set in CPUID?
@@ -112,16 +116,26 @@ static CPUCaps Detect() {
if (max_std_fn >= 7) {
__cpuidex(cpu_id, 0x00000007, 0x00000000);
- // Can't enable AVX2 unless the XSAVE/XGETBV checks above passed
- caps.avx2 = caps.avx && Common::Bit<5>(cpu_id[1]);
+ // Can't enable AVX{2,512} unless the XSAVE/XGETBV checks above passed
+ if (caps.avx) {
+ caps.avx2 = Common::Bit<5>(cpu_id[1]);
+ caps.avx512f = Common::Bit<16>(cpu_id[1]);
+ caps.avx512dq = Common::Bit<17>(cpu_id[1]);
+ caps.avx512cd = Common::Bit<28>(cpu_id[1]);
+ caps.avx512bw = Common::Bit<30>(cpu_id[1]);
+ caps.avx512vl = Common::Bit<31>(cpu_id[1]);
+ caps.avx512vbmi = Common::Bit<1>(cpu_id[2]);
+ caps.avx512bitalg = Common::Bit<12>(cpu_id[2]);
+ }
+
caps.bmi1 = Common::Bit<3>(cpu_id[1]);
caps.bmi2 = Common::Bit<8>(cpu_id[1]);
- // Checks for AVX512F, AVX512CD, AVX512VL, AVX512DQ, AVX512BW (Intel Skylake-X/SP)
- if (Common::Bit<16>(cpu_id[1]) && Common::Bit<28>(cpu_id[1]) &&
- Common::Bit<31>(cpu_id[1]) && Common::Bit<17>(cpu_id[1]) &&
- Common::Bit<30>(cpu_id[1])) {
- caps.avx512 = caps.avx2;
- }
+ caps.sha = Common::Bit<29>(cpu_id[1]);
+
+ caps.gfni = Common::Bit<8>(cpu_id[2]);
+
+ __cpuidex(cpu_id, 0x00000007, 0x00000001);
+ caps.avx_vnni = caps.avx && Common::Bit<4>(cpu_id[0]);
}
}
diff --git a/src/common/x64/cpu_detect.h b/src/common/x64/cpu_detect.h
index 3e6d808f3..40c48b132 100644
--- a/src/common/x64/cpu_detect.h
+++ b/src/common/x64/cpu_detect.h
@@ -35,16 +35,31 @@ struct CPUCaps {
bool ssse3 : 1;
bool sse4_1 : 1;
bool sse4_2 : 1;
- bool lzcnt : 1;
+
bool avx : 1;
+ bool avx_vnni : 1;
bool avx2 : 1;
- bool avx512 : 1;
+ bool avx512f : 1;
+ bool avx512dq : 1;
+ bool avx512cd : 1;
+ bool avx512bw : 1;
+ bool avx512vl : 1;
+ bool avx512vbmi : 1;
+ bool avx512bitalg : 1;
+
+ bool aes : 1;
bool bmi1 : 1;
bool bmi2 : 1;
+ bool f16c : 1;
bool fma : 1;
bool fma4 : 1;
- bool aes : 1;
+ bool gfni : 1;
bool invariant_tsc : 1;
+ bool lzcnt : 1;
+ bool movbe : 1;
+ bool pclmulqdq : 1;
+ bool popcnt : 1;
+ bool sha : 1;
};
/**