From c8fe8247ee8a8e236680f033dac132c76a15a319 Mon Sep 17 00:00:00 2001 From: bunnei Date: Thu, 28 Jan 2021 21:50:39 -0800 Subject: arm: dynarmic: Reintroduce JIT checks on SaveContext/LoadContext. --- src/core/arm/dynarmic/arm_dynarmic_32.cpp | 6 ++++++ src/core/arm/dynarmic/arm_dynarmic_64.cpp | 6 ++++++ 2 files changed, 12 insertions(+) (limited to 'src') diff --git a/src/core/arm/dynarmic/arm_dynarmic_32.cpp b/src/core/arm/dynarmic/arm_dynarmic_32.cpp index 6c4c8e9e4..c650a4dfb 100644 --- a/src/core/arm/dynarmic/arm_dynarmic_32.cpp +++ b/src/core/arm/dynarmic/arm_dynarmic_32.cpp @@ -255,6 +255,9 @@ void ARM_Dynarmic_32::ChangeProcessorID(std::size_t new_core_id) { } void ARM_Dynarmic_32::SaveContext(ThreadContext32& ctx) { + if (!jit) { + return; + } Dynarmic::A32::Context context; jit->SaveContext(context); ctx.cpu_registers = context.Regs(); @@ -264,6 +267,9 @@ void ARM_Dynarmic_32::SaveContext(ThreadContext32& ctx) { } void ARM_Dynarmic_32::LoadContext(const ThreadContext32& ctx) { + if (!jit) { + return; + } Dynarmic::A32::Context context; context.Regs() = ctx.cpu_registers; context.ExtRegs() = ctx.extension_registers; diff --git a/src/core/arm/dynarmic/arm_dynarmic_64.cpp b/src/core/arm/dynarmic/arm_dynarmic_64.cpp index 4c5ebca22..ae5566ab8 100644 --- a/src/core/arm/dynarmic/arm_dynarmic_64.cpp +++ b/src/core/arm/dynarmic/arm_dynarmic_64.cpp @@ -294,6 +294,9 @@ void ARM_Dynarmic_64::ChangeProcessorID(std::size_t new_core_id) { } void ARM_Dynarmic_64::SaveContext(ThreadContext64& ctx) { + if (!jit) { + return; + } ctx.cpu_registers = jit->GetRegisters(); ctx.sp = jit->GetSP(); ctx.pc = jit->GetPC(); @@ -305,6 +308,9 @@ void ARM_Dynarmic_64::SaveContext(ThreadContext64& ctx) { } void ARM_Dynarmic_64::LoadContext(const ThreadContext64& ctx) { + if (!jit) { + return; + } jit->SetRegisters(ctx.cpu_registers); jit->SetSP(ctx.sp); jit->SetPC(ctx.pc); -- cgit v1.2.3