From 0ee00861f6747f8946972a91539e857f493e9cc6 Mon Sep 17 00:00:00 2001 From: bunnei Date: Wed, 12 Aug 2015 17:42:13 -0400 Subject: Common: Cleanup CPU capability detection code. --- src/common/x64/cpu_detect.cpp | 220 +++++++++++++------------------ src/common/x64/cpu_detect.h | 99 ++++++-------- src/common/x64/emitter.cpp | 18 +-- src/common/x64/emitter.h | 2 +- src/video_core/shader/shader_jit_x64.cpp | 10 +- 5 files changed, 146 insertions(+), 203 deletions(-) (limited to 'src') diff --git a/src/common/x64/cpu_detect.cpp b/src/common/x64/cpu_detect.cpp index 72c8297a3..d9c430c67 100644 --- a/src/common/x64/cpu_detect.cpp +++ b/src/common/x64/cpu_detect.cpp @@ -1,23 +1,25 @@ -// Copyright 2008 Dolphin Emulator Project -// Licensed under GPLv2+ +// Copyright 2013 Dolphin Emulator Project / 2015 Citra Emulator Project +// Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include #include +#include #include "common/common_types.h" #include "cpu_detect.h" -#ifndef _WIN32 +namespace Common { + +#ifndef _MSC_VER #ifdef __FreeBSD__ #include #include #endif -static inline void __cpuidex(int info[4], int function_id, int subfunction_id) -{ +static inline void __cpuidex(int info[4], int function_id, int subfunction_id) { #ifdef __FreeBSD__ // Despite the name, this is just do_cpuid() with ECX as second input. cpuid_count((u_int)function_id, (u_int)subfunction_id, (u_int*)info); @@ -36,96 +38,67 @@ static inline void __cpuidex(int info[4], int function_id, int subfunction_id) #endif } -static inline void __cpuid(int info[4], int function_id) -{ +static inline void __cpuid(int info[4], int function_id) { return __cpuidex(info, function_id, 0); } #define _XCR_XFEATURE_ENABLED_MASK 0 -static u64 _xgetbv(u32 index) -{ +static u64 _xgetbv(u32 index) { u32 eax, edx; __asm__ __volatile__("xgetbv" : "=a"(eax), "=d"(edx) : "c"(index)); return ((u64)edx << 32) | eax; } -#endif // ifndef _WIN32 - -namespace Common { - -CPUInfo cpu_info; - -CPUInfo::CPUInfo() { - Detect(); -} +#endif // ifndef _MSC_VER // Detects the various CPU features -void CPUInfo::Detect() { - memset(this, 0, sizeof(*this)); -#ifdef ARCHITECTURE_X64 - Mode64bit = true; - OS64bit = true; -#endif - num_cores = 1; +static CPUCaps Detect() { + CPUCaps caps = {}; - // Set obvious defaults, for extra safety - if (Mode64bit) { - bSSE = true; - bSSE2 = true; - bLongMode = true; - } + caps.num_cores = std::thread::hardware_concurrency(); + + // Assumes the CPU supports the CPUID instruction. Those that don't would likely not support + // Citra at all anyway - // Assume CPU supports the CPUID instruction. Those that don't can barely - // boot modern OS:es anyway. int cpu_id[4]; - memset(brand_string, 0, sizeof(brand_string)); + memset(caps.brand_string, 0, sizeof(caps.brand_string)); - // Detect CPU's CPUID capabilities, and grab CPU string + // Detect CPU's CPUID capabilities and grab CPU string __cpuid(cpu_id, 0x00000000); - u32 max_std_fn = cpu_id[0]; // EAX - *((int *)brand_string) = cpu_id[1]; - *((int *)(brand_string + 4)) = cpu_id[3]; - *((int *)(brand_string + 8)) = cpu_id[2]; + u32 max_std_fn = cpu_id[0]; // EAX + + std::memcpy(&caps.brand_string[0], &cpu_id[1], sizeof(int)); + std::memcpy(&caps.brand_string[4], &cpu_id[3], sizeof(int)); + std::memcpy(&caps.brand_string[8], &cpu_id[2], sizeof(int)); + __cpuid(cpu_id, 0x80000000); + u32 max_ex_fn = cpu_id[0]; - if (!strcmp(brand_string, "GenuineIntel")) - vendor = VENDOR_INTEL; - else if (!strcmp(brand_string, "AuthenticAMD")) - vendor = VENDOR_AMD; + if (!strcmp(caps.brand_string, "GenuineIntel")) + caps.vendor = CPUVendor::INTEL; + else if (!strcmp(caps.brand_string, "AuthenticAMD")) + caps.vendor = CPUVendor::AMD; else - vendor = VENDOR_OTHER; + caps.vendor = CPUVendor::OTHER; - // Set reasonable default brand string even if brand string not available. - strcpy(cpu_string, brand_string); + // Set reasonable default brand string even if brand string not available + strcpy(caps.cpu_string, caps.brand_string); - // Detect family and other misc stuff. - bool ht = false; - HTT = ht; - logical_cpu_count = 1; + // Detect family and other miscellaneous features if (max_std_fn >= 1) { __cpuid(cpu_id, 0x00000001); - int family = ((cpu_id[0] >> 8) & 0xf) + ((cpu_id[0] >> 20) & 0xff); - int model = ((cpu_id[0] >> 4) & 0xf) + ((cpu_id[0] >> 12) & 0xf0); - // Detect people unfortunate enough to be running Dolphin on an Atom - if (family == 6 && (model == 0x1C || model == 0x26 || model == 0x27 || model == 0x35 || model == 0x36 || - model == 0x37 || model == 0x4A || model == 0x4D || model == 0x5A || model == 0x5D)) - bAtom = true; - logical_cpu_count = (cpu_id[1] >> 16) & 0xFF; - ht = (cpu_id[3] >> 28) & 1; - - if ((cpu_id[3] >> 25) & 1) bSSE = true; - if ((cpu_id[3] >> 26) & 1) bSSE2 = true; - if ((cpu_id[2]) & 1) bSSE3 = true; - if ((cpu_id[2] >> 9) & 1) bSSSE3 = true; - if ((cpu_id[2] >> 19) & 1) bSSE4_1 = true; - if ((cpu_id[2] >> 20) & 1) bSSE4_2 = true; - if ((cpu_id[2] >> 22) & 1) bMOVBE = true; - if ((cpu_id[2] >> 25) & 1) bAES = true; - - if ((cpu_id[3] >> 24) & 1) - { - // We can use FXSAVE. - bFXSR = true; + + if ((cpu_id[3] >> 25) & 1) caps.sse = true; + if ((cpu_id[3] >> 26) & 1) caps.sse2 = true; + if ((cpu_id[2]) & 1) caps.sse3 = true; + if ((cpu_id[2] >> 9) & 1) caps.ssse3 = true; + if ((cpu_id[2] >> 19) & 1) caps.sse4_1 = true; + if ((cpu_id[2] >> 20) & 1) caps.sse4_2 = true; + if ((cpu_id[2] >> 22) & 1) caps.movbe = true; + if ((cpu_id[2] >> 25) & 1) caps.aes = true; + + if ((cpu_id[3] >> 24) & 1) { + caps.fxsave_fxrstor = true; } // AVX support requires 3 separate checks: @@ -134,95 +107,80 @@ void CPUInfo::Detect() { // - XGETBV result has the XCR bit set. if (((cpu_id[2] >> 28) & 1) && ((cpu_id[2] >> 27) & 1)) { if ((_xgetbv(_XCR_XFEATURE_ENABLED_MASK) & 0x6) == 0x6) { - bAVX = true; + caps.avx = true; if ((cpu_id[2] >> 12) & 1) - bFMA = true; + caps.fma = true; } } if (max_std_fn >= 7) { __cpuidex(cpu_id, 0x00000007, 0x00000000); - // careful; we can't enable AVX2 unless the XSAVE/XGETBV checks above passed + // Can't enable AVX2 unless the XSAVE/XGETBV checks above passed if ((cpu_id[1] >> 5) & 1) - bAVX2 = bAVX; + caps.avx2 = caps.avx; if ((cpu_id[1] >> 3) & 1) - bBMI1 = true; + caps.bmi1 = true; if ((cpu_id[1] >> 8) & 1) - bBMI2 = true; + caps.bmi2 = true; } } - bFlushToZero = bSSE; + caps.flush_to_zero = caps.sse; if (max_ex_fn >= 0x80000004) { // Extract CPU model string __cpuid(cpu_id, 0x80000002); - memcpy(cpu_string, cpu_id, sizeof(cpu_id)); + std::memcpy(caps.cpu_string, cpu_id, sizeof(cpu_id)); __cpuid(cpu_id, 0x80000003); - memcpy(cpu_string + 16, cpu_id, sizeof(cpu_id)); + std::memcpy(caps.cpu_string + 16, cpu_id, sizeof(cpu_id)); __cpuid(cpu_id, 0x80000004); - memcpy(cpu_string + 32, cpu_id, sizeof(cpu_id)); + std::memcpy(caps.cpu_string + 32, cpu_id, sizeof(cpu_id)); } + if (max_ex_fn >= 0x80000001) { - // Check for more features. + // Check for more features __cpuid(cpu_id, 0x80000001); - if (cpu_id[2] & 1) bLAHFSAHF64 = true; - if ((cpu_id[2] >> 5) & 1) bLZCNT = true; - if ((cpu_id[2] >> 16) & 1) bFMA4 = true; - if ((cpu_id[3] >> 29) & 1) bLongMode = true; + if (cpu_id[2] & 1) caps.lahf_sahf_64 = true; + if ((cpu_id[2] >> 5) & 1) caps.lzcnt = true; + if ((cpu_id[2] >> 16) & 1) caps.fma4 = true; + if ((cpu_id[3] >> 29) & 1) caps.long_mode = true; } - num_cores = (logical_cpu_count == 0) ? 1 : logical_cpu_count; - - if (max_ex_fn >= 0x80000008) { - // Get number of cores. This is a bit complicated. Following AMD manual here. - __cpuid(cpu_id, 0x80000008); - int apic_id_core_id_size = (cpu_id[2] >> 12) & 0xF; - if (apic_id_core_id_size == 0) { - if (ht) { - // New mechanism for modern Intel CPUs. - if (vendor == VENDOR_INTEL) { - __cpuidex(cpu_id, 0x00000004, 0x00000000); - int cores_x_package = ((cpu_id[0] >> 26) & 0x3F) + 1; - HTT = (cores_x_package < logical_cpu_count); - cores_x_package = ((logical_cpu_count % cores_x_package) == 0) ? cores_x_package : 1; - num_cores = (cores_x_package > 1) ? cores_x_package : num_cores; - logical_cpu_count /= cores_x_package; - } - } - } else { - // Use AMD's new method. - num_cores = (cpu_id[2] & 0xFF) + 1; - } - } + return caps; } -// Turn the CPU info into a string we can show -std::string CPUInfo::Summarize() { - std::string sum(cpu_string); +const CPUCaps& GetCPUCaps() { + static CPUCaps caps = Detect(); + return caps; +} + +std::string GetCPUCapsString() { + auto caps = GetCPUCaps(); + + std::string sum(caps.cpu_string); sum += " ("; - sum += brand_string; + sum += caps.brand_string; sum += ")"; - if (bSSE) sum += ", SSE"; - if (bSSE2) { + if (caps.sse) sum += ", SSE"; + if (caps.sse2) { sum += ", SSE2"; - if (!bFlushToZero) - sum += " (but not DAZ!)"; + if (!caps.flush_to_zero) sum += " (without DAZ)"; } - if (bSSE3) sum += ", SSE3"; - if (bSSSE3) sum += ", SSSE3"; - if (bSSE4_1) sum += ", SSE4.1"; - if (bSSE4_2) sum += ", SSE4.2"; - if (HTT) sum += ", HTT"; - if (bAVX) sum += ", AVX"; - if (bAVX2) sum += ", AVX2"; - if (bBMI1) sum += ", BMI1"; - if (bBMI2) sum += ", BMI2"; - if (bFMA) sum += ", FMA"; - if (bAES) sum += ", AES"; - if (bMOVBE) sum += ", MOVBE"; - if (bLongMode) sum += ", 64-bit support"; + + if (caps.sse3) sum += ", SSE3"; + if (caps.ssse3) sum += ", SSSE3"; + if (caps.sse4_1) sum += ", SSE4.1"; + if (caps.sse4_2) sum += ", SSE4.2"; + if (caps.avx) sum += ", AVX"; + if (caps.avx2) sum += ", AVX2"; + if (caps.bmi1) sum += ", BMI1"; + if (caps.bmi2) sum += ", BMI2"; + if (caps.fma) sum += ", FMA"; + if (caps.aes) sum += ", AES"; + if (caps.movbe) sum += ", MOVBE"; + if (caps.long_mode) sum += ", 64-bit support"; + return sum; } diff --git a/src/common/x64/cpu_detect.h b/src/common/x64/cpu_detect.h index 19a2c25d6..0af3a8adb 100644 --- a/src/common/x64/cpu_detect.h +++ b/src/common/x64/cpu_detect.h @@ -1,81 +1,66 @@ -// Copyright 2013 Dolphin Emulator Project / 2014 Citra Emulator Project +// Copyright 2013 Dolphin Emulator Project / 2015 Citra Emulator Project // Licensed under GPLv2 or any later version // Refer to the license.txt file included. - -// Detect the CPU, so we'll know which optimizations to use #pragma once #include namespace Common { -enum CPUVendor -{ - VENDOR_INTEL = 0, - VENDOR_AMD = 1, - VENDOR_ARM = 2, - VENDOR_OTHER = 3, +/// x86/x64 CPU vendors that may be detected by this module +enum class CPUVendor { + INTEL, + AMD, + OTHER, }; -struct CPUInfo -{ +/// x86/x64 CPU capabilities that may be detected by this module +struct CPUCaps { CPUVendor vendor; - char cpu_string[0x21]; char brand_string[0x41]; - bool OS64bit; - bool CPU64bit; - bool Mode64bit; - - bool HTT; int num_cores; - int logical_cpu_count; + bool sse; + bool sse2; + bool sse3; + bool ssse3; + bool sse4_1; + bool sse4_2; + bool lzcnt; + bool avx; + bool avx2; + bool bmi1; + bool bmi2; + bool fma; + bool fma4; + bool aes; - bool bSSE; - bool bSSE2; - bool bSSE3; - bool bSSSE3; - bool bPOPCNT; - bool bSSE4_1; - bool bSSE4_2; - bool bLZCNT; - bool bSSE4A; - bool bAVX; - bool bAVX2; - bool bBMI1; - bool bBMI2; - bool bFMA; - bool bFMA4; - bool bAES; - // FXSAVE/FXRSTOR - bool bFXSR; - bool bMOVBE; - // This flag indicates that the hardware supports some mode - // in which denormal inputs _and_ outputs are automatically set to (signed) zero. - bool bFlushToZero; - bool bLAHFSAHF64; - bool bLongMode; - bool bAtom; + // Support for the FXSAVE and FXRSTOR instructions + bool fxsave_fxrstor; - // ARMv8 specific - bool bFP; - bool bASIMD; - bool bCRC32; - bool bSHA1; - bool bSHA2; + bool movbe; - // Call Detect() - explicit CPUInfo(); + // This flag indicates that the hardware supports some mode in which denormal inputs and outputs + // are automatically set to (signed) zero. + bool flush_to_zero; - // Turn the cpu info into a string we can show - std::string Summarize(); + // Support for LAHF and SAHF instructions in 64-bit mode + bool lahf_sahf_64; -private: - // Detects the various cpu features - void Detect(); + bool long_mode; }; -extern CPUInfo cpu_info; +/** + * Gets the supported capabilities of the host CPU + * @return Reference to a CPUCaps struct with the detected host CPU capabilities + */ +const CPUCaps& GetCPUCaps(); + +/** + * Gets a string summary of the name and supported capabilities of the host CPU + * @return String summary + */ +std::string GetCPUCapsString(); } // namespace Common diff --git a/src/common/x64/emitter.cpp b/src/common/x64/emitter.cpp index 5463841d7..030c73918 100644 --- a/src/common/x64/emitter.cpp +++ b/src/common/x64/emitter.cpp @@ -826,14 +826,14 @@ void XEmitter::BSR(int bits, X64Reg dest, OpArg src) {WriteBitSearchType(bits,de void XEmitter::TZCNT(int bits, X64Reg dest, OpArg src) { CheckFlags(); - if (!Common::cpu_info.bBMI1) + if (!Common::GetCPUCaps().bmi1) ASSERT_MSG(0, "Trying to use BMI1 on a system that doesn't support it. Bad programmer."); WriteBitSearchType(bits, dest, src, 0xBC, true); } void XEmitter::LZCNT(int bits, X64Reg dest, OpArg src) { CheckFlags(); - if (!Common::cpu_info.bLZCNT) + if (!Common::GetCPUCaps().lzcnt) ASSERT_MSG(0, "Trying to use LZCNT on a system that doesn't support it. Bad programmer."); WriteBitSearchType(bits, dest, src, 0xBD, true); } @@ -907,7 +907,7 @@ void XEmitter::MOVZX(int dbits, int sbits, X64Reg dest, OpArg src) void XEmitter::MOVBE(int bits, const OpArg& dest, const OpArg& src) { - ASSERT_MSG(Common::cpu_info.bMOVBE, "Generating MOVBE on a system that does not support it."); + ASSERT_MSG(Common::GetCPUCaps().movbe, "Generating MOVBE on a system that does not support it."); if (bits == 8) { MOV(bits, dest, src); @@ -1420,7 +1420,7 @@ static int GetVEXpp(u8 opPrefix) void XEmitter::WriteAVXOp(u8 opPrefix, u16 op, X64Reg regOp1, X64Reg regOp2, OpArg arg, int extrabytes) { - if (!Common::cpu_info.bAVX) + if (!Common::GetCPUCaps().avx) ASSERT_MSG(0, "Trying to use AVX on a system that doesn't support it. Bad programmer."); int mmmmm = GetVEXmmmmm(op); int pp = GetVEXpp(opPrefix); @@ -1445,7 +1445,7 @@ void XEmitter::WriteVEXOp(int size, u8 opPrefix, u16 op, X64Reg regOp1, X64Reg r void XEmitter::WriteBMI1Op(int size, u8 opPrefix, u16 op, X64Reg regOp1, X64Reg regOp2, OpArg arg, int extrabytes) { CheckFlags(); - if (!Common::cpu_info.bBMI1) + if (!Common::GetCPUCaps().bmi1) ASSERT_MSG(0, "Trying to use BMI1 on a system that doesn't support it. Bad programmer."); WriteVEXOp(size, opPrefix, op, regOp1, regOp2, arg, extrabytes); } @@ -1453,7 +1453,7 @@ void XEmitter::WriteBMI1Op(int size, u8 opPrefix, u16 op, X64Reg regOp1, X64Reg void XEmitter::WriteBMI2Op(int size, u8 opPrefix, u16 op, X64Reg regOp1, X64Reg regOp2, OpArg arg, int extrabytes) { CheckFlags(); - if (!Common::cpu_info.bBMI2) + if (!Common::GetCPUCaps().bmi2) ASSERT_MSG(0, "Trying to use BMI2 on a system that doesn't support it. Bad programmer."); WriteVEXOp(size, opPrefix, op, regOp1, regOp2, arg, extrabytes); } @@ -1647,7 +1647,7 @@ void XEmitter::UNPCKHPD(X64Reg dest, OpArg arg) {WriteSSEOp(0x66, 0x15, dest, ar void XEmitter::MOVDDUP(X64Reg regOp, OpArg arg) { - if (Common::cpu_info.bSSE3) + if (Common::GetCPUCaps().sse3) { WriteSSEOp(0xF2, 0x12, regOp, arg); //SSE3 movddup } @@ -1737,14 +1737,14 @@ void XEmitter::PSRAD(X64Reg reg, int shift) void XEmitter::WriteSSSE3Op(u8 opPrefix, u16 op, X64Reg regOp, OpArg arg, int extrabytes) { - if (!Common::cpu_info.bSSSE3) + if (!Common::GetCPUCaps().ssse3) ASSERT_MSG(0, "Trying to use SSSE3 on a system that doesn't support it. Bad programmer."); WriteSSEOp(opPrefix, op, regOp, arg, extrabytes); } void XEmitter::WriteSSE41Op(u8 opPrefix, u16 op, X64Reg regOp, OpArg arg, int extrabytes) { - if (!Common::cpu_info.bSSE4_1) + if (!Common::GetCPUCaps().sse4_1) ASSERT_MSG(0, "Trying to use SSE4.1 on a system that doesn't support it. Bad programmer."); WriteSSEOp(opPrefix, op, regOp, arg, extrabytes); } diff --git a/src/common/x64/emitter.h b/src/common/x64/emitter.h index 312e9dc19..aaebb56f6 100644 --- a/src/common/x64/emitter.h +++ b/src/common/x64/emitter.h @@ -532,7 +532,7 @@ public: void MOVSX(int dbits, int sbits, X64Reg dest, OpArg src); //automatically uses MOVSXD if necessary void MOVZX(int dbits, int sbits, X64Reg dest, OpArg src); - // Available only on Atom or >= Haswell so far. Test with cpu_info.bMOVBE. + // Available only on Atom or >= Haswell so far. Test with GetCPUCaps().movbe. void MOVBE(int dbits, const OpArg& dest, const OpArg& src); // Available only on AMD >= Phenom or Intel >= Haswell diff --git a/src/video_core/shader/shader_jit_x64.cpp b/src/video_core/shader/shader_jit_x64.cpp index 93e665d43..a7be433df 100644 --- a/src/video_core/shader/shader_jit_x64.cpp +++ b/src/video_core/shader/shader_jit_x64.cpp @@ -223,7 +223,7 @@ void JitCompiler::Compile_DestEnable(Instruction instr,X64Reg src) { // Not all components are enabled, so mask the result when storing to the destination register... MOVAPS(SCRATCH, MDisp(STATE, UnitState::OutputOffset(dest))); - if (Common::cpu_info.bSSE4_1) { + if (Common::GetCPUCaps().sse4_1) { u8 mask = ((swiz.dest_mask & 1) << 3) | ((swiz.dest_mask & 8) >> 3) | ((swiz.dest_mask & 2) << 1) | ((swiz.dest_mask & 4) >> 1); BLENDPS(SCRATCH, R(src), mask); } else { @@ -291,7 +291,7 @@ void JitCompiler::Compile_DP3(Instruction instr) { Compile_SwizzleSrc(instr, 1, instr.common.src1, SRC1); Compile_SwizzleSrc(instr, 2, instr.common.src2, SRC2); - if (Common::cpu_info.bSSE4_1) { + if (Common::GetCPUCaps().sse4_1) { DPPS(SRC1, R(SRC2), 0x7f); } else { MULPS(SRC1, R(SRC2)); @@ -314,7 +314,7 @@ void JitCompiler::Compile_DP4(Instruction instr) { Compile_SwizzleSrc(instr, 1, instr.common.src1, SRC1); Compile_SwizzleSrc(instr, 2, instr.common.src2, SRC2); - if (Common::cpu_info.bSSE4_1) { + if (Common::GetCPUCaps().sse4_1) { DPPS(SRC1, R(SRC2), 0xff); } else { MULPS(SRC1, R(SRC2)); @@ -341,7 +341,7 @@ void JitCompiler::Compile_MUL(Instruction instr) { void JitCompiler::Compile_FLR(Instruction instr) { Compile_SwizzleSrc(instr, 1, instr.common.src1, SRC1); - if (Common::cpu_info.bSSE4_1) { + if (Common::GetCPUCaps().sse4_1) { ROUNDFLOORPS(SRC1, R(SRC1)); } else { CVTPS2DQ(SRC1, R(SRC1)); @@ -513,7 +513,7 @@ void JitCompiler::Compile_MAD(Instruction instr) { Compile_SwizzleSrc(instr, 3, instr.mad.src3, SRC3); } - if (Common::cpu_info.bFMA) { + if (Common::GetCPUCaps().fma) { VFMADD213PS(SRC1, SRC2, R(SRC3)); } else { MULPS(SRC1, R(SRC2)); -- cgit v1.2.3