From c8ad0396120e2a1af029a819927b0a3c82a0e64e Mon Sep 17 00:00:00 2001
From: Feng Chen <vonchenplus@gmail.com>
Date: Fri, 10 Mar 2023 15:06:56 +0800
Subject: video_core: Update texture format

---
 src/video_core/textures/texture.h | 70 +++++++++++++++++++--------------------
 1 file changed, 35 insertions(+), 35 deletions(-)

(limited to 'src/video_core/textures')

diff --git a/src/video_core/textures/texture.h b/src/video_core/textures/texture.h
index 7c4553a53..7e5837b20 100644
--- a/src/video_core/textures/texture.h
+++ b/src/video_core/textures/texture.h
@@ -15,26 +15,26 @@ enum class TextureFormat : u32 {
     R32G32B32 = 0x02,
     R16G16B16A16 = 0x03,
     R32G32 = 0x04,
-    R32_B24G8 = 0x05,
+    R32B24G8 = 0x05,
     ETC2_RGB = 0x06,
     X8B8G8R8 = 0x07,
-    A8R8G8B8 = 0x08,
+    A8B8G8R8 = 0x08,
     A2B10G10R10 = 0x09,
     ETC2_RGB_PTA = 0x0a,
     ETC2_RGBA = 0x0b,
     R16G16 = 0x0c,
-    R24G8 = 0x0d,
-    R8G24 = 0x0e,
+    G8R24 = 0x0d,
+    G24R8 = 0x0e,
     R32 = 0x0f,
-    BC6H_SFLOAT = 0x10,
-    BC6H_UFLOAT = 0x11,
+    BC6H_S16 = 0x10,
+    BC6H_U16 = 0x11,
     A4B4G4R4 = 0x12,
     A5B5G5R1 = 0x13,
     A1B5G5R5 = 0x14,
     B5G6R5 = 0x15,
     B6G5R5 = 0x16,
-    BC7 = 0x17,
-    R8G8 = 0x18,
+    BC7U = 0x17,
+    G8R8 = 0x18,
     EAC = 0x19,
     EACX2 = 0x1a,
     R16 = 0x1b,
@@ -46,33 +46,33 @@ enum class TextureFormat : u32 {
     B10G11R11 = 0x21,
     G8B8G8R8 = 0x22,
     B8G8R8G8 = 0x23,
-    BC1_RGBA = 0x24,
-    BC2 = 0x25,
-    BC3 = 0x26,
-    BC4 = 0x27,
-    BC5 = 0x28,
-    S8D24 = 0x29,
-    X8D24 = 0x2a,
-    D24S8 = 0x2b,
-    X4V4D24__COV4R4V = 0x2c,
-    X4V4D24__COV8R8V = 0x2d,
-    V8D24__COV4R12V = 0x2e,
-    D32 = 0x2f,
-    D32S8 = 0x30,
-    X8D24_X20V4S8__COV4R4V = 0x31,
-    X8D24_X20V4S8__COV8R8V = 0x32,
-    D32_X20V4X8__COV4R4V = 0x33,
-    D32_X20V4X8__COV8R8V = 0x34,
-    D32_X20V4S8__COV4R4V = 0x35,
-    D32_X20V4S8__COV8R8V = 0x36,
-    X8D24_X16V8S8__COV4R12V = 0x37,
-    D32_X16V8X8__COV4R12V = 0x38,
-    D32_X16V8S8__COV4R12V = 0x39,
-    D16 = 0x3a,
-    V8D24__COV8R24V = 0x3b,
-    X8D24_X16V8S8__COV8R24V = 0x3c,
-    D32_X16V8X8__COV8R24V = 0x3d,
-    D32_X16V8S8__COV8R24V = 0x3e,
+    DXT1 = 0x24,
+    DXT23 = 0x25,
+    DXT45 = 0x26,
+    DXN1 = 0x27,
+    DXN2 = 0x28,
+    Z24S8 = 0x29,
+    X8Z24 = 0x2a,
+    S8Z24 = 0x2b,
+    X4V4Z24__COV4R4V = 0x2c,
+    X4V4Z24__COV8R8V = 0x2d,
+    V8Z24__COV4R12V = 0x2e,
+    Z32 = 0x2f,
+    Z32_X24S8 = 0x30,
+    X8Z24_X20V4S8__COV4R4V = 0x31,
+    X8Z24_X20V4S8__COV8R8V = 0x32,
+    Z32_X20V4X8__COV4R4V = 0x33,
+    Z32_X20V4X8__COV8R8V = 0x34,
+    Z32_X20V4S8__COV4R4V = 0x35,
+    Z32_X20V4S8__COV8R8V = 0x36,
+    X8Z24_X16V8S8__COV4R12V = 0x37,
+    Z32_X16V8X8__COV4R12V = 0x38,
+    Z32_X16V8S8__COV4R12V = 0x39,
+    Z16 = 0x3a,
+    V8Z24__COV8R24V = 0x3b,
+    X8Z24_X16V8S8__COV8R24V = 0x3c,
+    Z32_X16V8X8__COV8R24V = 0x3d,
+    Z32_X16V8S8__COV8R24V = 0x3e,
     ASTC_2D_4X4 = 0x40,
     ASTC_2D_5X5 = 0x41,
     ASTC_2D_6X6 = 0x42,
-- 
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