From 23cabc98db71ff60168bd504f83d7fbe4735e400 Mon Sep 17 00:00:00 2001 From: Fernando Sahmkow Date: Wed, 30 Oct 2019 21:14:57 -0400 Subject: Shader_IR: Fix regression on TLD4 Originally on the last commit I thought TLD4 acted the same as TLD4S and didn't have a mask. It actually does have a component mask. This commit corrects that. --- src/video_core/shader/decode/texture.cpp | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) (limited to 'src/video_core/shader/decode') diff --git a/src/video_core/shader/decode/texture.cpp b/src/video_core/shader/decode/texture.cpp index 0599ef34f..4c838c8bb 100644 --- a/src/video_core/shader/decode/texture.cpp +++ b/src/video_core/shader/decode/texture.cpp @@ -119,7 +119,7 @@ u32 ShaderIR::DecodeTexture(NodeBlock& bb, u32 pc) { : instr.tld4.UsesMiscMode(TextureMiscMode::AOFFI); WriteTexInstructionFloat( bb, instr, - GetTld4Code(instr, texture_type, depth_compare, is_array, is_aoffi, is_bindless), true); + GetTld4Code(instr, texture_type, depth_compare, is_array, is_aoffi, is_bindless)); break; } case OpCode::Id::TLD4S: { @@ -366,11 +366,10 @@ const Sampler& ShaderIR::GetBindlessSampler(const Tegra::Shader::Register& reg, return *used_samplers.emplace(entry).first; } -void ShaderIR::WriteTexInstructionFloat(NodeBlock& bb, Instruction instr, const Node4& components, - bool is_tld4) { +void ShaderIR::WriteTexInstructionFloat(NodeBlock& bb, Instruction instr, const Node4& components) { u32 dest_elem = 0; for (u32 elem = 0; elem < 4; ++elem) { - if (!is_tld4 && !instr.tex.IsComponentEnabled(elem)) { + if (!instr.tex.IsComponentEnabled(elem)) { // Skip disabled components continue; } -- cgit v1.2.3