From d54d7de40e7295827b0e4e4026441b53d3fc9569 Mon Sep 17 00:00:00 2001
From: ReinUsesLisp <reinuseslisp@airmail.cc>
Date: Fri, 14 May 2021 00:40:54 -0300
Subject: glasm: Rework control flow introducing a syntax list

This commit regresses VertexA shaders, their transformation pass has to
be adapted to the new control flow.
---
 src/shader_recompiler/frontend/ir/ir_emitter.cpp | 60 +++++++-----------------
 1 file changed, 16 insertions(+), 44 deletions(-)

(limited to 'src/shader_recompiler/frontend/ir/ir_emitter.cpp')

diff --git a/src/shader_recompiler/frontend/ir/ir_emitter.cpp b/src/shader_recompiler/frontend/ir/ir_emitter.cpp
index ce6c9af07..eb45aa477 100644
--- a/src/shader_recompiler/frontend/ir/ir_emitter.cpp
+++ b/src/shader_recompiler/frontend/ir/ir_emitter.cpp
@@ -61,25 +61,28 @@ F64 IREmitter::Imm64(f64 value) const {
     return F64{Value{value}};
 }
 
-void IREmitter::Branch(Block* label) {
-    label->AddImmediatePredecessor(block);
-    block->SetBranch(label);
-    Inst(Opcode::Branch, label);
+void IREmitter::Prologue() {
+    Inst(Opcode::Prologue);
 }
 
-void IREmitter::BranchConditional(const U1& condition, Block* true_label, Block* false_label) {
-    block->SetBranches(IR::Condition{true}, true_label, false_label);
-    true_label->AddImmediatePredecessor(block);
-    false_label->AddImmediatePredecessor(block);
-    Inst(Opcode::BranchConditional, condition, true_label, false_label);
+void IREmitter::Epilogue() {
+    Inst(Opcode::Epilogue);
 }
 
-void IREmitter::LoopMerge(Block* merge_block, Block* continue_target) {
-    Inst(Opcode::LoopMerge, merge_block, continue_target);
+void IREmitter::BranchConditionRef(const U1& cond) {
+    Inst(Opcode::BranchConditionRef, cond);
 }
 
-void IREmitter::SelectionMerge(Block* merge_block) {
-    Inst(Opcode::SelectionMerge, merge_block);
+void IREmitter::DemoteToHelperInvocation() {
+    Inst(Opcode::DemoteToHelperInvocation);
+}
+
+void IREmitter::EmitVertex(const U32& stream) {
+    Inst(Opcode::EmitVertex, stream);
+}
+
+void IREmitter::EndPrimitive(const U32& stream) {
+    Inst(Opcode::EndPrimitive, stream);
 }
 
 void IREmitter::Barrier() {
@@ -94,37 +97,6 @@ void IREmitter::DeviceMemoryBarrier() {
     Inst(Opcode::DeviceMemoryBarrier);
 }
 
-void IREmitter::Return() {
-    block->SetReturn();
-    Inst(Opcode::Return);
-}
-
-void IREmitter::Unreachable() {
-    Inst(Opcode::Unreachable);
-}
-
-void IREmitter::DemoteToHelperInvocation(Block* continue_label) {
-    block->SetBranch(continue_label);
-    continue_label->AddImmediatePredecessor(block);
-    Inst(Opcode::DemoteToHelperInvocation, continue_label);
-}
-
-void IREmitter::Prologue() {
-    Inst(Opcode::Prologue);
-}
-
-void IREmitter::Epilogue() {
-    Inst(Opcode::Epilogue);
-}
-
-void IREmitter::EmitVertex(const U32& stream) {
-    Inst(Opcode::EmitVertex, stream);
-}
-
-void IREmitter::EndPrimitive(const U32& stream) {
-    Inst(Opcode::EndPrimitive, stream);
-}
-
 U32 IREmitter::GetReg(IR::Reg reg) {
     return Inst<U32>(Opcode::GetRegister, reg);
 }
-- 
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