From 20390c0548d6eef2af67a363ee120a630267b741 Mon Sep 17 00:00:00 2001
From: ameerj <52414509+ameerj@users.noreply.github.com>
Date: Sun, 28 Feb 2021 23:33:53 -0500
Subject: shader: Implement IMNMX

---
 src/shader_recompiler/frontend/ir/ir_emitter.cpp | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

(limited to 'src/shader_recompiler/frontend/ir/ir_emitter.cpp')

diff --git a/src/shader_recompiler/frontend/ir/ir_emitter.cpp b/src/shader_recompiler/frontend/ir/ir_emitter.cpp
index 54fdf9559..04edcdfd8 100644
--- a/src/shader_recompiler/frontend/ir/ir_emitter.cpp
+++ b/src/shader_recompiler/frontend/ir/ir_emitter.cpp
@@ -816,6 +816,22 @@ U32 IREmitter::BitwiseNot(const U32& a) {
     return Inst<U32>(Opcode::BitwiseNot32, a);
 }
 
+U32 IREmitter::SMin(const U32& a, const U32& b) {
+    return Inst<U32>(Opcode::SMin32, a, b);
+}
+
+U32 IREmitter::UMin(const U32& a, const U32& b) {
+    return Inst<U32>(Opcode::UMin32, a, b);
+}
+
+U32 IREmitter::SMax(const U32& a, const U32& b) {
+    return Inst<U32>(Opcode::SMax32, a, b);
+}
+
+U32 IREmitter::UMax(const U32& a, const U32& b) {
+    return Inst<U32>(Opcode::UMax32, a, b);
+}
+
 U1 IREmitter::ILessThan(const U32& lhs, const U32& rhs, bool is_signed) {
     return Inst<U1>(is_signed ? Opcode::SLessThan : Opcode::ULessThan, lhs, rhs);
 }
-- 
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