From 9f91ba1f7357c61dd2c7c3b437ea203d467fd400 Mon Sep 17 00:00:00 2001 From: Liam Date: Fri, 17 Nov 2023 23:44:53 +0200 Subject: arm: Implement native code execution backend --- src/core/arm/nce/guest_context.h | 50 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 50 insertions(+) create mode 100644 src/core/arm/nce/guest_context.h (limited to 'src/core/arm/nce/guest_context.h') diff --git a/src/core/arm/nce/guest_context.h b/src/core/arm/nce/guest_context.h new file mode 100644 index 000000000..0767a0337 --- /dev/null +++ b/src/core/arm/nce/guest_context.h @@ -0,0 +1,50 @@ +// SPDX-FileCopyrightText: Copyright 2023 yuzu Emulator Project +// SPDX-License-Identifier: GPL-2.0-or-later + +#pragma once + +#include "common/common_funcs.h" +#include "common/common_types.h" +#include "core/arm/arm_interface.h" +#include "core/arm/nce/arm_nce_asm_definitions.h" + +namespace Core { + +class ARM_NCE; +class System; + +struct HostContext { + alignas(16) std::array host_saved_regs{}; + alignas(16) std::array host_saved_vregs{}; + u64 host_sp{}; + void* host_tpidr_el0{}; +}; + +struct GuestContext { + std::array cpu_registers{}; + u64 sp{}; + u64 pc{}; + u32 fpcr{}; + u32 fpsr{}; + std::array vector_registers{}; + u32 pstate{}; + alignas(16) HostContext host_ctx{}; + u64 tpidrro_el0{}; + u64 tpidr_el0{}; + std::atomic esr_el1{}; + u32 nzcv{}; + u32 svc_swi{}; + System* system{}; + ARM_NCE* parent{}; +}; + +// Verify assembly offsets. +static_assert(offsetof(GuestContext, sp) == GuestContextSp); +static_assert(offsetof(GuestContext, host_ctx) == GuestContextHostContext); +static_assert(offsetof(HostContext, host_sp) == HostContextSpTpidrEl0); +static_assert(offsetof(HostContext, host_tpidr_el0) - 8 == HostContextSpTpidrEl0); +static_assert(offsetof(HostContext, host_tpidr_el0) == HostContextTpidrEl0); +static_assert(offsetof(HostContext, host_saved_regs) == HostContextRegs); +static_assert(offsetof(HostContext, host_saved_vregs) == HostContextVregs); + +} // namespace Core -- cgit v1.2.3