From 8e2accd9746d33116c6398e6f30db5b8b4e1f188 Mon Sep 17 00:00:00 2001
From: Lioncash <mathew1800@gmail.com>
Date: Mon, 22 Dec 2014 22:10:47 -0500
Subject: armemu: Fix construction of the CPSR

---
 src/core/arm/interpreter/armsupp.cpp | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

(limited to 'src/core/arm/interpreter/armsupp.cpp')

diff --git a/src/core/arm/interpreter/armsupp.cpp b/src/core/arm/interpreter/armsupp.cpp
index 30519f216..b31c0ea24 100644
--- a/src/core/arm/interpreter/armsupp.cpp
+++ b/src/core/arm/interpreter/armsupp.cpp
@@ -227,8 +227,9 @@ ARMul_CPSRAltered (ARMul_State * state)
     //state->Cpsr &= ~CBIT;
     ASSIGNV ((state->Cpsr & VBIT) != 0);
     //state->Cpsr &= ~VBIT;
-    ASSIGNS ((state->Cpsr & SBIT) != 0);
-    //state->Cpsr &= ~SBIT;
+    ASSIGNQ ((state->Cpsr & QBIT) != 0);
+    //state->Cpsr &= ~QBIT;
+    state->GEFlag = (state->Cpsr & 0x000F0000);
 #ifdef MODET
     ASSIGNT ((state->Cpsr & TBIT) != 0);
     //state->Cpsr &= ~TBIT;
-- 
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