From be1954e04cb5a0c3a526f78ed5490a5e65310280 Mon Sep 17 00:00:00 2001 From: Lioncash Date: Thu, 15 Oct 2020 14:49:45 -0400 Subject: core: Fix clang build Recent changes to the build system that made more warnings be flagged as errors caused building via clang to break. Fixes #4795 --- src/core/arm/dynarmic/arm_dynarmic_32.cpp | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'src/core/arm/dynarmic/arm_dynarmic_32.cpp') diff --git a/src/core/arm/dynarmic/arm_dynarmic_32.cpp b/src/core/arm/dynarmic/arm_dynarmic_32.cpp index b5f28a86e..fab694fc2 100644 --- a/src/core/arm/dynarmic/arm_dynarmic_32.cpp +++ b/src/core/arm/dynarmic/arm_dynarmic_32.cpp @@ -111,7 +111,7 @@ public: } return 0U; } - return std::max(parent.system.CoreTiming().GetDowncount(), 0); + return static_cast(std::max(parent.system.CoreTiming().GetDowncount(), 0)); } ARM_Dynarmic_32& parent; @@ -210,19 +210,19 @@ u64 ARM_Dynarmic_32::GetPC() const { return jit->Regs()[15]; } -u64 ARM_Dynarmic_32::GetReg(int index) const { +u64 ARM_Dynarmic_32::GetReg(std::size_t index) const { return jit->Regs()[index]; } -void ARM_Dynarmic_32::SetReg(int index, u64 value) { +void ARM_Dynarmic_32::SetReg(std::size_t index, u64 value) { jit->Regs()[index] = static_cast(value); } -u128 ARM_Dynarmic_32::GetVectorReg(int index) const { +u128 ARM_Dynarmic_32::GetVectorReg(std::size_t index) const { return {}; } -void ARM_Dynarmic_32::SetVectorReg(int index, u128 value) {} +void ARM_Dynarmic_32::SetVectorReg(std::size_t index, u128 value) {} u32 ARM_Dynarmic_32::GetPSTATE() const { return jit->Cpsr(); -- cgit v1.2.3 From 3d592972dc3fd61cc88771b889eff237e4e03e0f Mon Sep 17 00:00:00 2001 From: bunnei Date: Tue, 20 Oct 2020 19:07:39 -0700 Subject: Revert "core: Fix clang build" --- src/core/arm/dynarmic/arm_dynarmic_32.cpp | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'src/core/arm/dynarmic/arm_dynarmic_32.cpp') diff --git a/src/core/arm/dynarmic/arm_dynarmic_32.cpp b/src/core/arm/dynarmic/arm_dynarmic_32.cpp index fab694fc2..b5f28a86e 100644 --- a/src/core/arm/dynarmic/arm_dynarmic_32.cpp +++ b/src/core/arm/dynarmic/arm_dynarmic_32.cpp @@ -111,7 +111,7 @@ public: } return 0U; } - return static_cast(std::max(parent.system.CoreTiming().GetDowncount(), 0)); + return std::max(parent.system.CoreTiming().GetDowncount(), 0); } ARM_Dynarmic_32& parent; @@ -210,19 +210,19 @@ u64 ARM_Dynarmic_32::GetPC() const { return jit->Regs()[15]; } -u64 ARM_Dynarmic_32::GetReg(std::size_t index) const { +u64 ARM_Dynarmic_32::GetReg(int index) const { return jit->Regs()[index]; } -void ARM_Dynarmic_32::SetReg(std::size_t index, u64 value) { +void ARM_Dynarmic_32::SetReg(int index, u64 value) { jit->Regs()[index] = static_cast(value); } -u128 ARM_Dynarmic_32::GetVectorReg(std::size_t index) const { +u128 ARM_Dynarmic_32::GetVectorReg(int index) const { return {}; } -void ARM_Dynarmic_32::SetVectorReg(std::size_t index, u128 value) {} +void ARM_Dynarmic_32::SetVectorReg(int index, u128 value) {} u32 ARM_Dynarmic_32::GetPSTATE() const { return jit->Cpsr(); -- cgit v1.2.3 From fc6db97a09e2de5eff10131ddcab9cf8fb2f736c Mon Sep 17 00:00:00 2001 From: Lioncash Date: Tue, 3 Nov 2020 19:54:53 -0500 Subject: core: Remove usage of unicorn Unicorn long-since lost most of its use, due to dynarmic gaining support for handling most instructions. At this point any further issues encountered should be used to make dynarmic better. This also allows us to remove our dependency on Python. --- src/core/arm/dynarmic/arm_dynarmic_32.cpp | 1 + 1 file changed, 1 insertion(+) (limited to 'src/core/arm/dynarmic/arm_dynarmic_32.cpp') diff --git a/src/core/arm/dynarmic/arm_dynarmic_32.cpp b/src/core/arm/dynarmic/arm_dynarmic_32.cpp index b5f28a86e..6dc03f3b1 100644 --- a/src/core/arm/dynarmic/arm_dynarmic_32.cpp +++ b/src/core/arm/dynarmic/arm_dynarmic_32.cpp @@ -7,6 +7,7 @@ #include #include #include +#include "common/assert.h" #include "common/logging/log.h" #include "common/page_table.h" #include "core/arm/cpu_interrupt_handler.h" -- cgit v1.2.3 From 7b642c77811dc3887756f5abac5a9710564b098e Mon Sep 17 00:00:00 2001 From: bunnei Date: Fri, 13 Nov 2020 11:11:12 -0800 Subject: hle: kernel: multicore: Replace n-JITs impl. with 4 JITs. --- src/core/arm/dynarmic/arm_dynarmic_32.cpp | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'src/core/arm/dynarmic/arm_dynarmic_32.cpp') diff --git a/src/core/arm/dynarmic/arm_dynarmic_32.cpp b/src/core/arm/dynarmic/arm_dynarmic_32.cpp index 6dc03f3b1..af23206f5 100644 --- a/src/core/arm/dynarmic/arm_dynarmic_32.cpp +++ b/src/core/arm/dynarmic/arm_dynarmic_32.cpp @@ -189,6 +189,10 @@ void ARM_Dynarmic_32::Run() { jit->Run(); } +void ARM_Dynarmic_32::ExceptionalExit() { + jit->ExceptionalExit(); +} + void ARM_Dynarmic_32::Step() { jit->Step(); } -- cgit v1.2.3 From 63fd1bb50302867b233325f253b1e2abbc379875 Mon Sep 17 00:00:00 2001 From: bunnei Date: Fri, 13 Nov 2020 23:20:32 -0800 Subject: core: arm: Implement InvalidateCacheRange for CPU cache invalidation. --- src/core/arm/dynarmic/arm_dynarmic_32.cpp | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'src/core/arm/dynarmic/arm_dynarmic_32.cpp') diff --git a/src/core/arm/dynarmic/arm_dynarmic_32.cpp b/src/core/arm/dynarmic/arm_dynarmic_32.cpp index af23206f5..193fd7d62 100644 --- a/src/core/arm/dynarmic/arm_dynarmic_32.cpp +++ b/src/core/arm/dynarmic/arm_dynarmic_32.cpp @@ -286,6 +286,13 @@ void ARM_Dynarmic_32::ClearInstructionCache() { jit->ClearCache(); } +void ARM_Dynarmic_32::InvalidateCacheRange(VAddr addr, std::size_t size) { + if (!jit) { + return; + } + jit->InvalidateCacheRange(static_cast(addr), size); +} + void ARM_Dynarmic_32::ClearExclusiveState() { jit->ClearExclusiveState(); } -- cgit v1.2.3 From c10a37e5b6bdece089fc765e9843f81a097b08a2 Mon Sep 17 00:00:00 2001 From: bunnei Date: Tue, 1 Dec 2020 20:53:51 -0800 Subject: hle: kernel: physical_core: Clear exclusive state after each run. - This is closer to pre-multicore behavior, and works a bit better. --- src/core/arm/dynarmic/arm_dynarmic_32.cpp | 3 +++ 1 file changed, 3 insertions(+) (limited to 'src/core/arm/dynarmic/arm_dynarmic_32.cpp') diff --git a/src/core/arm/dynarmic/arm_dynarmic_32.cpp b/src/core/arm/dynarmic/arm_dynarmic_32.cpp index 193fd7d62..e9c74b1a6 100644 --- a/src/core/arm/dynarmic/arm_dynarmic_32.cpp +++ b/src/core/arm/dynarmic/arm_dynarmic_32.cpp @@ -294,6 +294,9 @@ void ARM_Dynarmic_32::InvalidateCacheRange(VAddr addr, std::size_t size) { } void ARM_Dynarmic_32::ClearExclusiveState() { + if (!jit) { + return; + } jit->ClearExclusiveState(); } -- cgit v1.2.3 From b3587102d160fb74a12935a79f06ee8a12712f12 Mon Sep 17 00:00:00 2001 From: ReinUsesLisp Date: Tue, 29 Dec 2020 21:16:57 -0300 Subject: core/memory: Read and write page table atomically Squash attributes into the pointer's integer, making them an uintptr_t pair containing 2 bits at the bottom and then the pointer. These bits are currently unused thanks to alignment requirements. Configure Dynarmic to mask out these bits on pointer reads. While we are at it, remove some unused attributes carried over from Citra. Read/Write and other hot functions use a two step unpacking process that is less readable to stop MSVC from emitting an extra AND instruction in the hot path: mov rdi,rcx shr rdx,0Ch mov r8,qword ptr [rax+8] mov rax,qword ptr [r8+rdx*8] mov rdx,rax -and al,3 and rdx,0FFFFFFFFFFFFFFFCh je Core::Memory::Memory::Impl::Read mov rax,qword ptr [vaddr] movzx eax,byte ptr [rdx+rax] --- src/core/arm/dynarmic/arm_dynarmic_32.cpp | 1 + 1 file changed, 1 insertion(+) (limited to 'src/core/arm/dynarmic/arm_dynarmic_32.cpp') diff --git a/src/core/arm/dynarmic/arm_dynarmic_32.cpp b/src/core/arm/dynarmic/arm_dynarmic_32.cpp index e9c74b1a6..8aaf11eee 100644 --- a/src/core/arm/dynarmic/arm_dynarmic_32.cpp +++ b/src/core/arm/dynarmic/arm_dynarmic_32.cpp @@ -133,6 +133,7 @@ std::shared_ptr ARM_Dynarmic_32::MakeJit(Common::PageTable& config.page_table = reinterpret_cast*>( page_table.pointers.data()); config.absolute_offset_page_table = true; + config.page_table_pointer_mask_bits = Common::PageTable::ATTRIBUTE_BITS; config.detect_misaligned_access_via_page_table = 16 | 32 | 64 | 128; config.only_detect_misalignment_via_page_table_on_page_boundary = true; -- cgit v1.2.3 From 57c9da1b397b7d19b604f318502a881db87f0ba4 Mon Sep 17 00:00:00 2001 From: MerryMage Date: Sat, 2 Jan 2021 17:36:02 +0000 Subject: dynarmic: Add Unsafe_InaccurateNaN optimization --- src/core/arm/dynarmic/arm_dynarmic_32.cpp | 3 +++ 1 file changed, 3 insertions(+) (limited to 'src/core/arm/dynarmic/arm_dynarmic_32.cpp') diff --git a/src/core/arm/dynarmic/arm_dynarmic_32.cpp b/src/core/arm/dynarmic/arm_dynarmic_32.cpp index 8aaf11eee..0831dd5d2 100644 --- a/src/core/arm/dynarmic/arm_dynarmic_32.cpp +++ b/src/core/arm/dynarmic/arm_dynarmic_32.cpp @@ -181,6 +181,9 @@ std::shared_ptr ARM_Dynarmic_32::MakeJit(Common::PageTable& if (Settings::values.cpuopt_unsafe_reduce_fp_error) { config.optimizations |= Dynarmic::OptimizationFlag::Unsafe_ReducedErrorFP; } + if (Settings::values.cpuopt_unsafe_inaccurate_nan) { + config.optimizations |= Dynarmic::OptimizationFlag::Unsafe_InaccurateNaN; + } } return std::make_unique(config); -- cgit v1.2.3 From b4451c5e8142ca0b46a97ba77c98edb305f97929 Mon Sep 17 00:00:00 2001 From: ReinUsesLisp Date: Fri, 8 Jan 2021 23:21:07 -0300 Subject: core: Silence unhandled enum in switch warnings --- src/core/arm/dynarmic/arm_dynarmic_32.cpp | 9 +-------- 1 file changed, 1 insertion(+), 8 deletions(-) (limited to 'src/core/arm/dynarmic/arm_dynarmic_32.cpp') diff --git a/src/core/arm/dynarmic/arm_dynarmic_32.cpp b/src/core/arm/dynarmic/arm_dynarmic_32.cpp index 0831dd5d2..6c4c8e9e4 100644 --- a/src/core/arm/dynarmic/arm_dynarmic_32.cpp +++ b/src/core/arm/dynarmic/arm_dynarmic_32.cpp @@ -71,15 +71,8 @@ public: } void ExceptionRaised(u32 pc, Dynarmic::A32::Exception exception) override { - switch (exception) { - case Dynarmic::A32::Exception::UndefinedInstruction: - case Dynarmic::A32::Exception::UnpredictableInstruction: - break; - case Dynarmic::A32::Exception::Breakpoint: - break; - } LOG_CRITICAL(Core_ARM, "ExceptionRaised(exception = {}, pc = {:08X}, code = {:08X})", - static_cast(exception), pc, MemoryReadCode(pc)); + exception, pc, MemoryReadCode(pc)); UNIMPLEMENTED(); } -- cgit v1.2.3