From cc73bad293cadb2323a821fa32bcd03c9d359e3e Mon Sep 17 00:00:00 2001 From: Subv Date: Mon, 2 Jul 2018 11:21:23 -0500 Subject: GPU: Added register definitions for the vertex buffer base element. --- src/video_core/engines/maxwell_3d.h | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/src/video_core/engines/maxwell_3d.h b/src/video_core/engines/maxwell_3d.h index 180be4ff4..58db81222 100644 --- a/src/video_core/engines/maxwell_3d.h +++ b/src/video_core/engines/maxwell_3d.h @@ -455,7 +455,11 @@ public: u32 enable[NumRenderTargets]; } blend; - INSERT_PADDING_WORDS(0x77); + INSERT_PADDING_WORDS(0x2D); + + u32 vb_element_base; + + INSERT_PADDING_WORDS(0x49); struct { u32 tsc_address_high; @@ -745,6 +749,7 @@ ASSERT_REG_POSITION(vertex_attrib_format[0], 0x458); ASSERT_REG_POSITION(rt_control, 0x487); ASSERT_REG_POSITION(independent_blend_enable, 0x4B9); ASSERT_REG_POSITION(blend, 0x4CF); +ASSERT_REG_POSITION(vb_element_base, 0x50D); ASSERT_REG_POSITION(tsc, 0x557); ASSERT_REG_POSITION(tic, 0x55D); ASSERT_REG_POSITION(code_address, 0x582); -- cgit v1.2.3