| Commit message (Collapse) | Author | Files | Lines | ||
|---|---|---|---|---|---|
| 2024-01-14 | core: Support multiple modules per patcher | GPUCode | 2 | -38/+72 | |
| 2023-12-26 | core: track separate heap allocation for linux | Liam | 4 | -0/+79 | |
| 2023-12-23 | kernel: instantiate memory separately for each guest process | Liam | 8 | -20/+20 | |
| 2023-12-20 | nce: hide shadowing warnings from dynarmic headers | Liam | 2 | -2/+6 | |
| 2023-12-19 | nce: increase handler stack size | Liam | 1 | -1/+1 | |
| 2023-12-19 | nce: fix read size in simd immediate emulation | Liam | 1 | -1/+2 | |
| 2023-12-12 | nce: adjust initialization for repeated calls | Liam | 1 | -8/+11 | |
| 2023-12-11 | nce: implement instruction emulation for misaligned memory accesses | Liam | 7 | -41/+3842 | |
| 2023-12-09 | debug: fix reading of module names | Liam | 1 | -1/+4 | |
| 2023-12-05 | arm: fix context save of vector regs | Liam | 1 | -6/+4 | |
| 2023-12-04 | core: refactor emulated cpu core activation | Liam | 16 | -1121/+974 | |
| 2023-12-02 | nce: fix pre-text patch for single modules | Liam | 1 | -0/+2 | |
| 2023-11-29 | core: Rename patcher file | GPUCode | 3 | -2/+2 | |
| 2023-11-25 | oaknut: Address warnings | GPUCode | 1 | -4/+0 | |
| 2023-11-25 | Address more review comments | GPUCode | 2 | -5/+8 | |
| 2023-11-25 | arm_nce: skip data aborts for crash handling parity | Liam | 1 | -3/+11 | |
| 2023-11-25 | arm: Print backtrace on data abort | GPUCode | 1 | -0/+2 | |
| 2023-11-25 | patch: check offsets from first code word | Liam | 1 | -3/+4 | |
| 2023-11-25 | arm_nce: skip dc cvac on possibly write-protected areas | Liam | 1 | -3/+1 | |
| 2023-11-25 | Address some review comments | GPUCode | 3 | -17/+9 | |
| 2023-11-25 | arm: Implement native code execution backend | Liam | 9 | -0/+1533 | |
| 2023-11-13 | core: check for thread dpc before eret | Liam | 1 | -8/+8 | |
| 2023-10-22 | kernel: update KProcess | Liam | 1 | -3/+3 | |
| 2023-07-22 | core: remove remaining uses of dynamic_cast | Liam | 5 | -14/+15 | |
| 2023-07-21 | settings,general: Rename non-confirming enums | lat9nq | 2 | -6/+6 | |
| 2023-07-15 | Fixes and workarounds to make UBSan happier on macOS | comex | 2 | -3/+3 | |
| There are still some other issues not addressed here, but it's a start. Workarounds for false-positive reports: - `RasterizerAccelerated`: Put a gigantic array behind a `unique_ptr`, because UBSan has a [hardcoded limit](https://stackoverflow.com/questions/64531383/c-runtime-error-using-fsanitize-undefined-object-has-a-possibly-invalid-vp) of how big it thinks objects can be, specifically when dealing with offset-to-top values used with multiple inheritance. Hopefully this doesn't have a performance impact. - `QueryCacheBase::QueryCacheBase`: Avoid an operation that UBSan thinks is UB even though it at least arguably isn't. See the link in the comment for more information. Fixes for correct reports: - `PageTable`, `Memory`: Use `uintptr_t` values instead of pointers to avoid UB from pointer overflow (when pointer arithmetic wraps around the address space). - `KScheduler::Reload`: `thread->GetOwnerProcess()` can be `nullptr`; avoid calling methods on it in this case. (The existing code returns a garbage reference to a field, which is then passed into `LoadWatchpointArray`, and apparently it's never used, so it's harmless in practice but still triggers UBSan.) - `KAutoObject::Close`: This function calls `this->Destroy()`, which overwrites the beginning of the object with junk (specifically a free list pointer). Then it calls `this->UnregisterWithKernel()`. UBSan complains about a type mismatch because the vtable has been overwritten, and I believe this is indeed UB. `UnregisterWithKernel` also loads `m_kernel` from the 'freed' object, which seems to be technically safe (the overwriting doesn't extend as far as that field), but seems dubious. Switch to a `static` method and load `m_kernel` in advance. | |||||
| 2023-07-09 | arm_interface: correct breakpoint rewind condition | Liam | 1 | -1/+1 | |
| 2023-06-28 | arm_dynarmic_32: Remove disabling of block linking on arm64 | Merry | 1 | -5/+0 | |
| 2023-06-13 | core: decouple ARM interface from Dynarmic | Liam | 12 | -151/+167 | |
| 2023-04-02 | core: arm_dynarmic_32: Update SaveContext/LoadContext. | bunnei | 1 | -13/+10 | |
| 2023-03-24 | memory: rename global memory references to application memory | Liam | 3 | -7/+7 | |
| 2023-03-22 | kernel: use KTypedAddress for addresses | Liam | 6 | -22/+22 | |
| 2023-02-14 | general: rename CurrentProcess to ApplicationProcess | Liam | 1 | -3/+3 | |
| 2023-02-07 | kernel/svc: switch to generated wrappers | Liam | 1 | -0/+1 | |
| 2023-01-14 | Be careful of mangled out of bounds read | Kelebek1 | 1 | -4/+0 | |
| 2023-01-14 | Add stacktrace symbol demangling | Kelebek1 | 1 | -14/+4 | |
| 2023-01-06 | externals: update dynarmic, xbyak | Liam | 2 | -0/+8 | |
| 2022-12-02 | core: add option to break on unmapped access | Liam | 3 | -6/+44 | |
| 2022-11-17 | Dynarmic: Remove inaccurate NaN from Auto CPU settings. | Fernando Sahmkow | 1 | -1/+0 | |
| 2022-11-09 | Initial ARM64 support | Liam | 3 | -9/+22 | |
| 2022-10-27 | arm_interface: curb infinite recursion in stacktrace generation | Liam | 2 | -2/+2 | |
| 2022-10-19 | core: hle: kernel: k_thread: Implement thread termination DPC. | bunnei | 1 | -0/+8 | |
| 2022-10-12 | k_server_session: preliminary support for userspace server sessions | Liam | 1 | -0/+1 | |
| 2022-08-20 | code: dodge PAGE_SIZE #define | Kyle Kienapfel | 1 | -2/+2 | |
| Some header files, specifically for OSX and Musl libc define PAGE_SIZE to be a number This is great except in yuzu we're using PAGE_SIZE as a variable Specific example `static constexpr u64 PAGE_SIZE = u64(1) << PAGE_BITS;` PAGE_SIZE PAGE_BITS PAGE_MASK are all similar variables. Simply deleted the underscores, and then added YUZU_ prefix Might be worth noting that there are multiple uses in different classes/namespaces This list may not be exhaustive Core::Memory 12 bits (4096) QueryCacheBase 12 bits ShaderCache 14 bits (16384) TextureCache 20 bits (1048576, or 1MB) Fixes #8779 | |||||
| 2022-08-09 | arm_dynarmic: Fix nullptr fastmem arenas | Merry | 2 | -7/+11 | |
| Unable to enable fastmem of exclusive access without a valid fastmem arena. | |||||
| 2022-08-08 | core/arm: fix build error | Liam | 2 | -2/+10 | |
| 2022-08-07 | arm_dynarmic_cp15: Implement CP15DMB/CP15DSB/CP15ISB | Merry | 2 | -4/+29 | |
| 2022-07-27 | chore: make yuzu REUSE compliant | Andrea Pappacoda | 3 | -9/+6 | |
| [REUSE] is a specification that aims at making file copyright information consistent, so that it can be both human and machine readable. It basically requires that all files have a header containing copyright and licensing information. When this isn't possible, like when dealing with binary assets, generated files or embedded third-party dependencies, it is permitted to insert copyright information in the `.reuse/dep5` file. Oh, and it also requires that all the licenses used in the project are present in the `LICENSES` folder, that's why the diff is so huge. This can be done automatically with `reuse download --all`. The `reuse` tool also contains a handy subcommand that analyzes the project and tells whether or not the project is (still) compliant, `reuse lint`. Following REUSE has a few advantages over the current approach: - Copyright information is easy to access for users / downstream - Files like `dist/license.md` do not need to exist anymore, as `.reuse/dep5` is used instead - `reuse lint` makes it easy to ensure that copyright information of files like binary assets / images is always accurate and up to date To add copyright information of files that didn't have it I looked up who committed what and when, for each file. As yuzu contributors do not have to sign a CLA or similar I couldn't assume that copyright ownership was of the "yuzu Emulator Project", so I used the name and/or email of the commit author instead. [REUSE]: https://reuse.software Follow-up to 01cf05bc75b1e47beb08937439f3ed9339e7b254 | |||||
| 2022-07-25 | kernel: unlayer CPU interrupt handling | Liam | 7 | -85/+25 | |
| 2022-07-16 | core/arm: skip watchpoint checks when reading instructions | Liam | 2 | -6/+6 | |
| 2022-07-15 | dynarmic: Abort watchpoints ASAP | Merry | 4 | -8/+3 | |
| 2022-07-15 | kernel: use KScheduler from mesosphere | Liam | 1 | -1/+2 | |
| 2022-06-25 | core/arm: better support for backtrace generation | Liam | 5 | -15/+51 | |
| 2022-06-23 | kernel: make current thread pointer thread local | Liam | 1 | -1/+1 | |
| 2022-06-22 | core/arm: increase minimum_run_cycles | Liam | 2 | -2/+2 | |
| 2022-06-22 | core/arm: re-enable cycle counting | merry | 2 | -6/+20 | |
| 2022-06-22 | dynarmic: Stop ReadCode callbacks to unmapped addresses | Liam | 4 | -24/+64 | |
| 2022-06-16 | core/debugger: memory breakpoint support | Liam | 6 | -27/+187 | |
| 2022-06-15 | core: centralize profile scope for Dynarmic | Liam | 1 | -0/+2 | |
| 2022-06-05 | common: consolidate ELF structure definitions | Liam | 1 | -72/+13 | |
| 2022-06-01 | core/debugger: Improved stepping mechanism and misc fixes | Liam | 6 | -80/+87 | |
| 2022-06-01 | core/debugger: Implement new GDB stub debugger | Liam | 6 | -16/+69 | |
| 2022-05-14 | general: Avoid ambiguous format_to compilation errors | Lioncash | 1 | -1/+1 | |
| Ensures that we're using the fmt version of format_to. These are also the only three outliers. All of the other formatters we have are properly qualified. | |||||
| 2022-04-24 | Remove unused PrepareReschedule function | Merry | 5 | -13/+0 | |
| 2022-04-23 | general: Convert source file copyright comments over to SPDX | Morph | 13 | -39/+26 | |
| This formats all copyright comments according to SPDX formatting guidelines. Additionally, this resolves the remaining GPLv2 only licensed files by relicensing them to GPLv2.0-or-later. | |||||
| 2022-04-21 | core/arm: separate backtrace collection | Liam | 6 | -90/+98 | |
| 2022-04-13 | dynarmic: Fix single core mode | merry | 2 | -2/+2 | |
| Regression introduced in a5d040df3d. Closes #8201. | |||||
| 2022-04-10 | dynarmic: Fix race when switching page tables | merry | 4 | -57/+84 | |
| 2022-04-09 | core: extract symbol reading | Liam | 3 | -129/+229 | |
| 2022-04-05 | dynarmic: Print stack trace on unrecognised instruction or other exception | merry | 2 | -0/+4 | |
| 2022-04-03 | arm_dynarmic: Use HaltReason for svc calls and reschedules | merry | 4 | -27/+19 | |
| 2022-04-03 | dynarmic: Better interrupts | merry | 5 | -22/+26 | |
| 2022-03-27 | arm_dynarmic_64: Invalidate on all cores | merry | 1 | -2/+4 | |
| 2022-03-26 | configuration: Add Paranoid CPU accuracy level | merry | 2 | -44/+56 | |
| Disables most optimizations for the paranoid. | |||||
| 2022-03-23 | Revert "dynarmic: Reduce size of code caches" | bunnei | 2 | -4/+4 | |
| 2022-03-19 | core: Reduce unused includes | ameerj | 1 | -2/+0 | |
| 2022-03-13 | dynarmic: Reduce size of code caches | Merry | 2 | -4/+4 | |
| 2022-02-27 | dynarmic: Inline exclusive memory accesses | merry | 5 | -4/+29 | |
| Inlines implementation of exclusive instructions into JITted code, improving performance of applications relying heavily on these instructions. We also fastmem these instructions for additional speed, with support for appropriate recompilation on fastmem failure. An unsafe optimization to disable the intercore global_monitor is also provided, should one wish to rely solely on cmpxchg semantics for safety. See also: merryhime/dynarmic#664 | |||||
| 2022-02-02 | general: Replace NonCopyable struct with equivalents | Lioncash | 1 | -1/+5 | |
| 2021-11-22 | arm: dynarmic: Cleanup icache op handling | jam1garner | 1 | -10/+9 | |
| 2021-11-22 | arm: dynarmic: Implement icache op handling for 'ic iallu' instruction | jam1garner | 1 | -0/+3 | |
| 2021-11-22 | arm: dynarmic: Implement icache op handling for 'ic ivau' instruction | jam1garner | 1 | -0/+18 | |
| 2021-11-04 | core: Remove unused includes | ameerj | 6 | -7/+0 | |
| 2021-10-24 | Fixed ARM_Dynamic_64 Step | Andrew Strelsky | 1 | -1/+1 | |
| 2021-07-08 | settings, arm_dynarmic, yuzu qt: Move CPU debugging option | lat9nq | 2 | -2/+2 | |
| Decouples the CPU debugging mode from the enumeration to its own boolean. After this, it moves the CPU Debugging tab over to a sub tab underneath the Debug tab in the configuration UI. | |||||
| 2021-07-08 | arm_dynarmic_64: Re-add fastmem_address_space_bits to Auto setting | lat9nq | 1 | -0/+1 | |
| 2021-07-08 | arm_dynarmic{32,64}: Fixes from test build | lat9nq | 2 | -18/+5 | |
| Now sets optimizations regardless of the Settings. Drops unsafe fastmem optimization. | |||||
| 2021-07-08 | core,common,yuzu qt: Add CPU accuracy option 'Auto' | lat9nq | 2 | -8/+36 | |
| The current CPU accuracy settings in yuzu are fairly polarized and require more than common knowledge to know what the optimal settings for yuzu would be. This adds a curated option called 'Auto' that applies a few at the moment known-good unsafe optimizations to Dynarmic. | |||||
| 2021-06-24 | common: Replace common_sizes into user-literals | Wunkolo | 2 | -4/+9 | |
| Removes common_sizes.h in favor of having `_KiB`, `_MiB`, `_GiB`, etc user-literals within literals.h. To keep the global namespace clean, users will have to use: ``` using namespace Common::Literals; ``` to access these literals. | |||||
| 2021-06-20 | Update dynarmic and add new unsafe CPU option. | Fernando Sahmkow | 1 | -0/+3 | |
| 2021-06-11 | General: Add settings for fastmem and disabling adress space check. | FernandoS27 | 2 | -2/+11 | |
| 2021-06-11 | core: Make use of fastmem | Markus Wick | 2 | -0/+5 | |
| 2021-05-29 | core/arm_interface: Improve the performance of memory fallbacks. | Markus Wick | 2 | -29/+31 | |
| We just create one memory subsystem. This is a constant all the time. So there is no need to call the non-inlined parent.Memory() helper on every callback. | |||||
| 2021-05-29 | externals: Update dynarmic. | Markus Wick | 6 | -11/+11 | |
| The new version supports fastmem on a64. | |||||
| 2021-05-27 | core/arm_interface: Call SVC after end of dynarmic block. | Markus Wick | 5 | -17/+42 | |
| So we can modify all of dynarmic states within SVC without ExceptionalExit. Especially as the ExceptionalExit hack is dropped on upstream dynarmic. | |||||
| 2021-05-26 | core/arm: Drop ChangeProcessorID. | Markus Wick | 5 | -12/+0 | |
| This code was used to switch the CPU ID on thread switches. However since "hle: kernel: multicore: Replace n-JITs impl. with 4 JITs.", the CPU ID is not a constant. This has been dead code since this rewrite, and dropped in dynarmic as well. So there is no need to keep it. | |||||
| 2021-05-16 | core: Make variable shadowing a compile-time error | Lioncash | 5 | -6/+6 | |
| Now that we have most of core free of shadowing, we can enable the warning as an error to catch anything that may be remaining and also eliminate this class of logic bug entirely. | |||||
| 2021-05-16 | general: Make CPU accuracy and related a Settings::Setting | lat9nq | 2 | -10/+10 | |
| Required to make CPU accuracy and unsafe settings available to use as a per-game setting. | |||||
| 2021-05-06 | hle: kernel: Rename Process to KProcess. | bunnei | 1 | -1/+1 | |
| 2021-05-04 | service: Resolve cases of member field shadowing | Lioncash | 4 | -16/+16 | |
| Now all that remains is for kernel code to be 'shadow-free' and then -Wshadow can be turned into an error. | |||||
| 2021-05-03 | core: Resolve misc cases of variable shadowing | Lioncash | 1 | -6/+5 | |
| Resolves shadowing warnings that aren't in a particularly large subsection of core. Brings us closer to turning -Wshadow into an error. All that remains now is for cases in the kernel (left untouched for now since a big change by bunnei is pending), and a few left over in the service code (will be tackled next). | |||||
| 2021-04-15 | common: Move settings to common from core. | bunnei | 2 | -2/+2 | |
| - Removes a dependency on core and input_common from common. | |||||
| 2021-04-02 | arm_dynarmic: Increase size of code cache | MerryMage | 2 | -0/+8 | |
| 2021-03-24 | arm_dynarmic: Always have a 'valid' jit instance | MerryMage | 4 | -53/+26 | |
| 2021-03-21 | core: arm_dynarmic: Ensure JIT state is saved/restored on page table changes. | bunnei | 2 | -0/+10 | |
| - We re-create the JIT here without preserving any state. | |||||
| 2021-02-01 | arm_dynarmic_32: Print out CPSR.T on exception | MerryMage | 2 | -2/+7 | |
| 2021-01-29 | arm: dynarmic: Reintroduce JIT checks on SaveContext/LoadContext. | bunnei | 2 | -0/+12 | |
| 2021-01-29 | core: arm: Remove unnecessary JIT checks. | bunnei | 2 | -24/+0 | |
| 2021-01-29 | arm: arm_dynarmic: Skip calls when JIT is invalid. | bunnei | 2 | -0/+24 | |
| - This can happen if called from an idle or suspension thread. | |||||
| 2021-01-11 | core: arm: arm_interface: Fix shadowing errors. | bunnei | 1 | -3/+4 | |
| 2021-01-09 | core: Silence unhandled enum in switch warnings | ReinUsesLisp | 1 | -8/+1 | |
| 2021-01-02 | dynarmic: Add Unsafe_InaccurateNaN optimization | MerryMage | 2 | -0/+6 | |
| 2020-12-30 | core/memory: Read and write page table atomically | ReinUsesLisp | 2 | -0/+2 | |
| Squash attributes into the pointer's integer, making them an uintptr_t pair containing 2 bits at the bottom and then the pointer. These bits are currently unused thanks to alignment requirements. Configure Dynarmic to mask out these bits on pointer reads. While we are at it, remove some unused attributes carried over from Citra. Read/Write and other hot functions use a two step unpacking process that is less readable to stop MSVC from emitting an extra AND instruction in the hot path: mov rdi,rcx shr rdx,0Ch mov r8,qword ptr [rax+8] mov rax,qword ptr [r8+rdx*8] mov rdx,rax -and al,3 and rdx,0FFFFFFFFFFFFFFFCh je Core::Memory::Memory::Impl::Read<unsigned char> mov rax,qword ptr [vaddr] movzx eax,byte ptr [rdx+rax] | |||||
| 2020-12-06 | hle: kernel: Rewrite scheduler implementation based on Mesopshere. | bunnei | 1 | -1/+1 | |
| 2020-12-06 | hle: kernel: physical_core: Clear exclusive state after each run. | bunnei | 2 | -0/+6 | |
| - This is closer to pre-multicore behavior, and works a bit better. | |||||
| 2020-11-29 | core: arm: Implement InvalidateCacheRange for CPU cache invalidation. | bunnei | 5 | -6/+29 | |
| 2020-11-29 | hle: kernel: multicore: Replace n-JITs impl. with 4 JITs. | bunnei | 5 | -0/+13 | |
| 2020-11-27 | core: Eliminate remaining usages of the global system instance | Lioncash | 1 | -11/+0 | |
| Removes all remaining usages of the global system instance. After this, migration can begin to migrate to being constructed and managed entirely by the various frontends. | |||||
| 2020-11-08 | cpu_interrupt_handler: Mark move contructor/assignment as deleted | Lioncash | 1 | -2/+2 | |
| The interrupt handler contains a std::atomic_bool, which isn't copyable or movable, so the special move member functions will always be deleted, despite being defaulted. This can resolve warnings on clang and GCC. | |||||
| 2020-11-04 | core: Remove usage of unicorn | Lioncash | 5 | -381/+9 | |
| Unicorn long-since lost most of its use, due to dynarmic gaining support for handling most instructions. At this point any further issues encountered should be used to make dynarmic better. This also allows us to remove our dependency on Python. | |||||
| 2020-10-30 | General: Resolve a few missing initializer warnings | Lioncash | 1 | -2/+10 | |
| Resolves a few -Wmissing-initializer warnings. | |||||
| 2020-10-21 | Revert "core: Fix clang build" | bunnei | 9 | -69/+53 | |
| 2020-10-18 | core: Fix clang build | Lioncash | 9 | -53/+69 | |
| Recent changes to the build system that made more warnings be flagged as errors caused building via clang to break. Fixes #4795 | |||||
| 2020-09-22 | General: Make use of std::nullopt where applicable | Lioncash | 1 | -3/+3 | |
| Allows some implementations to avoid completely zeroing out the internal buffer of the optional, and instead only set the validity byte within the structure. This also makes it consistent how we return empty optionals. | |||||
| 2020-09-17 | arm_dynarmic_cp15: Initialize member variables | Lioncash | 1 | -2/+2 | |
| Ensures that the member variables are always initialized to a deterministic value on creation. | |||||
| 2020-08-26 | cpu_interrupt_handler: Misc style changes | ReinUsesLisp | 2 | -5/+3 | |
| 2020-08-26 | cpu_interrupt_handler: Make is_interrupted an atomic | ReinUsesLisp | 2 | -2/+3 | |
| Fixes a race condition detected from tsan | |||||
| 2020-08-16 | dynarmic: Add unsafe optimizations | MerryMage | 2 | -2/+24 | |
| 2020-07-11 | configure_cpu: Show/Hide debugging options | MerryMage | 2 | -46/+50 | |
| 2020-07-11 | configuration: Add settings to enable/disable specific CPU optimizations | MerryMage | 2 | -10/+50 | |
| 2020-07-07 | cpu_interrupt_handler: Remove #pragma once from .cpp file | MerryMage | 1 | -2/+0 | |
| 2020-06-28 | Core/Common: Address Feedback. | Fernando Sahmkow | 8 | -10/+12 | |
| 2020-06-27 | SVC: Implement 32-bits wrappers and update Dynarmic. | Fernando Sahmkow | 2 | -4/+9 | |
| 2020-06-27 | ARM: Update Dynarmic and Setup A32 according to latest interface. | Fernando Sahmkow | 7 | -93/+166 | |
| 2020-06-27 | ArmDynarmic32: Setup CNTPCT correctly | Fernando Sahmkow | 1 | -1/+1 | |
| 2020-06-27 | ARMDynarmicInterface: Correct GCC Build Errors. | Fernando Sahmkow | 2 | -6/+6 | |
| 2020-06-27 | Clang Format. | Fernando Sahmkow | 2 | -4/+4 | |
| 2020-06-27 | ARMInterface/Externals: Update dynarmic and fit to latest version. | Fernando Sahmkow | 1 | -7/+7 | |
| 2020-06-27 | ARMInterface: Correct rebase errors. | Fernando Sahmkow | 3 | -5/+5 | |
| 2020-06-27 | Dynarmic Interface: don't clear cache if JIT has not been created. | Fernando Sahmkow | 2 | -0/+6 | |
| 2020-06-27 | General: Cleanup legacy code. | Fernando Sahmkow | 2 | -2/+0 | |
| 2020-06-27 | SingleCore: Use Cycle Timing instead of Host Timing. | Fernando Sahmkow | 7 | -34/+62 | |
| 2020-06-27 | General: Move ARM_Interface into Threads. | Fernando Sahmkow | 7 | -0/+17 | |
| 2020-06-27 | Core: Refactor ARM Interface. | Fernando Sahmkow | 7 | -18/+26 | |
| 2020-06-27 | X64 Clock: Reduce accuracy to be less or equal to guest accuracy. | Fernando Sahmkow | 1 | -0/+3 | |
| 2020-06-27 | ARM/WaitTree: Better track the CallStack for each thread. | Fernando Sahmkow | 2 | -0/+60 | |
| 2020-06-27 | SVC/ARM: Correct svcSendSyncRequest and cache ticks on arm interface. | Fernando Sahmkow | 2 | -4/+19 | |
| 2020-06-27 | ARM: Addapt to new Exclusive Monitor Interface. | Fernando Sahmkow | 3 | -22/+20 | |
| 2020-06-27 | General: Fix microprofile on dynarmic/svc, fix wait tree showing which threads were running. | Fernando Sahmkow | 2 | -8/+1 | |
| 2020-06-27 | ARM/Memory: Correct Exclusive Monitor and Implement Exclusive Memory Writes. | Fernando Sahmkow | 3 | -15/+63 | |
| 2020-06-27 | Scheduler: Remove arm_interface lock and a few corrections. | Fernando Sahmkow | 1 | -10/+0 | |
| 2020-06-27 | Core: Correct rebase. | Fernando Sahmkow | 1 | -12/+6 | |
| 2020-06-27 | General: Add better safety for JIT use. | Fernando Sahmkow | 1 | -0/+10 | |
| 2020-06-27 | General: Recover Prometheus project from harddrive failure | Fernando Sahmkow | 9 | -29/+103 | |
| This commit: Implements CPU Interrupts, Replaces Cycle Timing for Host Timing, Reworks the Kernel's Scheduler, Introduce Idle State and Suspended State, Recreates the bootmanager, Initializes Multicore system. | |||||
| 2020-06-22 | arm_dynarmic_64: Log the instruction when an exception is raised | Morph | 1 | -2/+2 | |
| 2020-06-22 | arm_dynarmic_32: Log under Core_ARM instead of HW_GPU | Morph | 1 | -1/+1 | |
| 2020-06-18 | arm_dynarmic_32: Fix implicit conversion error in SetTPIDR_EL0 | ReinUsesLisp | 1 | -1/+1 | |
| On MSVC builds we treat conversion warnings as errors. | |||||
| 2020-06-17 | arm_dynarmic_cp15: Implement CNTPCT | MerryMage | 1 | -0/+13 | |
| 2020-06-17 | arm_dynarmic_cp15: Update CP15 | MerryMage | 4 | -142/+73 | |
| 2020-06-17 | arm_dynarmic_32: InterpreterFallback should never happen | MerryMage | 1 | -2/+3 | |
| 2020-04-24 | physical_core: Make use of std::make_unique instead of std::make_shared in ctor | Lioncash | 3 | -7/+12 | |
| We can also allow unicorn to be constructed in 32-bit mode or 64-bit mode to satisfy the need for both interpreter instances. Allows this code to compile successfully of non x86-64 architectures. | |||||
| 2020-04-20 | dynarmic: Add option to disable CPU JIT optimizations | MerryMage | 1 | -2/+8 | |
| 2020-04-19 | core: arm_unicorn: Fix interpret fallback by temporarily mapping instruction page. | bunnei | 1 | -0/+11 | |
| 2020-04-17 | dynarmic: Enable strict alignment checks. | bunnei | 1 | -1/+4 | |
| - Also add a missing include. | |||||
| 2020-04-17 | core: memory: Move to Core::Memory namespace. | bunnei | 4 | -5/+5 | |
| - helpful to disambiguate Kernel::Memory namespace. | |||||
| 2020-04-17 | core: kernel: Move SVC to its own namesapce. | bunnei | 3 | -3/+3 | |
| 2020-04-17 | arm_interface: Ensure ThreadContext is zero'd out. | bunnei | 1 | -16/+16 | |
| 2020-04-16 | CMakeLists: Specify -Wextra on linux builds | Lioncash | 1 | -2/+2 | |
| Allows reporting more cases where logic errors may exist, such as implicit fallthrough cases, etc. We currently ignore unused parameters, since we currently have many cases where this is intentional (virtual interfaces). While we're at it, we can also tidy up any existing code that causes warnings. This also uncovered a few bugs as well. | |||||
| 2020-03-03 | core: Implement separate A32/A64 ARM interfaces. | bunnei | 8 | -71/+367 | |
| 2020-03-03 | core: dynarmic: Add CP15 from Citra. | bunnei | 2 | -0/+232 | |
| 2020-02-26 | ARM_Interface: Cache the JITs instead of deleting/recreating. | Fernando Sahmkow | 2 | -4/+19 | |
| This was a bug inherited from citra which was fixed by then at some time. This commit corrects such bug and ensures JITs are correctly recycled. | |||||
| 2020-02-12 | Core: Set all hardware emulation constants in a single file. | Fernando Sahmkow | 1 | -1/+2 | |
| 2020-01-31 | core/arm: Remove usage of global GetCurrentThread() | Lioncash | 2 | -2/+4 | |
| Now both CPU backends go through their referenced system instance to obtain the current thread. | |||||
| 2020-01-27 | System: Address Feedback | Fernando Sahmkow | 2 | -3/+5 | |
| 2020-01-26 | Core: Refactor CpuCoreManager to CpuManager and Cpu to Core Manager. | Fernando Sahmkow | 1 | -1/+1 | |
| This commit instends on better naming the new purpose of this classes. | |||||
| 2020-01-26 | ArmInterface: Delegate Exclusive monitor factory to exclusive monitor interfasce. | Fernando Sahmkow | 2 | -1/+22 | |
| 2020-01-01 | core/memory + arm/dynarmic: Use a global offset within our arm page table. | Markus Wick | 1 | -0/+1 | |
| This saves us two x64 instructions per load/store instruction. TODO: Clean up our memory code. We can use this optimization here as well. | |||||
| 2019-11-27 | core/memory: Migrate over Write{8, 16, 32, 64, Block} to the Memory class | Lioncash | 2 | -15/+22 | |
| The Write functions are used slightly less than the Read functions, which make these a bit nicer to move over. The only adjustments we really need to make here are to Dynarmic's exclusive monitor instance. We need to keep a reference to the currently active memory instance to perform exclusive read/write operations. | |||||
| 2019-11-27 | core/memory: Migrate over Read{8, 16, 32, 64, Block} to the Memory class | Lioncash | 2 | -18/+18 | |
| With all of the trivial parts of the memory interface moved over, we can get right into moving over the bits that are used. Note that this does require the use of GetInstance from the global system instance to be used within hle_ipc.cpp and the gdbstub. This is fine for the time being, as they both already rely on the global system instance in other functions. These will be removed in a change directed at both of these respectively. For now, it's sufficient, as it still accomplishes the goal of de-globalizing the memory code. | |||||
| 2019-11-27 | core: Prepare various classes for memory read/write migration | Lioncash | 6 | -9/+14 | |
| Amends a few interfaces to be able to handle the migration over to the new Memory class by passing the class by reference as a function parameter where necessary. Notably, within the filesystem services, this eliminates two ReadBlock() calls by using the helper functions of HLERequestContext to do that for us. | |||||
| 2019-11-12 | arm_unicorn: Resolve sign conversion warnings | Lioncash | 3 | -8/+10 | |
| While we're at it, this also resolves a type truncation warning as well, given the code was truncating from a 64-bit value to a 32-bit one. | |||||
| 2019-10-11 | Core_Timing: Address Feedback and suppress warnings. | Fernando Sahmkow | 2 | -2/+2 | |
| 2019-10-09 | Core Timing: Rework Core Timing to run all cores evenly. | Fernando Sahmkow | 2 | -2/+2 | |
| 2019-09-30 | Revert "arm_dynarmic: Check if jit is nullptr when preparing reschedule" | bunnei | 1 | -3/+0 | |
| 2019-07-13 | core: Remove CurrentArmInterface() global accessor | Lioncash | 1 | -3/+6 | |
| Replaces the final usage of the global accessor function and removes it. Removes one more enabler of global state. | |||||
| 2019-07-11 | core/arm: Remove obsolete Unicorn memory mapping | Lioncash | 5 | -31/+0 | |
| This was initially necessary when AArch64 JIT emulation was in its infancy and all memory-related instructions weren't implemented. Given the JIT now has all of these facilities implemented, we can remove these functions from the CPU interface. | |||||
| 2019-06-10 | arm_dynarmic: Check if jit is nullptr when preparing reschedule | Zach Hilman | 1 | -0/+3 | |
| Prevents crash with multiprocess loading. | |||||
| 2019-05-26 | loader: Move NSO module tracking to AppLoader | Zach Hilman | 1 | -8/+19 | |
| Also cleanup of general stuff | |||||
| 2019-05-25 | arm_interface: Expand backtrace generation | Zach Hilman | 2 | -7/+194 | |
| Returns results as a vector of entries for further processing. Logs addresses, offsets, and mangled name. | |||||
| 2019-04-12 | core/cpu_core_manager: Create threads separately from initialization. | Lioncash | 4 | -20/+25 | |
| Our initialization process is a little wonky than one would expect when it comes to code flow. We initialize the CPU last, as opposed to hardware, where the CPU obviously needs to be first, otherwise nothing else would work, and we have code that adds checks to get around this. For example, in the page table setting code, we check to see if the system is turned on before we even notify the CPU instances of a page table switch. This results in dead code (at the moment), because the only time a page table switch will occur is when the system is *not* running, preventing the emulated CPU instances from being notified of a page table switch in a convenient manner (technically the code path could be taken, but we don't emulate the process creation svc handlers yet). This moves the threads creation into its own member function of the core manager and restores a little order (and predictability) to our initialization process. Previously, in the multi-threaded cases, we'd kick off several threads before even the main kernel process was created and ready to execute (gross!). Now the initialization process is like so: Initialization: 1. Timers 2. CPU 3. Kernel 4. Filesystem stuff (kind of gross, but can be amended trivially) 5. Applet stuff (ditto in terms of being kind of gross) 6. Main process (will be moved into the loading step in a following change) 7. Telemetry (this should be initialized last in the future). 8. Services (4 and 5 should ideally be alongside this). 9. GDB (gross. Uses namespace scope state. Needs to be refactored into a class or booted altogether). 10. Renderer 11. GPU (will also have its threads created in a separate step in a following change). Which... isn't *ideal* per-se, however getting rid of the wonky intertwining of CPU state initialization out of this mix gets rid of most of the footguns when it comes to our initialization process. | |||||
| 2019-04-08 | kernel/svc: Deglobalize the supervisor call handlers | Lioncash | 4 | -39/+37 | |
| Adjusts the interface of the wrappers to take a system reference, which allows accessing a system instance without using the global accessors. This also allows getting rid of all global accessors within the supervisor call handling code. While this does make the wrappers themselves slightly more noisy, this will be further cleaned up in a follow-up. This eliminates the global system accessors in the current code while preserving the existing interface. | |||||
| 2019-04-07 | arm/arm_dynarmic: Remove unnecessary current_page_table member | Lioncash | 2 | -8/+0 | |
| Given the page table will always be guaranteed to be that of whatever the current process is, we no longer need to keep this around. | |||||
| 2019-04-04 | core: Add missing override specifiers where applicable | Lioncash | 3 | -4/+3 | |
| Applies the override specifier where applicable. In the case of destructors that are defaulted in their definition, they can simply be removed. This also removes the unnecessary inclusions being done in audin_u and audrec_u, given their close proximity. | |||||
| 2019-03-17 | core: Move PageTable struct into Common. | bunnei | 1 | -2/+2 | |
| 2019-03-15 | gdbstub: Fix some bugs in IsMemoryBreak() and ServeBreak. Add workaround to let watchpoints break into GDB. (#4651) | Dimitri A | 2 | -3/+4 | |
| * gdbstub: fix IsMemoryBreak() returning false while connected to client As a result, the only existing codepath for a memory watchpoint hit to break into GDB (InterpeterMainLoop, GDB_BP_CHECK, ARMul_State::RecordBreak) is finally taken, which exposes incorrect logic* in both RecordBreak and ServeBreak. * a blank BreakpointAddress structure is passed, which sets r15 (PC) to NULL * gdbstub: DynCom: default-initialize two members/vars used in conditionals * gdbstub: DynCom: don't record memory watchpoint hits via RecordBreak() For now, instead check for GDBStub::IsMemoryBreak() in InterpreterMainLoop and ServeBreak. Fixes PC being set to a stale/unhit breakpoint address (often zero) when a memory watchpoint (rwatch, watch, awatch) is handled in ServeBreak() and generates a GDB trap. Reasons for removing a call to RecordBreak() for memory watchpoints: * The``breakpoint_data`` we pass is typed Execute or None. It describes the predicted next code breakpoint hit relative to PC; * GDBStub::IsMemoryBreak() returns true if a recent Read/Write operation hit a watchpoint. It doesn't specify which in return, nor does it trace it anywhere. Thus, the only data we could give RecordBreak() is a placeholder BreakpointAddress at offset NULL and type Access. I found the idea silly, compared to simply relying on GDBStub::IsMemoryBreak(). There is currently no measure in the code that remembers the addresses (and types) of any watchpoints that were hit by an instruction, in order to send them to GDB as "extended stop information." I'm considering an implementation for this. * gdbstub: Change an ASSERT to DEBUG_ASSERT I have never seen the (Reg[15] == last_bkpt.address) assert fail in practice, even after several weeks of (locally) developping various branches around GDB. Only leave it inside Debug builds. | |||||
| 2019-02-16 | Corrections, documenting and fixes. | Fernando Sahmkow | 1 | -1/+1 | |
| 2019-02-16 | Use u128 on Clock Cycles calculation. | Fernando Sahmkow | 1 | -1/+1 | |
| 2019-02-16 | Correct CNTPCT to use Clock Cycles instead of Cpu Cycles. | Fernando Sahmkow | 1 | -2/+3 | |
| 2019-02-16 | core_timing: Convert core timing into a class | Lioncash | 4 | -10/+24 | |
| Gets rid of the largest set of mutable global state within the core. This also paves a way for eliminating usages of GetInstance() on the System class as a follow-up. Note that no behavioral changes have been made, and this simply extracts the functionality into a class. This also has the benefit of making dependencies on the core timing functionality explicit within the relevant interfaces. | |||||
| 2019-02-12 | core_timing: Rename CoreTiming namespace to Core::Timing | Lioncash | 2 | -5/+5 | |
| Places all of the timing-related functionality under the existing Core namespace to keep things consistent, rather than having the timing utilities sitting in its own completely separate namespace. | |||||
| 2018-12-31 | arm_interface: Make include path relative for arm_interface.h | Lioncash | 1 | -1/+1 | |
| Makes it consistent with the rest of the includes. | |||||
| 2018-12-31 | arm_interface: Make LogBacktrace() a const member function | Lioncash | 2 | -2/+2 | |
| This function doesn't modify instance state, so it can be made const. | |||||
| 2018-12-31 | arm_interface: Mark variables as const where applicable in LogBacktrace() | Lioncash | 1 | -3/+4 | |
| Two of these variables have fixed values, so we can make that immediately obvious from the get-go. | |||||
| 2018-12-31 | arm_interface: Remove unnecessary semicolon | Lioncash | 1 | -1/+1 | |
| Namespaces don't require the use of a semicolon. Silences a -Wextra-semi warning. | |||||
| 2018-12-29 | Moved log backtrace to arm_interface.cpp. Added printing of error code to fatal | David Marcec | 2 | -17/+33 | |
| 2018-12-19 | Moved backtrace to ArmInterface | David Marcec | 5 | -36/+17 | |
| 2018-12-18 | arm_dynarmic: Set CNTFRQ value | MerryMage | 1 | -0/+1 | |
| 2018-12-03 | Moved backtrace to ArmInterface | David Marcec | 5 | -0/+38 | |
| Added to both dynarmic and unicorn | |||||
| 2018-10-15 | core: Make the exclusive monitor a unique_ptr instead of a shared_ptr | Lioncash | 2 | -6/+5 | |
| Like the barrier, this is owned entirely by the System and will always outlive the encompassing state, so shared ownership semantics aren't necessary here. | |||||
| 2018-10-10 | kernel/thread: Use a regular pointer for the owner/current process | Lioncash | 1 | -1/+1 | |
| There's no real need to use a shared pointer in these cases, and only makes object management more fragile in terms of how easy it would be to introduce cycles. Instead, just do the simple thing of using a regular pointer. Much of this is just a hold-over from citra anyways. It also doesn't make sense from a behavioral point of view for a process' thread to prolong the lifetime of the process itself (the process is supposed to own the thread, not the other way around). | |||||
| 2018-10-04 | kernel/thread: Make all instance variables private | Lioncash | 2 | -2/+2 | |
| Many of the member variables of the thread class aren't even used outside of the class itself, so there's no need to make those variables public. This change follows in the steps of the previous changes that made other kernel types' members private. The main motivation behind this is that the Thread class will likely change in the future as emulation becomes more accurate, and letting random bits of the emulator access data members of the Thread class directly makes it a pain to shuffle around and/or modify internals. Having all data members public like this also makes it difficult to reason about certain bits of behavior without first verifying what parts of the core actually use them. Everything being public also generally follows the tendency for changes to be introduced in completely different translation units that would otherwise be better introduced as an addition to the Thread class' public interface. | |||||
| 2018-09-30 | kernel/process: Make data member variables private | Lioncash | 1 | -2/+2 | |
| Makes the public interface consistent in terms of how accesses are done on a process object. It also makes it slightly nicer to reason about the logic of the process class, as we don't want to expose everything to external code. | |||||
| 2018-09-30 | arm_interface: Add missing fpsr/tpidr members to the ThreadContext struct | Lioncash | 2 | -4/+14 | |
| Internally within the kernel, it also includes a member variable for the floating-point status register, and TPIDR, so we should do the same here to match it. While we're at it, also fix up the size of the struct and add a static assertion to ensure it always stays the correct size. | |||||
| 2018-09-25 | memory: Dehardcode the use of a 36-bit address space | Lioncash | 1 | -2/+3 | |
| Given games can also request a 32-bit or 39-bit address space, we shouldn't be hardcoding the address space range as 36-bit. | |||||
| 2018-09-23 | FPCR register was uninitialized at start up | Philippe Babin | 1 | -1/+1 | |
| 2018-09-21 | arm_interface: Replace kernel vm_manager include with a forward declaration | Lioncash | 3 | -1/+9 | |
| Avoids an unnecessary inclusion and also uncovers three places where indirect inclusions were relied upon, which allows us to also resolve those. | |||||
| 2018-09-20 | arm_dynarmic: Halt when BRK encountered | MerryMage | 1 | -0/+1 | |
| 2018-09-19 | arm_dynarmic: Support BKPT instruction | MerryMage | 1 | -0/+11 | |
| 2018-09-18 | arm_dynarmic: Correct ExclusiveWrite128()'s operation | Lioncash | 1 | -2/+2 | |
| Previously the second half of the value being written would overwrite the first half. Thankfully this wasn't a bug that was being encountered, as the function is currently unused. | |||||
| 2018-09-18 | arm_interface: Remove ARM11-isms from the CPU interface | Lioncash | 5 | -72/+59 | |
| This modifies the CPU interface to more accurately match an AArch64-supporting CPU as opposed to an ARM11 one. Two of the methods don't even make sense to keep around for this interface, as Adv Simd is used, rather than the VFP in the primary execution state. This is essentially a modernization change that should have occurred from the get-go. | |||||
| 2018-09-15 | Port #4182 from Citra: "Prefix all size_t with std::" | fearlessTobi | 6 | -36/+37 | |
| 2018-09-04 | Update microprofile scopes. | Markus Wick | 2 | -2/+6 | |
| Blame the subsystems which deserve the blame :) The updated list is not complete, just the ones I've spotted on random sampling the stack trace. | |||||
| 2018-08-31 | core/core: Replace includes with forward declarations where applicable | Lioncash | 1 | -0/+1 | |
| The follow-up to e2457418dae19b889b2ad85255bb95d4cd0e4bff, which replaces most of the includes in the core header with forward declarations. This makes it so that if any of the headers the core header was previously including change, then no one will need to rebuild the bulk of the core, due to core.h being quite a prevalent inclusion. This should make turnaround for changes much faster for developers. | |||||
| 2018-08-25 | core: Namespace all code in the arm subdirectory under the Core namespace | Lioncash | 7 | -2/+30 | |
| Gets all of these types and interfaces out of the global namespace. | |||||
| 2018-08-16 | dynarmic: Update to 550d662 | MerryMage | 1 | -0/+3 | |
| 550d662 load_store_exclusive: Define s == t state to be Constraint_NONE 0b69381 A64/translate: Allow for unpredictable behaviour to be defined 6d236d4 system: Implement MRS CNTFRQ_EL0 6cbb6fb A32/testenv: Add missing headers 6729328 externals: Update xbyak to v5.67 1812bd2 Squashed 'externals/xbyak/' changes from 2794cde7..671fc805 9a95802 externals: Document subtrees 714a840 A64: Implement SQ{ADD, SUB}, and UQ{ADD, SUB}'s vector variants 8cab459 A64: Implement UQADD/UQSUB's scalar variants 18a8151 ir: Add opcodes for unsigned saturating add and subtract a5660ee x64/reg_alloc: Use type alias for array returned by GetArgumentInfo() 29489b5 ir/value: Use type alias CoprocessorInfo for std::array<u8, 8> e23ba26 status_register_access: Add support for bits 0 and 1 of mask to MSR 55190bd fuzz_with_unicorn: Split utility functions into fuzz_util 23b049d A32/translate/load_store: Correct detection of writeback 7ec9f15 A32/translate: Add TranslateSingleInstruction efeecb4 A32/ir_emitter: Bug fix: IREmitter::ExceptionRaised using incorrect opcode 08d1d19 A32/decoders: Split instruction list into include file 2d929cc tests: Refactor unicorn_emu to allow for A32 unicorn f672368 microinstruction: Improve assert messages 7ebff50 emit_x64_vector: EmitVectorNarrow16: AVX512 implementation edce230 emit_x64_vector: EmitVectorNarrow32: prefer pblendw to loading constant | |||||
| 2018-08-13 | arm_dynarmic: Remove IsExecuting check from PrepareReschedule | MerryMage | 1 | -3/+1 | |
| No longer required. HaltExecution is a no-op if it is not currently executing. | |||||
| 2018-08-13 | CPU/Timing: Use an approximated amortized amount of ticks when advancing timing. | Subv | 1 | -1/+10 | |
| We divide the number of ticks to add by the number of cores (4) to obtain a more or less rough estimate of the actual number of ticks added. This assumes that all 4 cores are doing similar work. Previously we were adding ~4 times the number of ticks, thus making the games think that time was going way too fast. This lets us bypass certain hangs in some games like Breath of the Wild. We should modify our CoreTiming to support multiple cores (both running in a single thread, and in multiple host threads). | |||||
| 2018-08-07 | GDBStub works with both Unicorn and Dynarmic now (#941) | Hedges | 1 | -1/+1 | |
| * GDBStub works with both Unicorn and Dynarmic now * Tidy up | |||||
| 2018-07-31 | kernel: Remove unnecessary includes | Lioncash | 1 | -1/+1 | |
| Removes unnecessary direct dependencies in some headers and also gets rid of indirect dependencies that were being relied on to be included. | |||||
| 2018-07-31 | arm_dynarmic: Make SetTlsAddress() prototype and definition consistent | Lioncash | 1 | -1/+1 | |
| Makes the definition use the same type aliases as in its prototype. | |||||
| 2018-07-31 | arm_dynarmic: Remove unnecessary qualifying of ThreadContext | Lioncash | 1 | -3/+3 | |
| Given the ARM_Dynarmic class inherits from ARM_Interface, we don't need to qualify here. | |||||
| 2018-07-31 | arm_dynarmic: Correct initializer list order | Lioncash | 1 | -5/+3 | |
| Amends the initializer list to be in the same order that each variable would be initialized in. We also do this to ensure we don't use a bogus uninitialized instance of the exclusive monitor within MakeJit() We can also remove the jit member from the initializer list as this is initialized by PageTableChanged() | |||||
| 2018-07-24 | arm_dynarmic: Make MakeJit() a const member function | Lioncash | 2 | -3/+3 | |
| This functions doesn't modify instance state, so it can be a made a const member function. | |||||
| 2018-07-24 | exclusive_monitor: Use consistent type alias for u64 | Lioncash | 3 | -22/+18 | |
| Uses the same type aliases we use for virtual addresses, and converts one lingering usage of std::array<uint64_t, 2> to u128 for consistency. | |||||
| 2018-07-22 | Implement exclusive monitor | MerryMage | 4 | -8/+119 | |
| 2018-07-21 | CPU: Save and restore the TPIDR_EL0 system register on every context switch. | Subv | 5 | -0/+26 | |
| Note that there's currently a dynarmic bug preventing this register from being written. | |||||
| 2018-07-21 | arm_interface: Remove unused tls_address member of ThreadContext | Lioncash | 3 | -9/+0 | |
| Currently, the TLS address is set within the scheduler, making this member unused. | |||||
| 2018-07-16 | scheduler: Clear exclusive state when switching contexts | MerryMage | 5 | -0/+10 | |
| 2018-07-13 | More improvements to GDBStub (#653) | Hedges | 1 | -2/+2 | |
| * More improvements to GDBStub - Debugging of threads should work correctly with source and assembly level stepping and modifying registers and memory, meaning threads and callstacks are fully clickable in VS. - List of modules is available to the client, with assumption that .nro and .nso are backed up by an .elf with symbols, while deconstructed ROMs keep N names. - Initial support for floating point registers. * Tidy up as requested in PR feedback * Tidy up as requested in PR feedback | |||||
| 2018-07-03 | Update clang format | James Rowe | 1 | -1/+1 | |
| 2018-07-03 | Rename logging macro back to LOG_* | James Rowe | 1 | -1/+1 | |
| 2018-06-06 | GDB Stub Improvements (#508) | Hedges | 2 | -1/+41 | |
| * GDB Stub should work now. * Applied clang-format. * Replaced htonll with swap64. * Tidy up. | |||||
| 2018-05-11 | core: Implement multicore support. | bunnei | 1 | -1/+1 | |
| 2018-05-02 | general: Make formatting of logged hex values more straightforward | Lioncash | 2 | -2/+2 | |
| This makes the formatting expectations more obvious (e.g. any zero padding specified is padding that's entirely dedicated to the value being printed, not any pretty-printing that also gets tacked on). | |||||
| 2018-04-27 | general: Convert assertion macros over to be fmt-compatible | Lioncash | 2 | -3/+3 | |
| 2018-04-26 | core: Replace remaining old non-generic logger usages with fmt-capable equivalents | Lioncash | 1 | -2/+2 | |
| LOG_GENERIC usages will be amended in a follow-up to keep API changes separate from interface changes, as it will require removing a parameter from the relevant function in the VMManager class. | |||||
| 2018-03-24 | arm_dynarmic: Fix timing | MerryMage | 1 | -7/+3 | |
| 2018-03-19 | Clean Warnings (?) | N00byKing | 1 | -1/+1 | |
| 2018-03-16 | arm_interface: Support unmapping previously mapped memory. | bunnei | 5 | -2/+15 | |
| 2018-03-14 | core: Move process creation out of global state. | bunnei | 1 | -1/+2 | |
| 2018-02-25 | Implements citra-emu/citra#3184 | N00byKing | 5 | -35/+31 | |
| 2018-02-22 | Stub am::SetScreenShotPermission, and bsd::StartMonitoring functions | mailwl | 1 | -1/+2 | |
| 2018-02-21 | dynarmic: Update to 6b4c6b0 | MerryMage | 1 | -2/+18 | |
| 6b4c6b0 impl: Update PC when raising exception 7a1313a A64: Implement FDIV (vector) b2d781d system: Raise exception for YIELD, WFE, WFI, SEV, SEVL b277bf5 Correct FPSR and FPCR 7673933 A64: Implement USHL 8d0e558 A64: Implement UCVTF (vector, integer), scalar variant da9a4f8 A64: Partially implement FCVTZU (scalar, fixed-point) and FCVTZS (scalar, fixed-point) 7479684 A64: Implement system register TPIDR_EL0 0fd75fd A64: Implement system registers FPCR and FPSR 31e370c A64: Implement system register CNTPCT_EL0 9a88fd3 A64: Implement system register CTR_EL0 1d16896 A64: Implement NEG (vector) 3184edf IR: Add IR instruction ZeroVector 31f8fbc emit_x64_floating_point: Add maybe_unused to preprocess parameter 567eb1a A64: Implement FMINNM (scalar) c6d8fa1 A64: Implement FMAXNM (scalar) 616056d constant_pool: Add frame parameter a3747cb A64: Implement ADDP (scalar) 5cd5d9f reg_alloc: Only exchange GPRs dd0452a A64: Implement DUP (element), scalar variant e5732ea emit_x64_floating_point: Correct FP{Max,Min}{32,64} implementations for -0/+0 40eb9c3 A64: Implement FMAX (scalar), FMIN (scalar) 7cef39b fuzz_with_unicorn: QEMU's implementation of FCVT is incorrect 826dce2 travis: Switch unicorn repository 9605f28 a64/config: Allow NaN emulation accuracy to be set e9435bc a64_emit_x64: Add conf to A64EmitContext 30b596d fuzz_with_unicorn: Explicitly test floating point instructions be292a8 A64: Implement FSQRT (scalar) 3c42d48 backend_x64: Accurately handle NaNs 4aefed0 fuzz_with_unicorn: Print AArch64 disassembly | |||||
| 2018-02-21 | arm_dynarmic: LOG_INFO on unicorn fallback | MerryMage | 1 | -0/+4 | |
| 2018-02-12 | arm_dynarmic: Support direct page table access | MerryMage | 1 | -6/+14 | |
| 2018-02-09 | dynarmic: Update to 41ae12263 | MerryMage | 2 | -31/+45 | |
| Changes: Primarily implementing more A64 instructions | |||||
| 2018-01-20 | Fixes some cast warnings, partial port of citra #3064 (#106) | River City Ransomware | 1 | -3/+3 | |
| * Fixes some cast warnings, partially fixes citra #3064 * Converted casts to uint32_t to u32 * Ran clang-format | |||||
| 2018-01-16 | clang-format | MerryMage | 1 | -1/+2 | |
| 2018-01-16 | Build: Automagically handle unicorn | James Rowe | 1 | -1/+1 | |
| On MSVC if unicorn isn't found, fallback to bundled unicorn On everything else, fallback to building unicorn in externals Also fixes loading unicorn in msvc | |||||
| 2018-01-16 | Build: Add unicorn as a submodule and build it if needed | James Rowe | 1 | -1/+1 | |
| Adds a cmake custom target that will build unicorn on first compile and uses this in the build scripts as well. Updates Appveyor and Travis build scripts to work with the new unicorn build, and updates the paths to all of the different artifacts. | |||||
| 2018-01-13 | Update dynarmic to bc73004 | MerryMage | 1 | -12/+17 | |
| bc73004 a64_merge_interpret_blocks: Remove debug output 4e656ed tests/A64: Randomize PSTATE.<NZCV> fd9530b A64: Optimization: Merge interpret blocks 3c9eb04 testenv: Use format constants 324f3fc tests/A64: Unicorn interface fixes 98ecbe7 tests/A64: Fuzz against unicorn b1d38e7 tests/A64: Move TestEnvironment to own header 5218ad9 A64/data_processing_pcrel: bug: ADR{,P} instructions sign extend their immediate b1a8c39 A64/data_processing_addsub: bug: {ADD,SUB}S (extended register) instructions write to ZR when d = 31 64827fb a64_emit_x64: bug: A64CallSupervisor trampled callee-save registers 1bfa04d emit_x64: bug: OP m/r64, imm32 form instructions sign-extend their immediate on x64 edadeea A64 inferface: Use two argument static_assert 9ab1304 A64: Add ExceptionRaised IR instruction 6843eed Update readme 7438d07 A64/translate: Add TranslateSingleInstruction function | |||||
| 2018-01-13 | arm_unicorn: Log unmapped memory access address. | bunnei | 1 | -1/+1 | |
| 2018-01-13 | yuzu: Update license text to be consistent across project. | bunnei | 4 | -4/+4 | |
| 2018-01-12 | arm_dynarmic: Implement core | MerryMage | 5 | -62/+161 | |
| 2018-01-04 | arm_unicorn: Load/release unicorn DLL. | bunnei | 1 | -0/+16 | |
| 2018-01-04 | unicorn: Use for arm interface on Windows. | bunnei | 2 | -0/+240 | |
| 2018-01-04 | arm_dynarmic: More cleanup. | bunnei | 1 | -6/+0 | |
| 2018-01-04 | arm_dynarmic: Gut interface until dynarmic is ready for general use. | bunnei | 2 | -142/+44 | |
| 2018-01-03 | arm: Remove SkyEye/Dyncom code that is ARMv6-only. | bunnei | 28 | -14492/+6 | |
| 2017-10-23 | logging: Rename category "Core_ARM11" to "Core_ARM". | bunnei | 7 | -86/+86 | |
| 2017-09-30 | arm_interface: Set TLS address for dynarmic core. | bunnei | 5 | -0/+32 | |
| 2017-09-30 | arm: Use 64-bit addressing in a bunch of places. | bunnei | 5 | -74/+107 | |
| 2017-09-30 | Moved down_count to CoreTiming | Huw Pascoe | 5 | -28/+2 | |
| 2017-09-25 | ARM_Interface: Implement PageTableChanged | MerryMage | 5 | -6/+34 | |
| 2017-09-15 | CPU/Dynarmic: Disable the fast page-table access in dynarmic until it supports switching page tables at runtime. | Subv | 1 | -1/+3 | |
| 2017-08-21 | CPU/Dynarmic: Fixed a warning when incrementing the number of ticks in ExecuteInstructions. | Subv | 1 | -1/+1 | |
| 2017-08-21 | Dyncom: Use size_t instead of int to store the instruction offsets in the instruction cache. | Subv | 2 | -4/+4 | |
| Fixes a few warnings. | |||||
| 2017-08-21 | Dyncom: Fixed a conversion warning when decoding thumb instructions. | Subv | 1 | -1/+1 | |
| 2017-05-22 | fixup! Dyncom/VFP: Convert denormal outputs into 0 when the FTZ flag is enabled. | Subv | 2 | -4/+0 | |
| 2017-05-14 | Dyncom/VFP: Perform flush-to-zero on the second operand of vsub before sending it to vadd. | Subv | 1 | -2/+12 | |
| Previously we were letting vadd flush the value to positive 0, but there are cases where this behavior is wrong, for example, vsub: -0 - +0 = -0 vadd: -0 + +0 = +0 Now we'll flush the value to +0 inside vsub, and then negate it. | |||||
| 2017-05-09 | Dyncom/VFP: Strip the VFP_NAN_FLAG sentinel value when setting vfp exceptions. | Subv | 2 | -2/+2 | |
| 2017-05-09 | Revert "Remove `exceptions` parameter from `normaliseround` VFP functions" | Subv | 3 | -57/+28 | |
| This reverts commit edf30d84cc0e8299d61c98f5bb40a6428d1576bc. Conflicts: src/core/arm/skyeye_common/vfp/vfp_helper.h src/core/arm/skyeye_common/vfp/vfpdouble.cpp src/core/arm/skyeye_common/vfp/vfpsingle.cpp | |||||
| 2017-05-08 | Dyncom/VFP: Convert denormal outputs into 0 when the FTZ flag is enabled. | Subv | 2 | -0/+30 | |
| Inputs are still not flushed to 0 if they are denormals. | |||||
| 2017-05-08 | Dyncom: Remove disassembler code | Yuri Kunde Schlesner | 3 | -1587/+2 | |
| Had licensing issue around it, in addition to several bugs. Closes #1632, #1280 | |||||
| 2017-05-08 | Dyncom: Tweak types and log formatting | Yuri Kunde Schlesner | 3 | -8/+10 | |
| 2017-05-08 | Remove unused symbols code | Yuri Kunde Schlesner | 2 | -44/+0 | |
| 2017-02-18 | dyncom: Correct SXTAB16 and SXTB16 | MerryMage | 1 | -4/+4 | |
| 2017-02-03 | arm_dynarmic: Update memory interface | MerryMage | 1 | -10/+10 | |
| 2017-02-03 | arm_dynarmic: CP15 support | MerryMage | 4 | -5/+128 | |
| 2016-12-22 | arm_dynarmic: Provide MemoryReadCode callback | MerryMage | 1 | -0/+1 | |
| Change of interface in dynarmic 36082087ded632079b16d24137fdd0c450ce82ea | |||||
| 2016-12-22 | ThreadContext: Move from "core" to "arm_interface". | bunnei | 5 | -22/+21 | |
| 2016-12-15 | gdbstub: Remove global variable from public interface | Lioncash | 2 | -3/+3 | |
| Currently, this is only ever queried, so adding a function to check if the server is enabled is more sensible. If directly modifying this externally is ever desirable, it should be done by adding a function to the interface, rather than exposing implementation details directly. | |||||
| 2016-12-15 | core: Add missing #pragma once directives where applicable | Lioncash | 1 | -0/+2 | |
| 2016-12-11 | Core: Add a forgotten #include <cstring> for memcpy. | Emmanuel Gil Peyrot | 1 | -0/+1 | |
| 2016-11-26 | dynarmic: Add ticks based on ticks executed, not ticks requested | MerryMage | 1 | -2/+2 | |
| 2016-11-25 | Expose page table to dynarmic for optimized reads and writes to the JIT | James Rowe | 1 | -0/+1 | |
| 2016-09-21 | Use negative priorities to avoid special-casing the self-include | Yuri Kunde Schlesner | 11 | -11/+11 | |
| 2016-09-21 | Remove empty newlines in #include blocks. | Emmanuel Gil Peyrot | 15 | -40/+18 | |
| This makes clang-format useful on those. Also add a bunch of forgotten transitive includes, which otherwise prevented compilation. | |||||
| 2016-09-19 | Manually tweak source formatting and then re-run clang-format | Yuri Kunde Schlesner | 6 | -16/+15 | |
| 2016-09-18 | Sources: Run clang-format on everything. | Emmanuel Gil Peyrot | 22 | -6274/+5726 | |
| 2016-09-18 | Dyncom: Disable clang-format on the decoding table. | Emmanuel Gil Peyrot | 1 | -0/+3 | |
| 2016-09-15 | arm_dynarmic: Implement GetVFPSystemReg/SetVFPSystemReg. | bunnei | 1 | -5/+12 | |
| 2016-09-15 | arm: ResetContext shouldn't be part of ARM_Interface. | bunnei | 5 | -29/+0 | |
| 2016-09-15 | arm_dynarmic/arm_dyncom: Remove unnecessary "virtual" keyword. | bunnei | 2 | -2/+2 | |
| 2016-09-15 | dyncom: Use VFP_FPSCR/VFP_FPEXC. | bunnei | 1 | -4/+4 | |
| 2016-09-15 | dynarmic: Implement ARM CPU interface. | bunnei | 2 | -0/+227 | |
| 2016-08-27 | ARM: add ClearInstructionCache function | wwylele | 3 | -0/+11 | |
| 2016-08-22 | dyncom: Read-after-write in SMLA | MerryMage | 1 | -2/+4 | |
| In the case when RD === RN, RD was updated before AddOverflow was called to check for an overflow, resulting in an incorrect state of the Q flag. | |||||
| 2016-08-14 | Dyncom: Correct implementation of STM for R15 | MerryMage | 1 | -3/+4 | |
| 2016-07-28 | dyncom: Fix translation of thumb REVSH | MerryMage | 1 | -4/+13 | |
| 2016-06-12 | Make arm_dyncom_trans* into a fully fledged compilation unit | archshift | 3 | -53/+71 | |
| 2016-06-12 | arm_dyncom_interpreter: slightly change AllocBuffer to be intuitive | archshift | 1 | -15/+15 | |
| 2016-06-11 | arm_dyncom_interpreter: Add specialized GetAddressingOpLoadStoreT func | archshift | 2 | -39/+19 | |
| This allows us to get the addressing operation for STRT, LDRT, STRBT, and LDRBT. We do this so that translation functions don't need to see the addressing ops directly. | |||||
| 2016-06-11 | arm_dyncom_interpreter: rename operation functions to fit style guide | archshift | 2 | -34/+34 | |
| 2016-06-11 | arm_dyncom_interpreter: Rename anonymous enum to TransExtData | archshift | 4 | -166/+164 | |
| 2016-06-11 | arm_dyncom_interpreter.cpp: #include translation info from inc files | archshift | 3 | -2648/+2652 | |
| 2016-06-11 | Revert "Split huge interpreter source file into translation info and interpreter (+ some tiny misc style fixes)" | archshift | 4 | -2729/+2727 | |
| 2016-06-09 | arm_dyncom_interpreter: rename operation functions to fit style guide | archshift | 2 | -42/+42 | |
| 2016-06-09 | arm_dyncom_interpreter.cpp: Split by translation and interpreter logic | archshift | 4 | -2727/+2729 | |
| To facilitate the split, some small changes were made to names of various structures and functions. | |||||
| 2016-05-18 | Remove `exceptions` parameter from `normaliseround` VFP functions | Jannik Vogel | 3 | -28/+57 | |
| 2016-05-18 | Fix exception propagation for VFP single precision | Jannik Vogel | 2 | -33/+38 | |
| 2016-05-18 | Fix exception propagation for VFP double precision | Jannik Vogel | 2 | -34/+39 | |
| 2016-05-18 | Fix read-after-write in SMUAD, SMLAD, SMUSD, SMLSD | Jannik Vogel | 1 | -4/+8 | |
| 2016-05-17 | Set fpscr for new threads | Jannik Vogel | 1 | -0/+1 | |
| 2016-05-16 | Fix ftoi behaviour | Jannik Vogel | 2 | -22/+53 | |
| 2016-05-16 | Respect fpscr in ftoiz | Jannik Vogel | 2 | -4/+4 | |
| 2016-05-16 | Disable VFP3 instructions | Jannik Vogel | 1 | -0/+4 | |
| 2016-05-09 | dyncom: Reset the context into user mode correctly | Lioncash | 1 | -1/+1 | |
| The other mode was system mode. | |||||
| 2016-04-29 | Common: Remove section measurement from profiler (#1731) | Yuri Kunde Schlesner | 1 | -7/+0 | |
| This has been entirely superseded by MicroProfile. The rest of the code can go when a simpler frametime/FPS meter is added to the GUI. | |||||
| 2016-04-09 | Fix BLX LR opcode interpretation | mailwl | 1 | -2/+3 | |
| 2016-04-08 | Update cpsr (T)humb bit while creating thread | mailwl | 1 | -1/+1 | |
| 2016-04-06 | Fix thumb ADR instruction alignment | mailwl | 1 | -6/+2 | |
| 2016-04-05 | Common: Remove Common::make_unique, use std::make_unique | MerryMage | 1 | -3/+2 | |
| 2016-03-30 | DynCom: Optimize single stepping | MerryMage | 1 | -26/+57 | |
| 2016-03-21 | armstate: Correct FIQ register banking | Lioncash | 1 | -4/+3 | |
| FIQ has seven banked registers (R8 to R14), not two. | |||||
| 2016-01-19 | ARM_Disasm::DisassembleMemHalf: actually use width in determining opcode name | rob turner | 1 | -9/+9 | |
| 2015-12-30 | arm_dyncom_dec: Fix decoding of VMLS | Lioncash | 2 | -206/+202 | |
| Previously, all VMLS variants would misdecode as CDP (which isn't necessarily wrong in itself, however VMLS has it's own label of execution) | |||||
| 2015-12-28 | dyncom: Handle modifying the APSR via an MRC instruction | Lioncash | 1 | -12/+9 | |
| 2015-12-21 | dyncom: Remove PC dispatch from several instructions | Lioncash | 1 | -94/+0 | |
| These instructions aren't capable of using the PC as a destination | |||||
| 2015-12-20 | dyncom: Handle unprivileged load/store variants correctly | Lioncash | 1 | -7/+33 | |
| LDRT/LDRBT/STRBT/STRT should simulate the load or store as if the host CPU is in user mode. STRT is also allowed to use the PC as an operand | |||||
| 2015-12-06 | dyncom: Remove static keyword from header functions | Lioncash | 3 | -19/+19 | |
| 2015-12-06 | arm_interface: Make GetNumInstructions const | Lioncash | 1 | -1/+1 | |
| 2015-12-06 | arm_interface: directly initialize class members | Lioncash | 1 | -7/+2 | |
| 2015-12-06 | dyncom: const correctness changes | Lioncash | 3 | -7/+7 | |
| 2015-11-29 | armstate: Zero out the registers on creation | Lioncash | 1 | -11/+11 | |
| std::array isn't always guaranteed to explicitly zero out it's contents without an initializer list. | |||||
| 2015-10-12 | Remove unnecessary new lines, changed Deinit to Shutdown | polaris- | 1 | -1/+0 | |
| 2015-10-09 | CitraQt, SkyEye, Loader, VideoCore: Remove newlines in LOG_* calls. | Emmanuel Gil Peyrot | 3 | -45/+45 | |
| The LOG_* function itself already appends one. | |||||
| 2015-10-04 | Use BreakpointAddress struct instead of passing address directly | polaris- | 1 | -3/+3 | |
| 2015-10-04 | Implement gdbstub | polaris- | 3 | -9/+69 | |
| 2015-09-20 | Implement gdbstub | polaris- | 3 | -9/+69 | |
| 2015-09-16 | general: Silence some warnings when using clang | Lioncash | 1 | -1/+0 | |
| 2015-09-11 | General: Replace NULL and '0' usages with nullptr where applicable | Lioncash | 3 | -30/+30 | |
| 2015-09-06 | DynCom: Converted all 0xE condition code checks to ConditionCode::AL | archshift | 2 | -132/+132 | |
| 2015-08-26 | dyncom: Simplify some comparisons in CondPassed | Lioncash | 1 | -4/+4 | |
| 2015-08-26 | dyncom: Change return type of CondPassed to bool | Lioncash | 1 | -57/+39 | |
| 2015-08-25 | Integrate the MicroProfile profiling library | Yuri Kunde Schlesner | 1 | -0/+7 | |
| This brings goodies such as a configurable user interface and multi-threaded timeline view. | |||||
| 2015-08-16 | Memory: Move address type conversion routines to memory.cpp/h | Yuri Kunde Schlesner | 2 | -2/+0 | |
| These helpers aren't really part of the kernel, and mem_map.cpp/h is going to be moved there next. | |||||
| 2015-08-16 | vfp: use std::swap where applicable | Lioncash | 2 | -12/+6 | |
| 2015-08-11 | ARM Core, Video Core, CitraQt, Citrace: Use CommonTypes types instead of the standard u?int*_t types. | Emmanuel Gil Peyrot | 4 | -305/+310 | |
| 2015-08-11 | arm_disasm: ARMv6 mul/div and abs media instructions | aroulin | 2 | -1/+119 | |
| SMLAD, SMUAD, SMLSD, SMUSD, SMLALD, SMLSLD, SMMLA, SMMUL, SMMLS USAD8, USADA8 | |||||
| 2015-08-11 | arm_disasm: ARMv6 parallel add/sub media instructions | aroulin | 2 | -0/+167 | |
| {S, U, Q, UQ, SH, UH}{ADD16, ASX, SAX, SUB16, ADD8, SUB8} | |||||
| 2015-08-09 | arm_disasm: ARMv6 reversal media instructions | aroulin | 2 | -0/+26 | |
| REV, REV16, REVSH Only their ARM encoding, Thumb encoding is still missing. | |||||
| 2015-08-09 | arm_disasm: ARMv6 saturation media instructions | aroulin | 2 | -2/+55 | |
| SSAT, SSAT16, USAT, USAT16 | |||||
| 2015-08-09 | arm_disasm: ARMv6 packing and sign-extend media instructions | aroulin | 2 | -1/+181 | |
| PKH, SEL SXTAB, SXTAB16, SXTB, SXTB16, SXTH, SXTAH UXTAB, UXTAB16, UXTB, UXTB16, UXTH, UXTAH | |||||
| 2015-08-07 | arm_interface: Implement interface for retrieving VFP registers | Lioncash | 4 | -1/+49 | |
| 2015-08-07 | arm_disasm: Remove unnecessary code | Lioncash | 1 | -12/+4 | |
| This part of disassembly only determines the opcode, there's no need for offset calculation here. | |||||
| 2015-08-06 | Disassembler: ARMv6K REX instructions | aroulin | 2 | -6/+97 | |
| 2015-08-06 | Disassembler: ARMv6K hint instructions | aroulin | 2 | -0/+56 | |
| 2015-07-29 | dyncom: Remove an unused variable | Lioncash | 1 | -3/+0 | |
| This was used prior to InterpreterTranslate existing. | |||||
| 2015-07-29 | dyncom: Handle the case where PC is the source register for STR/VSTM/VLDM | Lioncash | 2 | -21/+40 | |
| 2015-07-29 | dyncom: Handle left-operand PC correctly for data-processing ops | Lioncash | 1 | -7/+33 | |
| This is considered deprecated in the ARM manual (using PC as an operand), however, this is still able to be executed on the MPCore (which I'm quite sure would be rare to begin with). | |||||
| 2015-07-28 | dyncom: Remove an unnecessary typedef | Lioncash | 2 | -7/+5 | |
| 2015-07-28 | dyncom: Use enum class for instruction decoding results | Lioncash | 5 | -41/+40 | |
| 2015-07-28 | dyncom: Remove code duplication regarding thumb instructions | Lioncash | 3 | -23/+12 | |
| 2015-07-28 | dyncom: Migrate exclusive memory access control into armstate | Lioncash | 2 | -50/+35 | |
| 2015-07-28 | dyncom: Remove duplicated typedef and extern | Lioncash | 1 | -4/+0 | |
| These are already present in arm_dyncom_dec.h. | |||||
| 2015-07-26 | dyncom: Use std::array for register arrays | Lioncash | 2 | -28/+29 | |
| 2015-07-26 | dyncom: Use ARMul_State as an object | Lioncash | 11 | -1102/+1022 | |
| Gets rid of C-like parameter passing. | |||||
| 2015-07-26 | dyncom: Remove unnecessary initialization code. | Lioncash | 4 | -59/+2 | |
| Targeting ARM version variants was only a thing on armemu. The reset routine also does basically the same thing as NewState. | |||||
| 2015-07-26 | dyncom: Remove unnecessary abort-related cruft | Lioncash | 2 | -48/+1 | |
| Both the MPCore and the ARM9 have the same data abort model (base restored), so differentiating isn't necessary. | |||||
| 2015-07-26 | dyncom: Rename armdefs.h to armstate.h | Lioncash | 13 | -31/+31 | |
| 2015-07-26 | dyncom: Get rid of skyeye typedefs | Lioncash | 7 | -61/+55 | |
| 2015-07-26 | dyncom: Move helper functions to their own header | Lioncash | 9 | -41/+56 | |
| 2015-07-26 | dyncom: Move arminit.cpp and armsupp.cpp into skyeye_common | Lioncash | 2 | -0/+0 | |
| 2015-07-26 | armdefs: Remove unnecessary extern keywords | Lioncash | 1 | -25/+25 | |
| 2015-07-21 | dyncom: Pass SVC immediates directly. | Lioncash | 1 | -1/+2 | |
| Previously it would just re-read the already decoded instruction and extract the immediate value. | |||||
| 2015-07-20 | dyncom: Properly retrieve the PC value in BX if used. | Lioncash | 1 | -3/+5 | |
| 2015-07-18 | Dyncom: Support for a missing ARMv6 Thumb MOV encoding | Yuri Kunde Schlesner | 1 | -10/+4 | |
| 2015-07-17 | arm_dyncom_interpreter: Simplify assignment in SMLAW | Lioncash | 1 | -1/+1 | |
| Also a side-benefit of not having implementation-defined behavior. | |||||
| 2015-06-29 | vfp: Change return type of VFPInit from unsigned int to void. | Lioncash | 2 | -4/+2 | |
| 2015-06-29 | vfp: Handle accesses to FPINST/FPINST2 system registers | Lioncash | 4 | -42/+53 | |
| Also has a side-benefit of correcting access to the FPEXC register. | |||||
| 2015-06-28 | Core, VideoCore: Replace or fix exit() calls. | Emmanuel Gil Peyrot | 2 | -4/+6 | |
| 2015-06-28 | Core: Cleanup core includes. | Emmanuel Gil Peyrot | 1 | -0/+5 | |
| 2015-06-28 | Common: Fix FileUtil includes, and everything relying on those. | Emmanuel Gil Peyrot | 1 | -0/+1 | |
| 2015-06-13 | vfp: Handle accesses to the VFP media feature registers | Lioncash | 3 | -4/+8 | |
| These are able to be accessed in any privilege mode. | |||||
| 2015-06-12 | vfp: Implement VMOVBCR/VMOVBRC | Lioncash | 2 | -5/+8 | |
| 2015-06-04 | arm_dyncom_thumb: Fix handling of writeback for thumb LDMIA | Lioncash | 1 | -5/+19 | |
| 2015-06-01 | arm_dyncom_thumb: Fix encoding of BKPT's immediate | Lioncash | 1 | -1/+4 | |
| 2015-06-01 | arm_dyncom_thumb: Implement CPS and SETEND | Lioncash | 1 | -0/+13 | |
| 2015-06-01 | arm_dyncom_thumb: Implement SXTH, SXTB, UXTH, and UXTB. | Lioncash | 1 | -0/+11 | |
| 2015-06-01 | arm_dyncom_thumb: Implement REV, REV16, and REVSH. | Lioncash | 1 | -2/+12 | |
| 2015-05-29 | Remove every trailing whitespace from the project (but externals). | Emmanuel Gil Peyrot | 6 | -24/+24 | |
| 2015-05-27 | arm_dyncom_thumb: Merge STR/LDR table subsets. | Lioncash | 1 | -22/+11 | |
| 2015-05-26 | arm_dyncom_interpreter: Remove unused variable | Lioncash | 1 | -5/+1 | |
| Thum decoding directly checks if the thumb bit is set instead of using a temporary. | |||||
| 2015-05-25 | arm_dyncom_interpreter: Remove unused macro | Lioncash | 1 | -1/+0 | |
| 2015-05-24 | dyncom: Get rid of armemu.h | Lioncash | 4 | -49/+29 | |
| 2015-05-23 | dyncom: Remove unused cpu parameter from decode_thumb_instr | Lioncash | 1 | -3/+2 | |
| 2015-05-23 | dyncom: remove load_r15 from arm_inst | Lioncash | 2 | -490/+331 | |
| It's entirely unused. Also allows getting rid of more clunky macros. | |||||
| 2015-05-23 | dyncom: Remove unnecessary parameter for load/store operations | Lioncash | 1 | -39/+39 | |
| 2015-05-23 | VFP: Log as trace to get rid of spamming. | bunnei | 1 | -23/+23 | |
| 2015-05-21 | dyncom: Eliminate clang warnings | Lioncash | 4 | -406/+404 | |
| Gets rid of a whole load of missing brace initialization warnings. | |||||
| 2015-05-15 | Memmap: Re-organize memory function in two files | Yuri Kunde Schlesner | 3 | -3/+2 | |
| memory.cpp/h contains definitions related to acessing memory and configuring the address space mem_map.cpp/h contains higher-level definitions related to configuring the address space accoording to the kernel and allocating memory. | |||||
| 2015-05-14 | dyncom: Add ARMv6K NOP and hint instructions to the decoding table | Lioncash | 2 | -12/+152 | |
| 2015-05-14 | dyncom: Handle some MSR variants individually | Lioncash | 2 | -24/+41 | |
| This is necessary, as hint instructions will be recognized as MSR, which is pretty bad. | |||||
| 2015-05-14 | dyncom: Move exclusive load/stores above bbl and swi in the decoding table | Lioncash | 2 | -14/+15 | |
| 2015-05-14 | dyncom: Remove duplicate enums/prototypes | Lioncash | 1 | -7/+1 | |
| These are already defined in arm_dyncom_interpreter_dec.cpp. | |||||
| 2015-05-14 | dyncom: Remove unnecessary defines | Lioncash | 1 | -4/+4 | |
| These can simply be const vars. | |||||
| 2015-05-14 | dyncom: Make translation-unit functions and variables static | Lioncash | 1 | -66/+64 | |
| 2015-05-14 | vfp: Get rid of warnings | Lioncash | 2 | -6/+6 | |
| - Unary minus operator applied to unsigned type. - Unsafe use of bool. | |||||
| 2015-05-14 | dyncom: Remove unnecessary typedefs | Lioncash | 2 | -196/+197 | |
| 2015-05-14 | dyncom: Remove unused structs | Lioncash | 1 | -8/+0 | |
| 2015-05-14 | dyncom: Removed irrelevant log. | bunnei | 1 | -2/+0 | |
| 2015-05-13 | dyncom: Fix decoding of BKPT's immediate | Lioncash | 1 | -1/+1 | |
| A shift here is intended since the representation is imm12:imm4 | |||||
| 2015-05-12 | dyncom: Stub MCRR and MRRC | Lioncash | 1 | -7/+68 | |
| There's no other coprocessor outside the VFP (which has its own VMOV variants) in which the MPCore can send/retrieve data from. Stubbed so citra won't crash and burn on the odd chance someone actually tries to use these. | |||||
| 2015-05-11 | vfp: Handle flush-to-zero mode. | Lioncash | 3 | -84/+98 | |
| 2015-05-11 | fixup! Set the TLS address in the scheduler | Subv | 3 | -7/+3 | |
| 2015-05-11 | Core/Memory: Give every emulated thread it's own TLS area. | Subv | 3 | -3/+7 | |
| The TLS area for thread T with id Ti is located at TLS_AREA_VADDR + (Ti - 1) * 0x200. This allows some games like Mario Kart 7 to continue further. | |||||
| 2015-05-08 | Remove unnecessary dyncom header files | Lioncash | 5 | -80/+2 | |
| 2015-05-08 | dyncom: Remove an unnecessary variable in the interpreter | Lioncash | 1 | -19/+17 | |
| All this was doing was needlessly aliasing a variable. | |||||
| 2015-05-07 | Common: Remove common.h | Yuri Kunde Schlesner | 3 | -2/+2 | |
| 2015-05-07 | Clean-up includes | Yuri Kunde Schlesner | 2 | -0/+4 | |
| 2015-05-06 | HLE: Clean up SVC dispatch mechanism | Yuri Kunde Schlesner | 1 | -2/+2 | |
| 2015-05-02 | Dyncom: Move cream cache to ARMul_State. | bunnei | 4 | -25/+18 | |
| 2015-04-20 | dyncom: Remove more unused/unnecessary code | Lioncash | 4 | -92/+1 | |
| Gets rid of a sizeable amount of stuff in armdefs. | |||||
| 2015-04-18 | dyncom: Remove unused/unnecessary VFP cruft | Lioncash | 6 | -822/+15 | |
| 2015-04-14 | Core_ARM11: Replace debug prints with our own logging functions in vfpsingle. | Emmanuel Gil Peyrot | 2 | -39/+36 | |
| 2015-04-14 | Headers: Add some forgotten overrides, thanks clang! | Emmanuel Gil Peyrot | 1 | -1/+1 | |
| 2015-04-07 | dyncom: Remove unnecessary enum and typedef | Lioncash | 5 | -50/+30 | |
| Also fixes descriptions in the process. | |||||
| 2015-04-06 | vfp: Make the FPSID values match the MPCore | Lioncash | 1 | -7/+7 | |
| 2015-04-06 | vfp: Get rid of the VFP_OFFSET macro | Lioncash | 5 | -64/+69 | |
| 2015-04-06 | core: Migrate 3DS-specific CP15 register setting into Init | Lioncash | 1 | -8/+0 | |
| 2015-04-06 | arm_interface: Support retrieval/storage to CP15 registers | Lioncash | 3 | -0/+25 | |
| 2015-04-06 | Move CP15 enum definitions into their own enum. | Lioncash | 5 | -168/+163 | |
| Also gets rid of preprocessor mumbo-jumbo | |||||
| 2015-04-06 | dyncom: Properly return the value of the user RO thread register | Lioncash | 2 | -4/+10 | |
| 2015-04-06 | dyncom: Set CP15 reset values on initialization | Lioncash | 1 | -0/+60 | |
| 2015-04-06 | dyncom: Suppress uninitialized variable warnings | Lioncash | 1 | -4/+4 | |
| The switch cases will always be hit, but this makes compilers stop complaining. | |||||
| 2015-04-02 | dyncom: Move CP15 register writing into its own function. | Lioncash | 4 | -88/+265 | |
| Also implements writing to the rest of the ARM11 MPCore CP15 register set. | |||||
| 2015-04-02 | dyncom: Move CP15 register reading into its own function. | Lioncash | 4 | -49/+253 | |
| Keeps everything contained. Added all supported readable registers in an ARM11 MPCore. | |||||
| 2015-03-26 | dyncom: Migrate InAPrivilegedMode to armsupp | Lioncash | 3 | -4/+7 | |
| It's a generic helper function, so it should be here anyway. | |||||
| 2015-03-24 | dyncom: Implement SRS | Lioncash | 1 | -1/+32 | |
| 2015-03-24 | dyncom: Implement RFE | Lioncash | 1 | -1/+30 | |
| 2015-03-24 | dyncom: Remove unused/unnecessary macros and macro constants | Lioncash | 2 | -39/+2 | |
| 2015-03-21 | armmmu: Remove unnecessary enum values | Lioncash | 1 | -30/+20 | |
| We don't need to care about XScale or Intel specific ARM stuff. | |||||
| 2015-03-17 | dyncom: Make Load/Store instructions support big endian | Lioncash | 5 | -82/+198 | |
| 2015-03-16 | arm_interface: Get rid of GetTicks. | Lioncash | 3 | -12/+0 | |
| Removes a TODO. | |||||
| 2015-03-15 | dyncom: Implement SETEND | Lioncash | 1 | -1/+35 | |
| 2015-03-10 | dyncom: Minor cleanup | Lioncash | 1 | -26/+7 | |
| Assemblers will exit with an error when trying to assemble instructions with disallowed registers. | |||||
| 2015-03-09 | dyncom: Fix an indexing bug in STM | Lioncash | 1 | -5/+4 | |
| Previously it would write the contents of register 13 for the case where the link register (r14) is supposed to be written. | |||||
| 2015-03-09 | dyncom: General cleanup of STM | Lioncash | 1 | -16/+14 | |
| 2015-03-09 | dyncom: Increment addr when accessing LR in LDM | Lioncash | 1 | -0/+2 | |
| 2015-03-04 | vfp: Get rid of warnings | Lioncash | 2 | -4/+4 | |
| 2015-03-02 | Add profiling infrastructure and widget | Yuri Kunde Schlesner | 1 | -0/+8 | |
| 2015-02-28 | arm_disasm: Show conditional code for BKPT instructions. | Lioncash | 1 | -2/+3 | |
| Changed cond_to_str to take a uint32, since unsigned numbers are only ever passed to it, and this can be a source of warnings for some compilers (also indexing an array without bounds checking a signed number is kind of iffy). | |||||
| 2015-02-28 | arm_disasm: Remove unused variable | Lioncash | 1 | -2/+1 | |
| Also declared an array as static, as it's only used in this translation unit. | |||||
| 2015-02-26 | arm: The CP15 Main ID register is not writeable | Lioncash | 1 | -3/+1 | |
| 2015-02-25 | arm: Remove unnecessary booleans | Lioncash | 2 | -22/+5 | |
| We don't care about any of these. | |||||
| 2015-02-22 | Cleaned up unaligned access. | Kevin Hartman | 1 | -17/+2 | |
| 2015-02-18 | vfpinstr: Fix trivial signed/unsigned mismatch warnings | Lioncash | 1 | -4/+4 | |
| 2015-02-17 | dyncom: Support conditional BKPT instructions | Lioncash | 2 | -2/+28 | |
| 2015-02-16 | dyncom: Actually set the destination register for USAD8/USADA8. | Lioncash | 1 | -0/+1 | |
| Idiotville: Population: 1 - Inhabitant name: Lioncash | |||||
| 2015-02-15 | vfpdouble: Use %p for printing pointer addresses. | Lioncash | 1 | -2/+2 | |
| 2015-02-15 | arm: Set the A bit on reset. | Lioncash | 1 | -1/+1 | |
| This enum value is ORed against in ARMul_Reset (and used to refer to all interrupt bits in the CPSR). So simply updating this is enough. | |||||
| 2015-02-13 | core: Apply static to local functions | Lioncash | 5 | -221/+227 | |
| 2015-02-13 | arm: General cleanup | Lioncash | 13 | -227/+116 | |
| - Remove several typedefs for ARMul_State. - Remove unused functions - Remove unused/unnecessary headers - Removed unused enums, etc. | |||||
| 2015-02-13 | dyncom: Switch the app and system cores into the correct mode at initialization | Lioncash | 4 | -12/+17 | |
| 2015-02-13 | dyncom: Clean up the constructor | Lioncash | 3 | -16/+7 | |
| Some function calls aren't necessary and would be handled by regular initialization routines. | |||||
| 2015-02-13 | dyncom: Remove warning for SXTAH | Lioncash | 1 | -1/+0 | |
| This is tested to work correctly. | |||||
| 2015-02-12 | arm: Remove ARMul_EmulateInit | Lioncash | 4 | -55/+1 | |
| This was only used for armemu, which has since been removed. Removed components related to this as well. | |||||
| 2015-02-12 | armdefs: Remove unnecessary extern C | Lioncash | 1 | -6/+0 | |
| 2015-02-11 | arm: Remove ARM26 support. | Lioncash | 2 | -45/+4 | |
| This will never be used. 32-bit is the norm. | |||||
| 2015-02-11 | arm: Get rid of some magic constants. Specify proper ARM mode. | Lioncash | 3 | -3/+10 | |
| Initially, we were starting the emulator in USER26MODE, which is incorrect, this should be USER32MODE. | |||||
| 2015-02-11 | arm: Change some more constants into enums | Lioncash | 2 | -21/+30 | |
| 2015-02-11 | Asserts: break/crash program, fit to style guide; log.h->assert.h | archshift | 2 | -1/+2 | |
| Involves making asserts use printf instead of the log functions (log functions are asynchronous and, as such, the log won't be printed in time) As such, the log type argument was removed (printf obviously can't use it, and it's made obsolete by the file and line printing) Also removed some GEKKO cruft. | |||||
| 2015-02-10 | arm: Remove TRUE/FALSE defines | Lioncash | 4 | -28/+19 | |
| - Removed the Debug parameter from ARMul_State since it isn't used. - Changed ARMul_CoProInit to a void function. It always returned true. | |||||
| 2015-02-10 | arm_dyncom_thumb: Make lookup tables static | Lioncash | 1 | -7/+7 | |
| These don't need to be recreated all the time. | |||||
| 2015-02-10 | dyncom: Add more regs to MCR/MRC | Lioncash | 2 | -18/+35 | |
| Adds the registers that were left out of some coprocessor ranges. | |||||
| 2015-02-10 | vfp: Normalize accumulator for multiply accumulate instructions | Lioncash | 2 | -0/+6 | |
| 2015-02-10 | Scheduler refactor Pt. 1 | Kevin Hartman | 3 | -56/+20 | |
| * Simplifies scheduling logic, specifically regarding thread status. It should be much clearer which statuses are valid for a thread at any given point in the system. * Removes dead code from thread.cpp. * Moves the implementation of resetting a ThreadContext to the corresponding core's implementation. Other changes: * Fixed comments in arm interfaces. * Updated comments in thread.cpp * Removed confusing, useless, functions like MakeReady() and ChangeStatus() from thread.cpp. * Removed stack_size from Thread. In the CTR kernel, the thread's stack would be allocated before thread creation. | |||||
| 2015-02-09 | vfpdouble: Fix the FTOUI NaN sign setting | Lioncash | 1 | -1/+1 | |
| This was fixed for vfpsingle, but not vfpdouble | |||||
| 2015-02-09 | Throw more unused/unnecessary VFP code out | Lioncash | 3 | -215/+1 | |
| 2015-02-09 | vfp_helper: Convert some flags to enums. Throw out more duplicated FPSCR stuff | Lioncash | 4 | -192/+153 | |
| 2015-02-09 | vfp_helper: Normalize tabs to spaces | Lioncash | 1 | -172/+170 | |
| 2015-02-06 | vfp_helper: Remove unnecessary extern C blocks | Lioncash | 1 | -17/+1 | |
| 2015-02-06 | vfp: Move FPSID, FPEXC, and FPSCR values over to enums. | Lioncash | 3 | -150/+104 | |
| Also got rid of duplicate definitions of some of these values. | |||||
| 2015-02-04 | vfp: Fix VCVT | Lioncash | 1 | -6/+6 | |
| These variants exclusively read from the single precision regs and write to double-precision registers Fixes issues where converted values would be way off from what they should be due to the results being stored in the wrong registers. | |||||
| 2015-02-04 | vfp: Throw out unused code | Lioncash | 2 | -1765/+0 | |
| 2015-02-03 | dyncom: Remove more unnecessary code | Lioncash | 1 | -45/+3 | |
| 2015-02-03 | core: Fix some warnings on OSX | Lioncash | 1 | -2/+4 | |
| 2015-02-01 | vfp: Get rid of some compile warnings | Lioncash | 2 | -6/+3 | |
| 2015-02-01 | arm: Clean up ARMul_State | Lioncash | 3 | -136/+83 | |
| Remove unnecessary/unused struct variables. | |||||
| 2015-02-01 | arm: Adios armemu | Lioncash | 12 | -8576/+164 | |
| 2015-01-30 | dyncom: clean up arm_dyncom_dec.h | Lioncash | 1 | -43/+2 | |
| 2015-01-30 | arm: Move headers over to pragma once | Lioncash | 7 | -31/+11 | |
| 2015-01-30 | arm: Get rid of armcpu.h and skyeye_types.h | Lioncash | 5 | -113/+0 | |
| 2015-01-30 | arm: Clean out armos.h and armmmu.h | Lioncash | 2 | -181/+23 | |
| 2015-01-30 | arm: Throw out a lot of unnecessary code | Lioncash | 6 | -1536/+56 | |
| 2015-01-30 | armdefs: Move some defines over to enums | Lioncash | 1 | -131/+112 | |
| 2015-01-27 | dyncom: Minor cleanup | Lioncash | 1 | -126/+137 | |
| Narrow scopes for the instruction variables. Remove unnecessary parentheses. | |||||
| 2015-01-27 | Update vfp.cpp | bunnei | 1 | -1/+1 | |
| VFP: Changed a debug log to trace. | |||||
| 2015-01-23 | vfp: Clean up vertical alignment for instructions | Lioncash | 1 | -131/+125 | |
| 2015-01-22 | dyncom: Minor cleanup | Lioncash | 1 | -282/+270 | |
| Removes some unused macros and cleans up indentation inconsistencies | |||||
| 2015-01-20 | dyncom: Clarify precedence for ternary statements | Lioncash | 3 | -3/+3 | |
| 2015-01-19 | Cleanup: Logging in Core | Chin | 5 | -483/+157 | |
| 2015-01-19 | dyncom: Implement missing shifts in ScaledRegisterPostIndexed, etc | Lioncash | 1 | -7/+33 | |
| 2015-01-17 | dyncom: Handle the ARM A2 encoding of STRT/LDRT | Lioncash | 1 | -10/+24 | |
| These were also missing the shifted register case. | |||||
| 2015-01-17 | dyncom: Handle the ARM A2 encoding of LDRBT/STRBT. | Lioncash | 1 | -17/+15 | |
| 2015-01-12 | vfp: Remove dead code | Lioncash | 1 | -50/+14 | |
| 2015-01-12 | dyncom: Fix 32-bit ASR shifts for immediates | Lioncash | 1 | -5/+3 | |
| 2015-01-12 | dyncom: Remove unused flag macros | Lioncash | 1 | -15/+3 | |
| 2015-01-12 | dyncom: Get rid of unnecessary outer-scope variables in InterpreterMainLoop | Lioncash | 1 | -97/+108 | |
| 2015-01-12 | dyncom: Fix overflow flag setting for ADD/RSB/RSC/SUB/SBC | Lioncash | 1 | -38/+41 | |
| Also cleans up CMN, and CMP. | |||||
| 2015-01-12 | dyncom: Add a helper function for addition with a carry | Lioncash | 3 | -12/+26 | |
| 2015-01-12 | dyncom: Fix ADC overflow flag setting | Lioncash | 1 | -8/+12 | |
| 2015-01-12 | dyncom: Fix conditional execution of MSR | Lioncash | 1 | -29/+31 | |
| 2015-01-09 | Move ThreadContext to core/core.h and deal with the fallout | Yuri Kunde Schlesner | 5 | -11/+16 | |
| 2015-01-09 | DynCom: Add a comment to GetTicks. | Subv | 1 | -0/+1 | |
| 2015-01-09 | Timing: Use CoreTiming::GetTicks to keep track of ticks. | Subv | 2 | -6/+2 | |
| This will keep track of idle ticks for us, and fixes some tickcount-related issues | |||||
| 2015-01-08 | dyncom: Fix UMAAL | Lioncash | 1 | -4/+4 | |
| These need to be done as a 64-bit operation. | |||||
| 2015-01-07 | dyncom: Fix SMULWB/SMULWT | Lioncash | 1 | -10/+7 | |
| Wasn't doing proper sign-extension | |||||
| 2015-01-07 | CoreTiming: Ported the CoreTiming namespace from PPSSPP | Subv | 2 | -1/+9 | |
| Implemented the required calls to make it work. CoreTiming: Added a new logging class Core_Timing. | |||||
| 2015-01-07 | dyncom: Fix SWPB | Lioncash | 1 | -0/+1 | |
| 2015-01-07 | dyncom: Move over SMLALXY | Lioncash | 1 | -1/+56 | |
| 2015-01-06 | Added exclusive reservation granule from ARMv7 spec to dyncom to protect LDR/STREX. | Kevin Hartman | 2 | -16/+18 | |
| 2015-01-05 | dyncom: Partially emulate BXJ | Lioncash | 1 | -8/+25 | |
| Just in case some game studio let the intern write inline assembly or something. | |||||
| 2015-01-05 | dyncom: Actually set the Q flag for SMLABB/SMLABT/SMLATB/SMLATT | Lioncash | 1 | -1/+2 | |
| Easy skyeye todo fix. | |||||
| 2015-01-05 | dyncom: Implement QADD/QSUB/QDADD/QDSUB | Lioncash | 4 | -25/+117 | |
| 2015-01-04 | skyeye: Remove duplicate typedefs | Lioncash | 4 | -41/+17 | |
| citra already has its own typedefs like this. | |||||
| 2015-01-03 | dyncom: Implement SMLAW | Lioncash | 1 | -1/+43 | |
| 2015-01-03 | VFP: Minor cleanup, functionally the same. | bunnei | 1 | -2587/+2476 | |
| 2015-01-03 | dyncom: Implement REVSH | Lioncash | 1 | -45/+45 | |
| Also joins the REV ops into one common place. | |||||
| 2015-01-03 | dyncom: Implement SMLALD/SMLSLD | Lioncash | 1 | -3/+72 | |
| 2015-01-03 | dyncom: Implement SMMLA/SMMUL/SMMLS | Lioncash | 1 | -3/+64 | |
| 2015-01-03 | dyncom: Implemented LDREXD/STREXD/LDREXH/STREXH | bunnei | 3 | -227/+282 | |
| 2015-01-03 | dyncom: Remove dead function InterpreterInitInstLength | Lioncash | 1 | -27/+0 | |
| Technically eliminates two memory leaks as well. | |||||
| 2015-01-03 | armemu: Fix missing Q flag check for SMLSD. | Lioncash | 1 | -2/+6 | |
| 2015-01-03 | dyncom: Implement SMLAD/SMUAD/SMLSD/SMUSD | Lioncash | 5 | -50/+84 | |
| 2015-01-02 | dyncom: Implement SXTAB16 and SXTB16 | Lioncash | 1 | -3/+58 | |
| 2015-01-01 | dyncom: Implement SHADD8/SHADD16/SHSUB8/SHSUB16/SHASX/SHSAX | Lioncash | 1 | -8/+110 | |
| 2015-01-01 | Fix SADD8/SSUB8 in the armemu | Lioncash | 1 | -50/+28 | |
| 2015-01-01 | dyncom: Implement SADD8/SSUB8 | Lioncash | 1 | -55/+108 | |
| 2014-12-31 | dyncom: Implement UADD8/UADD16/USUB8/USUB16/UASX/USAX | Lioncash | 1 | -9/+208 | |
| 2014-12-31 | dyncom: Massive refactor | bunnei | 2 | -654/+221 | |
| 2014-12-30 | vfp: Get rid of a few warnings | Lioncash | 2 | -2/+2 | |
| 2014-12-30 | vfp: Implement VMOVBRRSS | Lioncash | 3 | -12/+44 | |
| 2014-12-30 | dyncom: Implement USAT16/SSAT16 | Lioncash | 1 | -2/+61 | |
| 2014-12-30 | dyncom: Implement USAT/SSAT | bunnei | 3 | -2/+131 | |
| 2014-12-30 | dyncom: Various cleanups to match coding style, no functional changes. | bunnei | 5 | -7087/+5962 | |
| 2014-12-29 | dyncom: Fix SMLALXY's instruction labels | Lioncash | 1 | -2/+2 | |
| They were erroneously labeled as SMLAL. | |||||
| 2014-12-29 | dyncom: Implement QADD8/QSUB8 | Lioncash | 1 | -32/+42 | |
| 2014-12-29 | armemu: Implement QADD8/QSUB8 | Lioncash | 3 | -33/+100 | |
| 2014-12-29 | dyncom: Implement UXTB16/UXTAB16 | Lioncash | 1 | -2/+55 | |
| 2014-12-29 | vfp: Actually make the code somewhat readable | Lioncash | 5 | -1664/+1053 | |
| 2014-12-28 | dyncom: Implement PKHBT and PKHTB. | bunnei | 1 | -2/+57 | |
| 2014-12-28 | armemu: Fix PKHTB to do an arithmetic shift and correctly decode immediate field. | bunnei | 1 | -13/+5 | |
| 2014-12-28 | dyncom: Implement USAD8/USADA8 | Lioncash | 3 | -3/+53 | |
| 2014-12-28 | armemu: Simplify SSAT/SSAT16/SXTB/SXTAB | Lioncash | 1 | -71/+48 | |
| 2014-12-28 | armemu: Simplify REV/REV16/SXTH/SXTAH | Lioncash | 1 | -38/+26 | |
| 2014-12-28 | armemu: Simplify USAT16/UXTB/UXTAB | Lioncash | 1 | -65/+42 | |
| 2014-12-28 | armemu: Simplify REVSH/UXTH/UXTAH | Lioncash | 1 | -48/+23 | |
| 2014-12-28 | armemu: Fix underflows in USAD8/USADA8 | Lioncash | 3 | -4/+14 | |
| Initially reported by xdec. | |||||
| 2014-12-27 | dyncom: Implement UQADD8, UQADD16, UQSUB8, UQSUB16, UQASX, and UQSAX. | Lioncash | 3 | -12/+102 | |
| 2014-12-27 | armemu: Implement UQADD8, UQADD16, UQSUB16, UQASX, and UQSAX | Lioncash | 3 | -19/+93 | |
| 2014-12-27 | dyncom: Implement UHADD8, UHADD16, UHSUB8, UHSUB16, UHASX, and UHSAX | Lioncash | 1 | -11/+123 | |
| 2014-12-27 | armemu: Implement UHADD8, UHADD16, UHSUB8, UHSUB16, UHASX, and UHSAX | Lioncash | 1 | -2/+73 | |
| 2014-12-26 | ARM: Add a mechanism for faking CPU time elapsed during HLE. | bunnei | 5 | -95/+31 | |
| - Also a few cleanups. | |||||
| 2014-12-25 | armemu: Implement SMMUL, SMMLA, and SMMLS. | Lioncash | 1 | -2/+30 | |
| 2014-12-24 | armemu: Implement SMLALD/SMLSLD | Lioncash | 1 | -2/+33 | |
| 2014-12-24 | armemu: Fix GE/Q flag setting semantics | Lioncash | 1 | -62/+56 | |
| 2014-12-23 | armemu: Set the Q flag correctly for much of the other ops | Lioncash | 1 | -8/+8 | |
| They were setting the old S flag. | |||||
| 2014-12-23 | armemu: Set the Q flag properly for SMLAD/SMUAD | Lioncash | 3 | -13/+28 | |
| 2014-12-23 | armemu: Properly set the Q flag for SSAT16/USAT16 upon saturation. | Lioncash | 1 | -9/+23 | |
| 2014-12-23 | armemu: Fix SEL | Lioncash | 1 | -1/+1 | |
| Needs to use the updated state of the CPSR. | |||||
| 2014-12-23 | armemu: Fix construction of the CPSR | Lioncash | 4 | -15/+54 | |
| 2014-12-23 | armemu: Fix retrieval of the CPSR in MRS instructions. | Lioncash | 1 | -1/+1 | |
| 2014-12-22 | dyncom: Move over QADD16/QASX/QSAX/QSUB16 | Lioncash | 1 | -7/+87 | |
| 2014-12-22 | dyncom: Move SEL over | Lioncash | 1 | -1/+58 | |
| 2014-12-22 | dyncom: Move over SASX/SSAX/SADD16/SSUB16 | Lioncash | 1 | -7/+102 | |
| 2014-12-21 | More warning cleanups | Chin | 3 | -9/+6 | |
| 2014-12-21 | License change | purpasmart96 | 8 | -8/+8 | |
| 2014-12-21 | armemu: Implement SADD8/SSUB8 | Lioncash | 1 | -14/+87 | |
| 2014-12-20 | armemu: Should be using labs for USAD8/USADA8 | Lioncash | 1 | -4/+4 | |
| 2014-12-19 | armemu: Implement QASX and QSAX | Lioncash | 1 | -7/+20 | |
| 2014-12-19 | armemu: Implement SMLSD | Lioncash | 1 | -6/+10 | |
| 2014-12-19 | dyncom: Implement UMAAL | Lioncash | 1 | -1/+47 | |
| 2014-12-19 | armemu: Implement USAD8 and USADA8 | Lioncash | 1 | -1/+24 | |
| 2014-12-19 | armemu: Fix SSAT16 | Lioncash | 1 | -1/+1 | |
| The lower-bound would never be negative like it should | |||||
| 2014-12-19 | armemu: Clean up naming and formatting for SSAT16 | Lioncash | 1 | -14/+20 | |
| 2014-12-18 | armemu: Fix lower-bounds clamping for USAT16 | Lioncash | 1 | -1/+6 | |
| 2014-12-18 | armemu: More concise names for USAT16-related variables | Lioncash | 1 | -11/+15 | |
| 2014-12-18 | armemu: Get rid of bitwise parenthesis warnings | Lioncash | 1 | -4/+4 | |
| 2014-12-18 | armemu: Set GE flags correctly for SSUB16, SADD16, SSAX, and SASX. | Lioncash | 1 | -4/+29 | |
| 2014-12-18 | armemu: Combine SSUB16, SADD16, SASX, and SSAX. | Lioncash | 1 | -34/+23 | |
| 2014-12-17 | armemu: Unset GE flags for UADD8 if results are < 0x100 | Lioncash | 1 | -4/+22 | |
| Reference manual states these must be set to zero if this case is true. | |||||
| 2014-12-17 | armemu: Fix SSUB16 | Lioncash | 1 | -8/+8 | |
| Broken from the same reason SADD16 was. The lo part of the result should only be constructed from the lo halfwords of rm and rn. The hi part of the result should only be constructed from the hi halfwords of rm and rn. | |||||
| 2014-12-17 | armemu: Implement UMAAL | Lioncash | 1 | -3/+25 | |
| 2014-12-17 | armemu: Narrow the scope of some variables in handle_v6_insn | Lioncash | 1 | -12/+9 | |
| There's no reason to have these in the outer-most scope. | |||||
| 2014-12-17 | armemu: Fix SADD16 | Lioncash | 1 | -8/+9 | |
| The lo and hi parts of the result were being constructed as a result of hi and lo halfword intermixing from the rm and rn regs. However the lo part of the result should be constructed only from the lo halfwords of rm and rn, and the hi part of the result should only be constructed from the hi halfwords of rm and rn. | |||||
| 2014-12-17 | armemu: Fix PKHTB | Normmatt | 1 | -6/+12 | |
| 2014-12-17 | armemu: Implement REVSH | Normmatt | 1 | -5/+9 | |
| 2014-12-17 | armemu: Fix UXTAB/UXTAH | Normmatt | 1 | -4/+4 | |
| 2014-12-17 | armemu: Fix SXTAB | Normmatt | 1 | -2/+2 | |
| 2014-12-17 | armemu: Fix SXTAH | Normmatt | 1 | -2/+3 | |
| 2014-12-16 | armemu: Fix FTOUI NaN sign. | Normmatt | 1 | -1/+1 | |
| 2014-12-16 | armemu: Fix FSUBS bug where NaN shouldn't be negated | Normmatt | 1 | -1/+4 | |
| 2014-12-16 | armemu: Fix SMUAD, SMUSD, and SMLAD | Lioncash | 1 | -3/+3 | |
| Wrong values were being multiplied together. | |||||
| 2014-12-16 | armemu: Join SMUAD, SMUSD, and SMLAD | Lioncash | 1 | -38/+35 | |
| 2014-12-16 | armemu: Fix lower-bound signed saturation clamping for QADD16/QSUB16. | Lioncash | 1 | -2/+2 | |
| 2014-12-16 | armemu: Join QADD16 and QSUB16 together. | Lioncash | 1 | -33/+37 | |
| The only difference between these ops is one adds and one subtracts. Everything is literally the same. | |||||
| 2014-12-16 | armemu: Implement UXTAB16 | Lioncash | 1 | -10/+25 | |
| 2014-12-15 | armemu: Fix UXTB16 | Lioncash | 1 | -12/+12 | |
| Rotation bits are 10 and 11, not 9 and 10. | |||||
| 2014-12-15 | ARM: Pull some SkyEye fixes from 3dmoo. | bunnei | 3 | -419/+485 | |
| 2014-12-14 | Clean up armdefs.h | Lioncash | 1 | -306/+169 | |
| 2014-12-13 | Convert old logging calls to new logging macros | Yuri Kunde Schlesner | 5 | -109/+109 | |
| 2014-12-08 | armemu: Fix SSAX | Lioncash | 1 | -1/+1 | |
| 2014-12-08 | armemu: Fix SASX | Lioncash | 1 | -1/+1 | |
| 2014-12-08 | armemu: Fix parenthesis warnings regarding bitwise ops | Lioncash | 1 | -4/+4 | |
| 2014-11-29 | dyncom: Use unordered_map rather than the terrible 2-level bb_map | Yuri Kunde Schlesner | 1 | -33/+15 | |
| Seems (probably just placebo/wishful thinking) to make it slightly faster. Also reduces memory usage and makes shutdown when debugging from MSVC fast. | |||||
| 2014-11-29 | arm_dyncom_interpreter: Get rid of unused var warnings | Lioncash | 1 | -4/+2 | |
| 2014-11-29 | Add comment regarding __WIN32__ in SkyEye code | darkf | 1 | -0/+4 | |
| 2014-11-29 | Fix MinGW build | darkf | 1 | -0/+4 | |
| 2014-11-25 | Remove unused includes to common/thread.h | Emmanuel Gil Peyrot | 1 | -2/+0 | |
| 2014-11-24 | HLE: Revamp error handling throrough the HLE code | Yuri Kunde Schlesner | 1 | -16/+18 | |
| All service calls in the CTR OS return result codes indicating the success or failure of the call. Previous to this commit, Citra's HLE emulation of services and the kernel universally either ignored errors or returned dummy -1 error codes. This commit makes an initial effort to provide an infrastructure for error reporting and propagation which can be use going forward to make HLE calls accurately return errors as the original system. A few parts of the code have been updated to use the new system where applicable. One part of this effort is the definition of the `ResultCode` type, which provides facilities for constructing and parsing error codes in the structured format used by the CTR. The `ResultVal` type builds on `ResultCode` by providing a container for values returned by function that can report errors. It enforces that correct error checking will be done on function returns by preventing the use of the return value if the function returned an error code. Currently this change is mostly internal since errors are still suppressed on the ARM<->HLE border, as a temporary compatibility hack. As functionality is implemented and tested this hack can be eventually removed. | |||||
| 2014-11-24 | Change some SkyEye defines to const ints | Yuri Kunde Schlesner | 2 | -34/+16 | |
| This prevents them from interfering with other constants defined in different namespaces. | |||||
| 2014-11-19 | Remove trailing spaces in every file but the ones imported from SkyEye, AOSP or generated | Emmanuel Gil Peyrot | 7 | -12/+12 | |
| 2014-11-18 | Fix documentation of parameters | Lioncash | 2 | -2/+2 | |
| 2014-11-14 | ARM_Interface: Make destructor virtual | Lioncash | 1 | -1/+1 | |
| Fixes some warnings on OSX. | |||||
| 2014-11-12 | ARM: Fixed dyncom to use reg15 for PC (this core doesn't use pc variable). | bunnei | 1 | -2/+2 | |
| - Fixes single stepping in debugger. | |||||
| 2014-11-12 | ARM: Removed unnecessary goto with each instruction. | bunnei | 1 | -43/+39 | |
| 2014-11-12 | ARM: Fixed several dyncom bugs. | bunnei | 3 | -17/+25 | |
| - Fixed NZCVT flags to properly save state when function returns. - Fixed counter to keep track of the actual number of instructions executed. - Fixed single-step mode to only execute one instruction at a time. - DefaultIni: Removed comment that no longer applied to dyncom. | |||||
| 2014-11-03 | Fix compilation errors | Sean Maas | 1 | -2/+2 | |
| 2014-11-02 | ARM: Merged additional ARMv6 instructions implemented by 3dmoo. | bunnei | 1 | -42/+234 | |
| 2014-11-02 | ARM: Merge latest VFP fixes from 3dmoo team. | bunnei | 4 | -2096/+2388 | |
| 2014-10-31 | Fix VFP compilation errors with gcc | Yuri Kunde Schlesner | 1 | -12/+12 | |
| 2014-10-26 | vfp_helper: Get rid of integer type redefinitions | Lioncash | 1 | -7/+1 | |
| 2014-10-26 | Add `override` keyword through the code. | Yuri Kunde Schlesner | 2 | -18/+18 | |
| This was automated using `clang-modernize`. | |||||
| 2014-10-25 | ARM: Removed unnecessary and unused SkyEye MMU code. | bunnei | 21 | -7728/+326 | |
| Added license header back in. I originally removed this because I mostly rewrote the file, but meh | |||||
| 2014-10-25 | ARM: Removed unused armos code from SkyEye. | bunnei | 3 | -746/+0 | |
| 2014-10-25 | ARM: Updated dyncom core to use fast label lookup table on clang. | bunnei | 1 | -3/+7 | |
| 2014-10-25 | ARM: Integrate SkyEye faster "dyncom" interpreter. | bunnei | 18 | -50/+8216 | |
| Fixed typo (make protected member public) Added license header back in. I originally removed this because I mostly rewrote the file, but meh ARM: Fixed a type error in dyncom interpreter. ARM: Updated dyncom to use unique_ptr for internal ARM state. | |||||
| 2014-10-25 | ARM: Reorganized file structure to move shared SkyEye code to a more common area. | bunnei | 31 | -63/+63 | |
| Removed s_ prefix | |||||
| 2014-09-09 | core: Prune redundant includes | archshift | 1 | -1/+0 | |
| 2014-09-09 | Added string_util to common, small changes in loader.cpp | archshift | 1 | -39/+39 | |
| 2014-09-07 | Dead code removal: video_core.cpp, load_symbol_map.cpp | archshift | 1 | -1/+1 | |
| 2014-09-06 | core: Make the ARM disassembler use std::string internally | Lioncash | 3 | -189/+143 | |
| 2014-08-31 | Threading: Fix thread starting to execute first instruction correctly. | bunnei | 1 | -1/+1 | |
| 2014-08-28 | Threading: Fix thread starting to execute first instruction correctly. | bunnei | 1 | -1/+1 | |
| 2014-08-20 | ARM: Remove a forgotten const in vfp. | Emmanuel Gil Peyrot | 2 | -2/+2 | |
| 2014-07-24 | ARM: Synchronize Citra's SkyEye core with 3dmoo's. | bunnei | 6 | -5919/+5303 | |
| 2014-07-20 | core: Kill off type redefenitions in armdefs.h | Lioncash | 1 | -7/+0 | |
| 2014-06-05 | arm: fixed a bug where ARM_Interpreter::ExecuteInstructions was actually executing one more instruction than expected | bunnei | 1 | -1/+1 | |
| 2014-06-05 | arm: fixed bug in how thread context switch occurs with SkyEye | bunnei | 1 | -2/+5 | |
| 2014-06-05 | arm: reverting a change made with cb0663de - this has to have been a typo! | bunnei | 1 | -1/+1 | |
| 2014-06-02 | arm: added option to prepare CPU core (while mid-instruction) for thread reschedule | bunnei | 3 | -0/+11 | |
| 2014-06-01 | Added 'this' reference to num_instructions field so it's properly updated,as before the method was affecting the local method parameter rather than the class field | Disruption | 1 | -1/+1 | |
| 2014-05-30 | arm: removed unnecessary code when calling SVC from skyeye | bunnei | 1 | -16/+0 | |
| 2014-05-23 | arm_interpreter: fixed load context to currently resume a thread | bunnei | 1 | -1/+4 | |
| 2014-05-21 | arm: removed include of windows.h from armdefs.h to arminit.c (only module that uses it) | bunnei | 2 | -4/+3 | |
| 2014-05-21 | armemu: missed rename of "Syscall" to "SVC" | bunnei | 1 | -1/+1 | |
| 2014-05-21 | ARM_Interpreter/ARM_Interface: Fixed member variable naming to be consistent with style guide | bunnei | 3 | -45/+45 | |
| 2014-05-21 | ARM_Interface: added SaveContext and LoadContext functions for HLE thread switching | bunnei | 3 | -1/+63 | |
| 2014-05-20 | VFP: disable DBG messages because they spam the console with unimportant skyeye junk | bunnei | 1 | -1/+1 | |
| 2014-05-17 | Fixed vfp issues | archshift | 4 | -10/+10 | |
| 2014-05-17 | ignore thumbemu 0xDEADCODE debugging catch on MCR | bunnei | 1 | -2/+1 | |
| 2014-05-17 | updated how we call ARM core to make things much faster | bunnei | 5 | -20/+30 | |
| 2014-05-17 | same fix as last commit - just for vfpsingle.cpp | bunnei | 1 | -2/+2 | |
| 2014-05-17 | another VFP fix for GCC | bunnei | 1 | -2/+2 | |
| 2014-05-17 | fixed VFP DBG log for GCC | bunnei | 1 | -1/+1 | |
| 2014-05-17 | - reenabled MCR and MRC functions now that VFP is attached | bunnei | 2 | -95/+92 | |
| - removed HLE::CallMCR function (was pointless) | |||||
| 2014-05-17 | - removed unused stubbed out code | bunnei | 5 | -33/+27 | |
| - fixed some compiler issues with xscale_copro when porting code to Windows - fixed some #include's | |||||
| 2014-05-16 | added maverick.cpp to ARM core from skyeye | bunnei | 1 | -0/+1206 | |
| 2014-05-16 | fixed includes | bunnei | 1 | -2/+2 | |
| 2014-05-16 | enabled CP_ACCESS_ALLOWED | bunnei | 1 | -6/+4 | |
| 2014-05-16 | fixed include path | bunnei | 1 | -1/+1 | |
| 2014-05-16 | removed undefined function ARMul_ConsolePrint | bunnei | 1 | -1/+1 | |
| 2014-05-16 | added missing armcopro from skyeye | bunnei | 3 | -251/+1093 | |
| 2014-05-16 | added missing skyeye mmu code | bunnei | 9 | -17/+3272 | |
| 2014-05-16 | fixed armmmu imports | bunnei | 1 | -5/+5 | |
| 2014-05-16 | - moved mmu to arm/interpreter folder | bunnei | 13 | -0/+8755 | |
| - added initial VFP code from skyeye | |||||
| 2014-05-12 | added option to set CPSR register to arm_interface | bunnei | 3 | -0/+20 | |
| 2014-05-07 | - disable strict alignment on LDRD/STRD | bunnei | 1 | -17/+22 | |
| - handle RD in STREX/STREXB | |||||
| 2014-05-06 | commented out useless debug logs that just spammed console | bunnei | 1 | -3/+3 | |
| 2014-05-02 | - added CallMCR function to coprocessor HLE module | bunnei | 1 | -22/+23 | |
| - moved instruction decoding to coprocessor HLE module | |||||
| 2014-05-02 | renamed hle "mrc" module to "coprocessor" | bunnei | 1 | -8/+8 | |
| 2014-05-01 | added a module to load symbol map files for debugging | bunnei | 2 | -0/+46 | |
| 2014-04-28 | removed DISALLOW_COPY_AND_ASSIGN in favor of NonCopyable class | bunnei | 2 | -3/+1 | |
| 2014-04-28 | removed commented out line - this was for an unimplemented MRC call, no longer need to leave this here | bunnei | 1 | -1/+0 | |
| 2014-04-25 | moved HLE::MRC to its own module, added support for catching data synchronization barrier command | bunnei | 2 | -3/+5 | |
| 2014-04-25 | added disassembly to unimplemented instruction | bunnei | 1 | -1/+6 | |
| 2014-04-23 | fixes to build on linux | bunnei | 1 | -0/+2 | |
| 2014-04-13 | - added HLE to connect to "srv:" service | bunnei | 1 | -33/+35 | |
| - added a manager for keeping track of services/ports - added a memory mapped region for memory accessed by HLE - added HLE for GetThreadCommandBuffer function | |||||
| 2014-04-12 | hacked CPU interpreter to ignore branch on SVC instruction (as we are HLEing this...) | bunnei | 1 | -2/+6 | |
| 2014-04-12 | added a SETABORT method that does not update LR (for HLE'd SVC that does not jump appcore CPU to an IRQ vector) | bunnei | 1 | -0/+11 | |
| 2014-04-11 | base code to call a syscall from ARM11 appcore | bunnei | 1 | -0/+3 | |
| 2014-04-11 | missed this file with commit 95e5436f | bunnei | 1 | -1/+10 | |
| 2014-04-11 | cleaned up arm_interface, added a setter to set registers for use with HLE return values | bunnei | 2 | -6/+70 | |
| 2014-04-09 | fixed licensing and updated code style naming for arm_interface/arm_interpreter frontend module | bunnei | 3 | -94/+57 | |
| 2014-04-09 | fixed project includes to use new directory structure | bunnei | 10 | -27/+27 | |
| 2014-04-09 | got rid of 'src' folders in each sub-project | bunnei | 25 | -0/+15528 | |
 |
index : anonymous/yuzu | |
| yuzu is the world's most popular, open-source, Nintendo Switch emulator — started by the creators of Citra. It is written in C++ with portability in mind, | mirror |
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