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* Core/Common: Address Feedback.Fernando Sahmkow2020-06-281-1/+1
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* Clang Format.Fernando Sahmkow2020-06-271-2/+2
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* ARMInterface: Correct rebase errors.Fernando Sahmkow2020-06-271-1/+1
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* SingleCore: Use Cycle Timing instead of Host Timing.Fernando Sahmkow2020-06-271-2/+2
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* General: Move ARM_Interface into Threads.Fernando Sahmkow2020-06-271-0/+1
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* Core: Refactor ARM Interface.Fernando Sahmkow2020-06-271-2/+3
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* General: Recover Prometheus project from harddrive failure Fernando Sahmkow2020-06-271-1/+2
| | | | | | | This commit: Implements CPU Interrupts, Replaces Cycle Timing for Host Timing, Reworks the Kernel's Scheduler, Introduce Idle State and Suspended State, Recreates the bootmanager, Initializes Multicore system.
* physical_core: Make use of std::make_unique instead of std::make_shared in ctorLioncash2020-04-241-1/+6
| | | | | | | We can also allow unicorn to be constructed in 32-bit mode or 64-bit mode to satisfy the need for both interpreter instances. Allows this code to compile successfully of non x86-64 architectures.
* core: Implement separate A32/A64 ARM interfaces.bunnei2020-03-031-2/+5
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* core: Prepare various classes for memory read/write migrationLioncash2019-11-271-1/+0
| | | | | | | | | | Amends a few interfaces to be able to handle the migration over to the new Memory class by passing the class by reference as a function parameter where necessary. Notably, within the filesystem services, this eliminates two ReadBlock() calls by using the helper functions of HLERequestContext to do that for us.
* arm_unicorn: Resolve sign conversion warningsLioncash2019-11-121-1/+1
| | | | | While we're at it, this also resolves a type truncation warning as well, given the code was truncating from a 64-bit value to a 32-bit one.
* core/arm: Remove obsolete Unicorn memory mappingLioncash2019-07-111-3/+0
| | | | | | | | This was initially necessary when AArch64 JIT emulation was in its infancy and all memory-related instructions weren't implemented. Given the JIT now has all of these facilities implemented, we can remove these functions from the CPU interface.
* core/cpu_core_manager: Create threads separately from initialization.Lioncash2019-04-121-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Our initialization process is a little wonky than one would expect when it comes to code flow. We initialize the CPU last, as opposed to hardware, where the CPU obviously needs to be first, otherwise nothing else would work, and we have code that adds checks to get around this. For example, in the page table setting code, we check to see if the system is turned on before we even notify the CPU instances of a page table switch. This results in dead code (at the moment), because the only time a page table switch will occur is when the system is *not* running, preventing the emulated CPU instances from being notified of a page table switch in a convenient manner (technically the code path could be taken, but we don't emulate the process creation svc handlers yet). This moves the threads creation into its own member function of the core manager and restores a little order (and predictability) to our initialization process. Previously, in the multi-threaded cases, we'd kick off several threads before even the main kernel process was created and ready to execute (gross!). Now the initialization process is like so: Initialization: 1. Timers 2. CPU 3. Kernel 4. Filesystem stuff (kind of gross, but can be amended trivially) 5. Applet stuff (ditto in terms of being kind of gross) 6. Main process (will be moved into the loading step in a following change) 7. Telemetry (this should be initialized last in the future). 8. Services (4 and 5 should ideally be alongside this). 9. GDB (gross. Uses namespace scope state. Needs to be refactored into a class or booted altogether). 10. Renderer 11. GPU (will also have its threads created in a separate step in a following change). Which... isn't *ideal* per-se, however getting rid of the wonky intertwining of CPU state initialization out of this mix gets rid of most of the footguns when it comes to our initialization process.
* kernel/svc: Deglobalize the supervisor call handlersLioncash2019-04-081-6/+6
| | | | | | | | | | | Adjusts the interface of the wrappers to take a system reference, which allows accessing a system instance without using the global accessors. This also allows getting rid of all global accessors within the supervisor call handling code. While this does make the wrappers themselves slightly more noisy, this will be further cleaned up in a follow-up. This eliminates the global system accessors in the current code while preserving the existing interface.
* Merge pull request #2240 from FearlessTobi/port-4651bunnei2019-04-061-1/+1
|\ | | | | Port citra-emu/citra#4651: "gdbstub: Fix some bugs in IsMemoryBreak() and ServeBreak. Add workaround to let watchpoints break into GDB."
| * gdbstub: Fix some bugs in IsMemoryBreak() and ServeBreak. Add workaround to let watchpoints break into GDB. (#4651)Dimitri A2019-03-151-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * gdbstub: fix IsMemoryBreak() returning false while connected to client As a result, the only existing codepath for a memory watchpoint hit to break into GDB (InterpeterMainLoop, GDB_BP_CHECK, ARMul_State::RecordBreak) is finally taken, which exposes incorrect logic* in both RecordBreak and ServeBreak. * a blank BreakpointAddress structure is passed, which sets r15 (PC) to NULL * gdbstub: DynCom: default-initialize two members/vars used in conditionals * gdbstub: DynCom: don't record memory watchpoint hits via RecordBreak() For now, instead check for GDBStub::IsMemoryBreak() in InterpreterMainLoop and ServeBreak. Fixes PC being set to a stale/unhit breakpoint address (often zero) when a memory watchpoint (rwatch, watch, awatch) is handled in ServeBreak() and generates a GDB trap. Reasons for removing a call to RecordBreak() for memory watchpoints: * The``breakpoint_data`` we pass is typed Execute or None. It describes the predicted next code breakpoint hit relative to PC; * GDBStub::IsMemoryBreak() returns true if a recent Read/Write operation hit a watchpoint. It doesn't specify which in return, nor does it trace it anywhere. Thus, the only data we could give RecordBreak() is a placeholder BreakpointAddress at offset NULL and type Access. I found the idea silly, compared to simply relying on GDBStub::IsMemoryBreak(). There is currently no measure in the code that remembers the addresses (and types) of any watchpoints that were hit by an instruction, in order to send them to GDB as "extended stop information." I'm considering an implementation for this. * gdbstub: Change an ASSERT to DEBUG_ASSERT I have never seen the (Reg[15] == last_bkpt.address) assert fail in practice, even after several weeks of (locally) developping various branches around GDB. Only leave it inside Debug builds.
* | core: Add missing override specifiers where applicableLioncash2019-04-041-1/+1
|/ | | | | | | | | Applies the override specifier where applicable. In the case of destructors that are defaulted in their definition, they can simply be removed. This also removes the unnecessary inclusions being done in audin_u and audrec_u, given their close proximity.
* core_timing: Convert core timing into a classLioncash2019-02-161-1/+7
| | | | | | | | | | | Gets rid of the largest set of mutable global state within the core. This also paves a way for eliminating usages of GetInstance() on the System class as a follow-up. Note that no behavioral changes have been made, and this simply extracts the functionality into a class. This also has the benefit of making dependencies on the core timing functionality explicit within the relevant interfaces.
* arm_interface: Remove ARM11-isms from the CPU interfaceLioncash2018-09-181-6/+4
| | | | | | | | | This modifies the CPU interface to more accurately match an AArch64-supporting CPU as opposed to an ARM11 one. Two of the methods don't even make sense to keep around for this interface, as Adv Simd is used, rather than the VFP in the primary execution state. This is essentially a modernization change that should have occurred from the get-go.
* Port #4182 from Citra: "Prefix all size_t with std::"fearlessTobi2018-09-151-2/+2
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* core: Namespace all code in the arm subdirectory under the Core namespaceLioncash2018-08-251-0/+4
| | | | Gets all of these types and interfaces out of the global namespace.
* CPU: Save and restore the TPIDR_EL0 system register on every context switch.Subv2018-07-211-0/+2
| | | | Note that there's currently a dynarmic bug preventing this register from being written.
* scheduler: Clear exclusive state when switching contextsMerryMage2018-07-161-0/+1
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* GDB Stub Improvements (#508)Hedges2018-06-061-0/+4
| | | | | | | | | | * GDB Stub should work now. * Applied clang-format. * Replaced htonll with swap64. * Tidy up.
* Merge pull request #193 from N00byKing/3184_2_robotic_boogaloobunnei2018-03-191-1/+3
|\ | | | | Implement Pull #3184 from citra: core/arm: Improve timing accuracy before service calls in JIT (Rebased)
| * Implements citra-emu/citra#3184N00byKing2018-02-251-1/+3
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* | arm_interface: Support unmapping previously mapped memory.bunnei2018-03-161-0/+1
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* yuzu: Update license text to be consistent across project.bunnei2018-01-131-1/+1
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* arm_dynarmic: Implement coreMerryMage2018-01-121-3/+2
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* unicorn: Use for arm interface on Windows.bunnei2018-01-041-0/+39