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2018-01-03arm: Remove SkyEye/Dyncom code that is ARMv6-only.bunnei1-4578/+0
2017-10-23logging: Rename category "Core_ARM11" to "Core_ARM".bunnei1-14/+14
2017-08-21Dyncom: Use size_t instead of int to store the instruction offsets in the instruction cache.Subv1-3/+3
Fixes a few warnings.
2017-08-21Dyncom: Fixed a conversion warning when decoding thumb instructions.Subv1-1/+1
2017-05-08Dyncom: Remove disassembler codeYuri Kunde Schlesner1-5/+2
Had licensing issue around it, in addition to several bugs. Closes #1632, #1280
2017-05-08Dyncom: Tweak types and log formattingYuri Kunde Schlesner1-6/+8
2017-02-18dyncom: Correct SXTAB16 and SXTB16MerryMage1-4/+4
2016-12-15gdbstub: Remove global variable from public interfaceLioncash1-2/+2
Currently, this is only ever queried, so adding a function to check if the server is enabled is more sensible. If directly modifying this externally is ever desirable, it should be done by adding a function to the interface, rather than exposing implementation details directly.
2016-09-21Use negative priorities to avoid special-casing the self-includeYuri Kunde Schlesner1-1/+1
2016-09-21Remove empty newlines in #include blocks.Emmanuel Gil Peyrot1-5/+2
This makes clang-format useful on those. Also add a bunch of forgotten transitive includes, which otherwise prevented compilation.
2016-09-18Sources: Run clang-format on everything.Emmanuel Gil Peyrot1-2989/+3300
2016-08-22dyncom: Read-after-write in SMLAMerryMage1-2/+4
In the case when RD === RN, RD was updated before AddOverflow was called to check for an overflow, resulting in an incorrect state of the Q flag.
2016-08-14Dyncom: Correct implementation of STM for R15MerryMage1-3/+4
2016-06-12Make arm_dyncom_trans* into a fully fledged compilation unitarchshift1-44/+4
2016-06-12arm_dyncom_interpreter: slightly change AllocBuffer to be intuitivearchshift1-15/+15
2016-06-11arm_dyncom_interpreter: Add specialized GetAddressingOpLoadStoreT funcarchshift1-0/+15
This allows us to get the addressing operation for STRT, LDRT, STRBT, and LDRBT. We do this so that translation functions don't need to see the addressing ops directly.
2016-06-11arm_dyncom_interpreter: rename operation functions to fit style guidearchshift1-2/+2
2016-06-11arm_dyncom_interpreter: Rename anonymous enum to TransExtDataarchshift1-7/+7
2016-06-11arm_dyncom_interpreter.cpp: #include translation info from inc filesarchshift1-2648/+2
2016-06-11Revert "Split huge interpreter source file into translation info and interpreter (+ some tiny misc style fixes)"archshift1-24/+2695
2016-06-09arm_dyncom_interpreter: rename operation functions to fit style guidearchshift1-3/+3
2016-06-09arm_dyncom_interpreter.cpp: Split by translation and interpreter logicarchshift1-2695/+24
To facilitate the split, some small changes were made to names of various structures and functions.
2016-05-18Fix read-after-write in SMUAD, SMLAD, SMUSD, SMLSDJannik Vogel1-4/+8
2016-04-29Common: Remove section measurement from profiler (#1731)Yuri Kunde Schlesner1-7/+0
This has been entirely superseded by MicroProfile. The rest of the code can go when a simpler frametime/FPS meter is added to the GUI.
2016-04-09Fix BLX LR opcode interpretationmailwl1-2/+3
2016-04-06Fix thumb ADR instruction alignmentmailwl1-6/+2
2016-03-30DynCom: Optimize single steppingMerryMage1-26/+57
2015-12-30arm_dyncom_dec: Fix decoding of VMLSLioncash1-201/+199
Previously, all VMLS variants would misdecode as CDP (which isn't necessarily wrong in itself, however VMLS has it's own label of execution)
2015-12-28dyncom: Handle modifying the APSR via an MRC instructionLioncash1-12/+9
2015-12-21dyncom: Remove PC dispatch from several instructionsLioncash1-94/+0
These instructions aren't capable of using the PC as a destination
2015-12-20dyncom: Handle unprivileged load/store variants correctlyLioncash1-7/+33
LDRT/LDRBT/STRBT/STRT should simulate the load or store as if the host CPU is in user mode. STRT is also allowed to use the PC as an operand
2015-12-06dyncom: const correctness changesLioncash1-1/+1
2015-10-12Remove unnecessary new lines, changed Deinit to Shutdownpolaris-1-1/+0
2015-10-04Use BreakpointAddress struct instead of passing address directlypolaris-1-3/+3
2015-10-04Implement gdbstubpolaris-1-9/+32
2015-09-20Implement gdbstubpolaris-1-9/+32
2015-09-06DynCom: Converted all 0xE condition code checks to ConditionCode::ALarchshift1-100/+100
2015-08-26dyncom: Simplify some comparisons in CondPassedLioncash1-4/+4
2015-08-26dyncom: Change return type of CondPassed to boolLioncash1-57/+39
2015-08-25Integrate the MicroProfile profiling libraryYuri Kunde Schlesner1-0/+7
This brings goodies such as a configurable user interface and multi-threaded timeline view.
2015-08-11ARM Core, Video Core, CitraQt, Citrace: Use CommonTypes types instead of the standard u?int*_t types.Emmanuel Gil Peyrot1-20/+21
2015-07-29dyncom: Remove an unused variableLioncash1-3/+0
This was used prior to InterpreterTranslate existing.
2015-07-29dyncom: Handle the case where PC is the source register for STR/VSTM/VLDMLioncash1-1/+6
2015-07-29dyncom: Handle left-operand PC correctly for data-processing opsLioncash1-7/+33
This is considered deprecated in the ARM manual (using PC as an operand), however, this is still able to be executed on the MPCore (which I'm quite sure would be rare to begin with).
2015-07-28dyncom: Use enum class for instruction decoding resultsLioncash1-10/+9
2015-07-28dyncom: Remove code duplication regarding thumb instructionsLioncash1-9/+3
2015-07-28dyncom: Migrate exclusive memory access control into armstateLioncash1-47/+13
2015-07-28dyncom: Remove duplicated typedef and externLioncash1-4/+0
These are already present in arm_dyncom_dec.h.
2015-07-26dyncom: Use ARMul_State as an objectLioncash1-183/+182
Gets rid of C-like parameter passing.
2015-07-26dyncom: Rename armdefs.h to armstate.hLioncash1-1/+1
2015-07-26dyncom: Get rid of skyeye typedefsLioncash1-5/+4
2015-07-26dyncom: Move helper functions to their own headerLioncash1-0/+1
2015-07-21dyncom: Pass SVC immediates directly.Lioncash1-1/+2
Previously it would just re-read the already decoded instruction and extract the immediate value.
2015-07-20dyncom: Properly retrieve the PC value in BX if used.Lioncash1-3/+5
2015-07-17arm_dyncom_interpreter: Simplify assignment in SMLAWLioncash1-1/+1
Also a side-benefit of not having implementation-defined behavior.
2015-05-29Remove every trailing whitespace from the project (but externals).Emmanuel Gil Peyrot1-16/+16
2015-05-26arm_dyncom_interpreter: Remove unused variableLioncash1-5/+1
Thum decoding directly checks if the thumb bit is set instead of using a temporary.
2015-05-25arm_dyncom_interpreter: Remove unused macroLioncash1-1/+0
2015-05-23dyncom: Remove unused cpu parameter from decode_thumb_instrLioncash1-3/+2
2015-05-23dyncom: remove load_r15 from arm_instLioncash1-362/+235
It's entirely unused. Also allows getting rid of more clunky macros.
2015-05-23dyncom: Remove unnecessary parameter for load/store operationsLioncash1-39/+39
2015-05-21dyncom: Eliminate clang warningsLioncash1-1/+1
Gets rid of a whole load of missing brace initialization warnings.
2015-05-15Memmap: Re-organize memory function in two filesYuri Kunde Schlesner1-1/+1
memory.cpp/h contains definitions related to acessing memory and configuring the address space mem_map.cpp/h contains higher-level definitions related to configuring the address space accoording to the kernel and allocating memory.
2015-05-14dyncom: Add ARMv6K NOP and hint instructions to the decoding tableLioncash1-12/+142
2015-05-14dyncom: Handle some MSR variants individuallyLioncash1-23/+32
This is necessary, as hint instructions will be recognized as MSR, which is pretty bad.
2015-05-14dyncom: Move exclusive load/stores above bbl and swi in the decoding tableLioncash1-10/+11
2015-05-14dyncom: Remove duplicate enums/prototypesLioncash1-7/+1
These are already defined in arm_dyncom_interpreter_dec.cpp.
2015-05-14dyncom: Remove unnecessary definesLioncash1-4/+4
These can simply be const vars.
2015-05-14dyncom: Make translation-unit functions and variables staticLioncash1-66/+64
2015-05-14dyncom: Remove unnecessary typedefsLioncash1-132/+133
2015-05-14dyncom: Remove unused structsLioncash1-8/+0
2015-05-13dyncom: Fix decoding of BKPT's immediateLioncash1-1/+1
A shift here is intended since the representation is imm12:imm4
2015-05-12dyncom: Stub MCRR and MRRCLioncash1-7/+68
There's no other coprocessor outside the VFP (which has its own VMOV variants) in which the MPCore can send/retrieve data from. Stubbed so citra won't crash and burn on the odd chance someone actually tries to use these.
2015-05-08dyncom: Remove an unnecessary variable in the interpreterLioncash1-19/+17
All this was doing was needlessly aliasing a variable.
2015-05-06HLE: Clean up SVC dispatch mechanismYuri Kunde Schlesner1-2/+2
2015-05-02Dyncom: Move cream cache to ARMul_State.bunnei1-22/+9
2015-04-07dyncom: Remove unnecessary enum and typedefLioncash1-4/+4
Also fixes descriptions in the process.
2015-04-06Move CP15 enum definitions into their own enum.Lioncash1-1/+0
Also gets rid of preprocessor mumbo-jumbo
2015-04-06dyncom: Suppress uninitialized variable warningsLioncash1-4/+4
The switch cases will always be hit, but this makes compilers stop complaining.
2015-04-02dyncom: Move CP15 register writing into its own function.Lioncash1-88/+2
Also implements writing to the rest of the ARM11 MPCore CP15 register set.
2015-04-02dyncom: Move CP15 register reading into its own function.Lioncash1-44/+3
Keeps everything contained. Added all supported readable registers in an ARM11 MPCore.
2015-03-26dyncom: Migrate InAPrivilegedMode to armsuppLioncash1-4/+0
It's a generic helper function, so it should be here anyway.
2015-03-24dyncom: Implement SRSLioncash1-1/+32
2015-03-24dyncom: Implement RFELioncash1-1/+30
2015-03-17dyncom: Make Load/Store instructions support big endianLioncash1-52/+62
2015-03-15dyncom: Implement SETENDLioncash1-1/+35
2015-03-10dyncom: Minor cleanupLioncash1-26/+7
Assemblers will exit with an error when trying to assemble instructions with disallowed registers.
2015-03-09dyncom: Fix an indexing bug in STMLioncash1-5/+4
Previously it would write the contents of register 13 for the case where the link register (r14) is supposed to be written.
2015-03-09dyncom: General cleanup of STMLioncash1-16/+14
2015-03-09dyncom: Increment addr when accessing LR in LDMLioncash1-0/+2
2015-03-02Add profiling infrastructure and widgetYuri Kunde Schlesner1-0/+8
2015-02-26arm: The CP15 Main ID register is not writeableLioncash1-3/+1
2015-02-22Cleaned up unaligned access.Kevin Hartman1-17/+2
2015-02-17dyncom: Support conditional BKPT instructionsLioncash1-1/+27
2015-02-16dyncom: Actually set the destination register for USAD8/USADA8.Lioncash1-0/+1
Idiotville: Population: 1 - Inhabitant name: Lioncash
2015-02-13core: Apply static to local functionsLioncash1-189/+190
2015-02-13arm: General cleanupLioncash1-74/+48
- Remove several typedefs for ARMul_State. - Remove unused functions - Remove unused/unnecessary headers - Removed unused enums, etc.
2015-02-13dyncom: Remove warning for SXTAHLioncash1-1/+0
This is tested to work correctly.
2015-02-10dyncom: Add more regs to MCR/MRCLioncash1-17/+32
Adds the registers that were left out of some coprocessor ranges.
2015-02-03dyncom: Remove more unnecessary codeLioncash1-45/+3
2015-02-03core: Fix some warnings on OSXLioncash1-2/+4
2015-02-01arm: Adios armemuLioncash1-4/+0
2015-01-27dyncom: Minor cleanupLioncash1-126/+137
Narrow scopes for the instruction variables. Remove unnecessary parentheses.
2015-01-22dyncom: Minor cleanupLioncash1-282/+270
Removes some unused macros and cleans up indentation inconsistencies
2015-01-20dyncom: Clarify precedence for ternary statementsLioncash1-1/+1
2015-01-19dyncom: Implement missing shifts in ScaledRegisterPostIndexed, etcLioncash1-7/+33
2015-01-17dyncom: Handle the ARM A2 encoding of STRT/LDRTLioncash1-10/+24
These were also missing the shifted register case.
2015-01-17dyncom: Handle the ARM A2 encoding of LDRBT/STRBT.Lioncash1-17/+15
2015-01-12dyncom: Fix 32-bit ASR shifts for immediatesLioncash1-5/+3
2015-01-12dyncom: Remove unused flag macrosLioncash1-15/+3
2015-01-12dyncom: Get rid of unnecessary outer-scope variables in InterpreterMainLoopLioncash1-97/+108
2015-01-12dyncom: Fix overflow flag setting for ADD/RSB/RSC/SUB/SBCLioncash1-38/+41
Also cleans up CMN, and CMP.
2015-01-12dyncom: Add a helper function for addition with a carryLioncash1-12/+9
2015-01-12dyncom: Fix ADC overflow flag settingLioncash1-8/+12
2015-01-12dyncom: Fix conditional execution of MSRLioncash1-29/+31
2015-01-08dyncom: Fix UMAALLioncash1-4/+4
These need to be done as a 64-bit operation.
2015-01-07dyncom: Fix SMULWB/SMULWTLioncash1-10/+7
Wasn't doing proper sign-extension
2015-01-07dyncom: Fix SWPBLioncash1-0/+1
2015-01-07dyncom: Move over SMLALXYLioncash1-1/+56
2015-01-06Added exclusive reservation granule from ARMv7 spec to dyncom to protect LDR/STREX.Kevin Hartman1-5/+7
2015-01-05dyncom: Partially emulate BXJLioncash1-8/+25
Just in case some game studio let the intern write inline assembly or something.
2015-01-05dyncom: Actually set the Q flag for SMLABB/SMLABT/SMLATB/SMLATTLioncash1-1/+2
Easy skyeye todo fix.
2015-01-05dyncom: Implement QADD/QSUB/QDADD/QDSUBLioncash1-8/+103
2015-01-04skyeye: Remove duplicate typedefsLioncash1-4/+4
citra already has its own typedefs like this.
2015-01-03dyncom: Implement SMLAWLioncash1-1/+43
2015-01-03dyncom: Implement REVSHLioncash1-45/+45
Also joins the REV ops into one common place.
2015-01-03dyncom: Implement SMLALD/SMLSLDLioncash1-3/+72
2015-01-03dyncom: Implement SMMLA/SMMUL/SMMLSLioncash1-3/+64
2015-01-03dyncom: Implemented LDREXD/STREXD/LDREXH/STREXHbunnei1-100/+182
2015-01-03dyncom: Remove dead function InterpreterInitInstLengthLioncash1-27/+0
Technically eliminates two memory leaks as well.
2015-01-03dyncom: Implement SMLAD/SMUAD/SMLSD/SMUSDLioncash1-44/+73
2015-01-02dyncom: Implement SXTAB16 and SXTB16Lioncash1-3/+58
2015-01-01dyncom: Implement SHADD8/SHADD16/SHSUB8/SHSUB16/SHASX/SHSAXLioncash1-8/+110
2015-01-01dyncom: Implement SADD8/SSUB8Lioncash1-55/+108
2014-12-31dyncom: Implement UADD8/UADD16/USUB8/USUB16/UASX/USAXLioncash1-9/+208
2014-12-31dyncom: Massive refactorbunnei1-514/+191
2014-12-30dyncom: Implement USAT16/SSAT16Lioncash1-2/+61
2014-12-30dyncom: Implement USAT/SSATbunnei1-2/+94
2014-12-30dyncom: Various cleanups to match coding style, no functional changes.bunnei1-6066/+5168
2014-12-29dyncom: Fix SMLALXY's instruction labelsLioncash1-2/+2
They were erroneously labeled as SMLAL.
2014-12-29dyncom: Implement QADD8/QSUB8Lioncash1-32/+42
2014-12-29dyncom: Implement UXTB16/UXTAB16Lioncash1-2/+55
2014-12-29vfp: Actually make the code somewhat readableLioncash1-8/+41
2014-12-28dyncom: Implement PKHBT and PKHTB.bunnei1-2/+57
2014-12-28dyncom: Implement USAD8/USADA8Lioncash1-2/+52
2014-12-27dyncom: Implement UQADD8, UQADD16, UQSUB8, UQSUB16, UQASX, and UQSAX.Lioncash1-8/+97
2014-12-27dyncom: Implement UHADD8, UHADD16, UHSUB8, UHSUB16, UHASX, and UHSAXLioncash1-11/+123
2014-12-22dyncom: Move over QADD16/QASX/QSAX/QSUB16Lioncash1-7/+87
2014-12-22dyncom: Move SEL overLioncash1-1/+58
2014-12-22dyncom: Move over SASX/SSAX/SADD16/SSUB16Lioncash1-7/+102
2014-12-21More warning cleanupsChin1-6/+6
2014-12-19dyncom: Implement UMAALLioncash1-1/+47
2014-12-13Convert old logging calls to new logging macrosYuri Kunde Schlesner1-99/+101
2014-11-29dyncom: Use unordered_map rather than the terrible 2-level bb_mapYuri Kunde Schlesner1-33/+15
Seems (probably just placebo/wishful thinking) to make it slightly faster. Also reduces memory usage and makes shutdown when debugging from MSVC fast.
2014-11-29arm_dyncom_interpreter: Get rid of unused var warningsLioncash1-4/+2
2014-11-29Add comment regarding __WIN32__ in SkyEye codedarkf1-0/+4
2014-11-29Fix MinGW builddarkf1-0/+4
2014-11-12ARM: Removed unnecessary goto with each instruction.bunnei1-43/+39
2014-11-12ARM: Fixed several dyncom bugs.bunnei1-14/+19
- Fixed NZCVT flags to properly save state when function returns. - Fixed counter to keep track of the actual number of instructions executed. - Fixed single-step mode to only execute one instruction at a time. - DefaultIni: Removed comment that no longer applied to dyncom.
2014-10-25ARM: Updated dyncom core to use fast label lookup table on clang.bunnei1-3/+7
2014-10-25ARM: Integrate SkyEye faster "dyncom" interpreter.bunnei1-0/+6559
Fixed typo (make protected member public) Added license header back in. I originally removed this because I mostly rewrote the file, but meh ARM: Fixed a type error in dyncom interpreter. ARM: Updated dyncom to use unique_ptr for internal ARM state.
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