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arm_interface: Remove unused tls_address member of ThreadContext
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Currently, the TLS address is set within the scheduler, making this
member unused.
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Note that there's currently a dynarmic bug preventing this register from being written.
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This makes the formatting expectations more obvious (e.g. any zero padding specified
is padding that's entirely dedicated to the value being printed, not any pretty-printing
that also gets tacked on).
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LOG_GENERIC usages will be amended in a follow-up to keep API changes separate from
interface changes, as it will require removing a parameter from the relevant function
in the VMManager class.
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Implement Pull #3184 from citra: core/arm: Improve timing accuracy before service calls in JIT (Rebased)
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6b4c6b0 impl: Update PC when raising exception
7a1313a A64: Implement FDIV (vector)
b2d781d system: Raise exception for YIELD, WFE, WFI, SEV, SEVL
b277bf5 Correct FPSR and FPCR
7673933 A64: Implement USHL
8d0e558 A64: Implement UCVTF (vector, integer), scalar variant
da9a4f8 A64: Partially implement FCVTZU (scalar, fixed-point) and FCVTZS (scalar, fixed-point)
7479684 A64: Implement system register TPIDR_EL0
0fd75fd A64: Implement system registers FPCR and FPSR
31e370c A64: Implement system register CNTPCT_EL0
9a88fd3 A64: Implement system register CTR_EL0
1d16896 A64: Implement NEG (vector)
3184edf IR: Add IR instruction ZeroVector
31f8fbc emit_x64_floating_point: Add maybe_unused to preprocess parameter
567eb1a A64: Implement FMINNM (scalar)
c6d8fa1 A64: Implement FMAXNM (scalar)
616056d constant_pool: Add frame parameter
a3747cb A64: Implement ADDP (scalar)
5cd5d9f reg_alloc: Only exchange GPRs
dd0452a A64: Implement DUP (element), scalar variant
e5732ea emit_x64_floating_point: Correct FP{Max,Min}{32,64} implementations for -0/+0
40eb9c3 A64: Implement FMAX (scalar), FMIN (scalar)
7cef39b fuzz_with_unicorn: QEMU's implementation of FCVT is incorrect
826dce2 travis: Switch unicorn repository
9605f28 a64/config: Allow NaN emulation accuracy to be set
e9435bc a64_emit_x64: Add conf to A64EmitContext
30b596d fuzz_with_unicorn: Explicitly test floating point instructions
be292a8 A64: Implement FSQRT (scalar)
3c42d48 backend_x64: Accurately handle NaNs
4aefed0 fuzz_with_unicorn: Print AArch64 disassembly
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Changes: Primarily implementing more A64 instructions
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* Fixes some cast warnings, partially fixes citra #3064
* Converted casts to uint32_t to u32
* Ran clang-format
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bc73004 a64_merge_interpret_blocks: Remove debug output
4e656ed tests/A64: Randomize PSTATE.<NZCV>
fd9530b A64: Optimization: Merge interpret blocks
3c9eb04 testenv: Use format constants
324f3fc tests/A64: Unicorn interface fixes
98ecbe7 tests/A64: Fuzz against unicorn
b1d38e7 tests/A64: Move TestEnvironment to own header
5218ad9 A64/data_processing_pcrel: bug: ADR{,P} instructions sign extend their immediate
b1a8c39 A64/data_processing_addsub: bug: {ADD,SUB}S (extended register) instructions write to ZR when d = 31
64827fb a64_emit_x64: bug: A64CallSupervisor trampled callee-save registers
1bfa04d emit_x64: bug: OP m/r64, imm32 form instructions sign-extend their immediate on x64
edadeea A64 inferface: Use two argument static_assert
9ab1304 A64: Add ExceptionRaised IR instruction
6843eed Update readme
7438d07 A64/translate: Add TranslateSingleInstruction function
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# Conflicts:
# src/core/CMakeLists.txt
# src/core/arm/dynarmic/arm_dynarmic.cpp
# src/core/arm/dyncom/arm_dyncom.cpp
# src/core/hle/kernel/process.cpp
# src/core/hle/kernel/thread.cpp
# src/core/hle/kernel/thread.h
# src/core/hle/kernel/vm_manager.cpp
# src/core/loader/3dsx.cpp
# src/core/loader/elf.cpp
# src/core/loader/ncch.cpp
# src/core/memory.cpp
# src/core/memory.h
# src/core/memory_setup.h
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Kernel/Memory: Give each process its own page table and allow switching the current page table upon reschedule
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arm_dynarmic: Provide MemoryReadCode callback
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Change of interface in dynarmic 36082087ded632079b16d24137fdd0c450ce82ea
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This makes clang-format useful on those.
Also add a bunch of forgotten transitive includes, which otherwise
prevented compilation.
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