Commit message (Collapse) | Author | Files | Lines | ||
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2021-05-04 | service: Resolve cases of member field shadowing | Lioncash | 1 | -2/+2 | |
Now all that remains is for kernel code to be 'shadow-free' and then -Wshadow can be turned into an error. | |||||
2021-03-24 | arm_dynarmic: Always have a 'valid' jit instance | MerryMage | 1 | -2/+3 | |
2020-11-29 | core: arm: Implement InvalidateCacheRange for CPU cache invalidation. | bunnei | 1 | -0/+1 | |
2020-11-29 | hle: kernel: multicore: Replace n-JITs impl. with 4 JITs. | bunnei | 1 | -0/+1 | |
2020-11-04 | core: Remove usage of unicorn | Lioncash | 1 | -2/+0 | |
Unicorn long-since lost most of its use, due to dynarmic gaining support for handling most instructions. At this point any further issues encountered should be used to make dynarmic better. This also allows us to remove our dependency on Python. | |||||
2020-10-21 | Revert "core: Fix clang build" | bunnei | 1 | -4/+4 | |
2020-10-18 | core: Fix clang build | Lioncash | 1 | -4/+4 | |
Recent changes to the build system that made more warnings be flagged as errors caused building via clang to break. Fixes #4795 | |||||
2020-06-28 | Core/Common: Address Feedback. | Fernando Sahmkow | 1 | -1/+1 | |
2020-06-27 | ARM: Update Dynarmic and Setup A32 according to latest interface. | Fernando Sahmkow | 1 | -25/+0 | |
2020-06-27 | SingleCore: Use Cycle Timing instead of Host Timing. | Fernando Sahmkow | 1 | -1/+1 | |
2020-06-27 | General: Move ARM_Interface into Threads. | Fernando Sahmkow | 1 | -0/+1 | |
2020-06-27 | Core: Refactor ARM Interface. | Fernando Sahmkow | 1 | -1/+1 | |
2020-06-27 | ARM: Addapt to new Exclusive Monitor Interface. | Fernando Sahmkow | 1 | -5/+5 | |
2020-06-27 | ARM/Memory: Correct Exclusive Monitor and Implement Exclusive Memory Writes. | Fernando Sahmkow | 1 | -1/+5 | |
2020-06-27 | General: Recover Prometheus project from harddrive failure | Fernando Sahmkow | 1 | -1/+3 | |
This commit: Implements CPU Interrupts, Replaces Cycle Timing for Host Timing, Reworks the Kernel's Scheduler, Introduce Idle State and Suspended State, Recreates the bootmanager, Initializes Multicore system. | |||||
2020-04-17 | core: memory: Move to Core::Memory namespace. | bunnei | 1 | -2/+2 | |
- helpful to disambiguate Kernel::Memory namespace. | |||||
2020-03-03 | core: Implement separate A32/A64 ARM interfaces. | bunnei | 1 | -14/+16 | |
2020-02-26 | ARM_Interface: Cache the JITs instead of deleting/recreating. | Fernando Sahmkow | 1 | -2/+10 | |
This was a bug inherited from citra which was fixed by then at some time. This commit corrects such bug and ensures JITs are correctly recycled. | |||||
2019-11-27 | core/memory: Migrate over Write{8, 16, 32, 64, Block} to the Memory class | Lioncash | 1 | -1/+6 | |
The Write functions are used slightly less than the Read functions, which make these a bit nicer to move over. The only adjustments we really need to make here are to Dynarmic's exclusive monitor instance. We need to keep a reference to the currently active memory instance to perform exclusive read/write operations. | |||||
2019-11-27 | core: Prepare various classes for memory read/write migration | Lioncash | 1 | -1/+0 | |
Amends a few interfaces to be able to handle the migration over to the new Memory class by passing the class by reference as a function parameter where necessary. Notably, within the filesystem services, this eliminates two ReadBlock() calls by using the helper functions of HLERequestContext to do that for us. | |||||
2019-07-11 | core/arm: Remove obsolete Unicorn memory mapping | Lioncash | 1 | -3/+0 | |
This was initially necessary when AArch64 JIT emulation was in its infancy and all memory-related instructions weren't implemented. Given the JIT now has all of these facilities implemented, we can remove these functions from the CPU interface. | |||||
2019-04-12 | core/cpu_core_manager: Create threads separately from initialization. | Lioncash | 1 | -2/+4 | |
Our initialization process is a little wonky than one would expect when it comes to code flow. We initialize the CPU last, as opposed to hardware, where the CPU obviously needs to be first, otherwise nothing else would work, and we have code that adds checks to get around this. For example, in the page table setting code, we check to see if the system is turned on before we even notify the CPU instances of a page table switch. This results in dead code (at the moment), because the only time a page table switch will occur is when the system is *not* running, preventing the emulated CPU instances from being notified of a page table switch in a convenient manner (technically the code path could be taken, but we don't emulate the process creation svc handlers yet). This moves the threads creation into its own member function of the core manager and restores a little order (and predictability) to our initialization process. Previously, in the multi-threaded cases, we'd kick off several threads before even the main kernel process was created and ready to execute (gross!). Now the initialization process is like so: Initialization: 1. Timers 2. CPU 3. Kernel 4. Filesystem stuff (kind of gross, but can be amended trivially) 5. Applet stuff (ditto in terms of being kind of gross) 6. Main process (will be moved into the loading step in a following change) 7. Telemetry (this should be initialized last in the future). 8. Services (4 and 5 should ideally be alongside this). 9. GDB (gross. Uses namespace scope state. Needs to be refactored into a class or booted altogether). 10. Renderer 11. GPU (will also have its threads created in a separate step in a following change). Which... isn't *ideal* per-se, however getting rid of the wonky intertwining of CPU state initialization out of this mix gets rid of most of the footguns when it comes to our initialization process. | |||||
2019-04-08 | kernel/svc: Deglobalize the supervisor call handlers | Lioncash | 1 | -7/+3 | |
Adjusts the interface of the wrappers to take a system reference, which allows accessing a system instance without using the global accessors. This also allows getting rid of all global accessors within the supervisor call handling code. While this does make the wrappers themselves slightly more noisy, this will be further cleaned up in a follow-up. This eliminates the global system accessors in the current code while preserving the existing interface. | |||||
2019-04-07 | arm/arm_dynarmic: Remove unnecessary current_page_table member | Lioncash | 1 | -6/+0 | |
Given the page table will always be guaranteed to be that of whatever the current process is, we no longer need to keep this around. | |||||
2019-04-04 | core: Add missing override specifiers where applicable | Lioncash | 1 | -2/+2 | |
Applies the override specifier where applicable. In the case of destructors that are defaulted in their definition, they can simply be removed. This also removes the unnecessary inclusions being done in audin_u and audrec_u, given their close proximity. | |||||
2019-03-17 | core: Move PageTable struct into Common. | bunnei | 1 | -2/+2 | |
2019-02-16 | core_timing: Convert core timing into a class | Lioncash | 1 | -1/+7 | |
Gets rid of the largest set of mutable global state within the core. This also paves a way for eliminating usages of GetInstance() on the System class as a follow-up. Note that no behavioral changes have been made, and this simply extracts the functionality into a class. This also has the benefit of making dependencies on the core timing functionality explicit within the relevant interfaces. | |||||
2018-12-19 | Moved backtrace to ArmInterface | David Marcec | 1 | -2/+0 | |
2018-12-03 | Moved backtrace to ArmInterface | David Marcec | 1 | -0/+2 | |
Added to both dynarmic and unicorn | |||||
2018-10-15 | core: Make the exclusive monitor a unique_ptr instead of a shared_ptr | Lioncash | 1 | -2/+2 | |
Like the barrier, this is owned entirely by the System and will always outlive the encompassing state, so shared ownership semantics aren't necessary here. | |||||
2018-09-21 | arm_interface: Replace kernel vm_manager include with a forward declaration | Lioncash | 1 | -0/+4 | |
Avoids an unnecessary inclusion and also uncovers three places where indirect inclusions were relied upon, which allows us to also resolve those. | |||||
2018-09-18 | arm_interface: Remove ARM11-isms from the CPU interface | Lioncash | 1 | -6/+4 | |
This modifies the CPU interface to more accurately match an AArch64-supporting CPU as opposed to an ARM11 one. Two of the methods don't even make sense to keep around for this interface, as Adv Simd is used, rather than the VFP in the primary execution state. This is essentially a modernization change that should have occurred from the get-go. | |||||
2018-09-15 | Port #4182 from Citra: "Prefix all size_t with std::" | fearlessTobi | 1 | -11/+11 | |
2018-08-25 | core: Namespace all code in the arm subdirectory under the Core namespace | Lioncash | 1 | -0/+4 | |
Gets all of these types and interfaces out of the global namespace. | |||||
2018-07-24 | arm_dynarmic: Make MakeJit() a const member function | Lioncash | 1 | -1/+1 | |
This functions doesn't modify instance state, so it can be a made a const member function. | |||||
2018-07-24 | exclusive_monitor: Use consistent type alias for u64 | Lioncash | 1 | -7/+6 | |
Uses the same type aliases we use for virtual addresses, and converts one lingering usage of std::array<uint64_t, 2> to u128 for consistency. | |||||
2018-07-22 | Implement exclusive monitor | MerryMage | 1 | -1/+29 | |
2018-07-21 | CPU: Save and restore the TPIDR_EL0 system register on every context switch. | Subv | 1 | -0/+2 | |
Note that there's currently a dynarmic bug preventing this register from being written. | |||||
2018-07-16 | scheduler: Clear exclusive state when switching contexts | MerryMage | 1 | -0/+1 | |
2018-03-16 | arm_interface: Support unmapping previously mapped memory. | bunnei | 1 | -1/+1 | |
2018-02-25 | Implements citra-emu/citra#3184 | N00byKing | 1 | -1/+4 | |
2018-02-09 | dynarmic: Update to 41ae12263 | MerryMage | 1 | -1/+1 | |
Changes: Primarily implementing more A64 instructions | |||||
2018-01-13 | yuzu: Update license text to be consistent across project. | bunnei | 1 | -1/+1 | |
2018-01-12 | arm_dynarmic: Implement core | MerryMage | 1 | -2/+14 | |
2018-01-04 | arm_dynarmic: More cleanup. | bunnei | 1 | -6/+0 | |
2018-01-04 | arm_dynarmic: Gut interface until dynarmic is ready for general use. | bunnei | 1 | -8/+3 | |
2018-01-03 | arm: Remove SkyEye/Dyncom code that is ARMv6-only. | bunnei | 1 | -6/+1 | |
2017-09-30 | arm_interface: Set TLS address for dynarmic core. | bunnei | 1 | -0/+2 | |
2017-09-30 | arm: Use 64-bit addressing in a bunch of places. | bunnei | 1 | -4/+4 | |
2017-09-30 | Moved down_count to CoreTiming | Huw Pascoe | 1 | -2/+0 | |
2017-09-25 | ARM_Interface: Implement PageTableChanged | MerryMage | 1 | -1/+9 | |
2017-02-03 | arm_dynarmic: CP15 support | MerryMage | 1 | -1/+1 | |
2016-12-22 | ThreadContext: Move from "core" to "arm_interface". | bunnei | 1 | -6/+2 | |
2016-09-21 | Remove empty newlines in #include blocks. | Emmanuel Gil Peyrot | 1 | -3/+0 | |
This makes clang-format useful on those. Also add a bunch of forgotten transitive includes, which otherwise prevented compilation. | |||||
2016-09-15 | arm: ResetContext shouldn't be part of ARM_Interface. | bunnei | 1 | -1/+0 | |
2016-09-15 | arm_dynarmic/arm_dyncom: Remove unnecessary "virtual" keyword. | bunnei | 1 | -1/+1 | |
2016-09-15 | dynarmic: Implement ARM CPU interface. | bunnei | 1 | -8/+9 | |
2016-08-27 | ARM: add ClearInstructionCache function | wwylele | 1 | -0/+2 | |
2015-08-07 | arm_interface: Implement interface for retrieving VFP registers | Lioncash | 1 | -0/+4 | |
2015-07-26 | dyncom: Rename armdefs.h to armstate.h | Lioncash | 1 | -1/+1 | |
2015-06-28 | Core: Cleanup core includes. | Emmanuel Gil Peyrot | 1 | -0/+5 | |
2015-05-11 | fixup! Set the TLS address in the scheduler | Subv | 1 | -1/+1 | |
2015-05-11 | Core/Memory: Give every emulated thread it's own TLS area. | Subv | 1 | -1/+1 | |
The TLS area for thread T with id Ti is located at TLS_AREA_VADDR + (Ti - 1) * 0x200. This allows some games like Mario Kart 7 to continue further. | |||||
2015-04-14 | Headers: Add some forgotten overrides, thanks clang! | Emmanuel Gil Peyrot | 1 | -1/+1 | |
2015-04-06 | arm_interface: Support retrieval/storage to CP15 registers | Lioncash | 1 | -0/+2 | |
2015-03-16 | arm_interface: Get rid of GetTicks. | Lioncash | 1 | -1/+0 | |
Removes a TODO. | |||||
2015-02-13 | dyncom: Switch the app and system cores into the correct mode at initialization | Lioncash | 1 | -1/+1 | |
2015-02-10 | Scheduler refactor Pt. 1 | Kevin Hartman | 1 | -56/+1 | |
* Simplifies scheduling logic, specifically regarding thread status. It should be much clearer which statuses are valid for a thread at any given point in the system. * Removes dead code from thread.cpp. * Moves the implementation of resetting a ThreadContext to the corresponding core's implementation. Other changes: * Fixed comments in arm interfaces. * Updated comments in thread.cpp * Removed confusing, useless, functions like MakeReady() and ChangeStatus() from thread.cpp. * Removed stack_size from Thread. In the CTR kernel, the thread's stack would be allocated before thread creation. | |||||
2015-01-09 | Move ThreadContext to core/core.h and deal with the fallout | Yuri Kunde Schlesner | 1 | -2/+2 | |
2015-01-09 | Timing: Use CoreTiming::GetTicks to keep track of ticks. | Subv | 1 | -3/+0 | |
This will keep track of idle ticks for us, and fixes some tickcount-related issues | |||||
2014-12-26 | ARM: Add a mechanism for faking CPU time elapsed during HLE. | bunnei | 1 | -4/+10 | |
- Also a few cleanups. | |||||
2014-12-21 | License change | purpasmart96 | 1 | -1/+1 | |
2014-11-19 | Remove trailing spaces in every file but the ones imported from SkyEye, AOSP or generated | Emmanuel Gil Peyrot | 1 | -1/+1 | |
2014-11-18 | Fix documentation of parameters | Lioncash | 1 | -1/+1 | |
2014-10-26 | Add `override` keyword through the code. | Yuri Kunde Schlesner | 1 | -7/+7 | |
This was automated using `clang-modernize`. | |||||
2014-10-25 | ARM: Integrate SkyEye faster "dyncom" interpreter. | bunnei | 1 | -8/+8 | |
Fixed typo (make protected member public) Added license header back in. I originally removed this because I mostly rewrote the file, but meh ARM: Fixed a type error in dyncom interpreter. ARM: Updated dyncom to use unique_ptr for internal ARM state. | |||||
2014-10-25 | ARM: Reorganized file structure to move shared SkyEye code to a more common area. | bunnei | 1 | -2/+2 | |
Removed s_ prefix | |||||
2014-06-02 | arm: added option to prepare CPU core (while mid-instruction) for thread reschedule | bunnei | 1 | -0/+3 | |
2014-05-21 | ARM_Interpreter/ARM_Interface: Fixed member variable naming to be consistent with style guide | bunnei | 1 | -1/+1 | |
2014-05-21 | ARM_Interface: added SaveContext and LoadContext functions for HLE thread switching | bunnei | 1 | -0/+12 | |
2014-05-17 | updated how we call ARM core to make things much faster | bunnei | 1 | -2/+5 | |
2014-05-12 | added option to set CPSR register to arm_interface | bunnei | 1 | -0/+6 | |
2014-04-28 | removed DISALLOW_COPY_AND_ASSIGN in favor of NonCopyable class | bunnei | 1 | -1/+0 | |
2014-04-11 | cleaned up arm_interface, added a setter to set registers for use with HLE return values | bunnei | 1 | -2/+35 | |
2014-04-09 | fixed licensing and updated code style naming for arm_interface/arm_interpreter frontend module | bunnei | 1 | -30/+8 | |
2014-04-09 | fixed project includes to use new directory structure | bunnei | 1 | -5/+4 | |
2014-04-09 | got rid of 'src' folders in each sub-project | bunnei | 1 | -0/+0 | |
2014-04-05 | changed hw_lcd to use ARM core correct tick counter instead of [what was actually] just an instruction count. this seems to fix timing issues with the 3DS_Homebrew_Pong3Dv2 demo. | bunnei | 1 | -0/+7 | |
2014-04-05 | - added an interface layer for ARM cores | bunnei | 1 | -28/+21 | |
- cleaned up core.cpp a bit | |||||
2013-10-06 | fixed a typo in declaration of meta file system | ShizZy | 1 | -2/+2 | |
2013-10-03 | moved some core functions over to system module | ShizZy | 1 | -1/+6 | |
2013-10-02 | added core_timing and system modules to core vcproj | ShizZy | 1 | -0/+52 | |