Commit message (Collapse) | Author | Age | Files | Lines | |
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* | arm_dynarmic: Increase size of code cache | MerryMage | 2021-04-02 | 1 | -0/+4 |
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* | arm_dynarmic: Always have a 'valid' jit instance | MerryMage | 2021-03-24 | 1 | -23/+8 |
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* | core: arm_dynarmic: Ensure JIT state is saved/restored on page table changes. | bunnei | 2021-03-21 | 1 | -0/+5 |
| | | | | - We re-create the JIT here without preserving any state. | ||||
* | arm_dynarmic_32: Print out CPSR.T on exception | MerryMage | 2021-02-01 | 1 | -2/+3 |
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* | arm: dynarmic: Reintroduce JIT checks on SaveContext/LoadContext. | bunnei | 2021-01-29 | 1 | -0/+6 |
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* | core: arm: Remove unnecessary JIT checks. | bunnei | 2021-01-29 | 1 | -12/+0 |
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* | arm: arm_dynarmic: Skip calls when JIT is invalid. | bunnei | 2021-01-29 | 1 | -0/+12 |
| | | | | - This can happen if called from an idle or suspension thread. | ||||
* | core: Silence unhandled enum in switch warnings | ReinUsesLisp | 2021-01-09 | 1 | -8/+1 |
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* | dynarmic: Add Unsafe_InaccurateNaN optimization | MerryMage | 2021-01-02 | 1 | -0/+3 |
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* | core/memory: Read and write page table atomically | ReinUsesLisp | 2020-12-30 | 1 | -0/+1 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | Squash attributes into the pointer's integer, making them an uintptr_t pair containing 2 bits at the bottom and then the pointer. These bits are currently unused thanks to alignment requirements. Configure Dynarmic to mask out these bits on pointer reads. While we are at it, remove some unused attributes carried over from Citra. Read/Write and other hot functions use a two step unpacking process that is less readable to stop MSVC from emitting an extra AND instruction in the hot path: mov rdi,rcx shr rdx,0Ch mov r8,qword ptr [rax+8] mov rax,qword ptr [r8+rdx*8] mov rdx,rax -and al,3 and rdx,0FFFFFFFFFFFFFFFCh je Core::Memory::Memory::Impl::Read<unsigned char> mov rax,qword ptr [vaddr] movzx eax,byte ptr [rdx+rax] | ||||
* | hle: kernel: physical_core: Clear exclusive state after each run. | bunnei | 2020-12-06 | 1 | -0/+3 |
| | | | | - This is closer to pre-multicore behavior, and works a bit better. | ||||
* | core: arm: Implement InvalidateCacheRange for CPU cache invalidation. | bunnei | 2020-11-29 | 1 | -0/+7 |
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* | hle: kernel: multicore: Replace n-JITs impl. with 4 JITs. | bunnei | 2020-11-29 | 1 | -0/+4 |
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* | core: Remove usage of unicorn | Lioncash | 2020-11-04 | 1 | -0/+1 |
| | | | | | | | | Unicorn long-since lost most of its use, due to dynarmic gaining support for handling most instructions. At this point any further issues encountered should be used to make dynarmic better. This also allows us to remove our dependency on Python. | ||||
* | Revert "core: Fix clang build" | bunnei | 2020-10-21 | 1 | -5/+5 |
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* | core: Fix clang build | Lioncash | 2020-10-18 | 1 | -5/+5 |
| | | | | | | | Recent changes to the build system that made more warnings be flagged as errors caused building via clang to break. Fixes #4795 | ||||
* | dynarmic: Add unsafe optimizations | MerryMage | 2020-08-16 | 1 | -1/+12 |
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* | configure_cpu: Show/Hide debugging options | MerryMage | 2020-07-11 | 1 | -23/+25 |
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* | configuration: Add settings to enable/disable specific CPU optimizations | MerryMage | 2020-07-11 | 1 | -4/+24 |
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* | Core/Common: Address Feedback. | Fernando Sahmkow | 2020-06-28 | 1 | -2/+3 |
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* | SVC: Implement 32-bits wrappers and update Dynarmic. | Fernando Sahmkow | 2020-06-27 | 1 | -1/+7 |
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* | ARM: Update Dynarmic and Setup A32 according to latest interface. | Fernando Sahmkow | 2020-06-27 | 1 | -2/+39 |
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* | ARMDynarmicInterface: Correct GCC Build Errors. | Fernando Sahmkow | 2020-06-27 | 1 | -3/+3 |
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* | Dynarmic Interface: don't clear cache if JIT has not been created. | Fernando Sahmkow | 2020-06-27 | 1 | -0/+3 |
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* | General: Cleanup legacy code. | Fernando Sahmkow | 2020-06-27 | 1 | -1/+0 |
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* | SingleCore: Use Cycle Timing instead of Host Timing. | Fernando Sahmkow | 2020-06-27 | 1 | -12/+25 |
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* | General: Move ARM_Interface into Threads. | Fernando Sahmkow | 2020-06-27 | 1 | -0/+4 |
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* | Core: Refactor ARM Interface. | Fernando Sahmkow | 2020-06-27 | 1 | -3/+3 |
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* | SVC/ARM: Correct svcSendSyncRequest and cache ticks on arm interface. | Fernando Sahmkow | 2020-06-27 | 1 | -2/+9 |
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* | General: Fix microprofile on dynarmic/svc, fix wait tree showing which threads were running. | Fernando Sahmkow | 2020-06-27 | 1 | -4/+0 |
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* | Core: Correct rebase. | Fernando Sahmkow | 2020-06-27 | 1 | -12/+6 |
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* | General: Recover Prometheus project from harddrive failure | Fernando Sahmkow | 2020-06-27 | 1 | -3/+3 |
| | | | | | | | This commit: Implements CPU Interrupts, Replaces Cycle Timing for Host Timing, Reworks the Kernel's Scheduler, Introduce Idle State and Suspended State, Recreates the bootmanager, Initializes Multicore system. | ||||
* | arm_dynarmic_32: Log under Core_ARM instead of HW_GPU | Morph | 2020-06-22 | 1 | -1/+1 |
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* | arm_dynarmic_32: Fix implicit conversion error in SetTPIDR_EL0 | ReinUsesLisp | 2020-06-18 | 1 | -1/+1 |
| | | | | On MSVC builds we treat conversion warnings as errors. | ||||
* | arm_dynarmic_cp15: Update CP15 | MerryMage | 2020-06-17 | 1 | -9/+7 |
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* | arm_dynarmic_32: InterpreterFallback should never happen | MerryMage | 2020-06-17 | 1 | -2/+3 |
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* | core: kernel: Move SVC to its own namesapce. | bunnei | 2020-04-17 | 1 | -1/+1 |
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* | core: Implement separate A32/A64 ARM interfaces. | bunnei | 2020-03-03 | 1 | -0/+208 |