Commit message (Collapse) | Author | Files | Lines | ||
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2022-02-02 | general: Replace NonCopyable struct with equivalents | Lioncash | 1 | -1/+5 | |
2021-05-27 | core/arm_interface: Call SVC after end of dynarmic block. | Markus Wick | 1 | -3/+0 | |
So we can modify all of dynarmic states within SVC without ExceptionalExit. Especially as the ExceptionalExit hack is dropped on upstream dynarmic. | |||||
2021-05-26 | core/arm: Drop ChangeProcessorID. | Markus Wick | 1 | -2/+0 | |
This code was used to switch the CPU ID on thread switches. However since "hle: kernel: multicore: Replace n-JITs impl. with 4 JITs.", the CPU ID is not a constant. This has been dead code since this rewrite, and dropped in dynarmic as well. So there is no need to keep it. | |||||
2021-01-11 | core: arm: arm_interface: Fix shadowing errors. | bunnei | 1 | -3/+4 | |
2020-11-29 | core: arm: Implement InvalidateCacheRange for CPU cache invalidation. | bunnei | 1 | -6/+13 | |
2020-11-29 | hle: kernel: multicore: Replace n-JITs impl. with 4 JITs. | bunnei | 1 | -0/+3 | |
2020-10-21 | Revert "core: Fix clang build" | bunnei | 1 | -4/+4 | |
2020-10-18 | core: Fix clang build | Lioncash | 1 | -4/+4 | |
Recent changes to the build system that made more warnings be flagged as errors caused building via clang to break. Fixes #4795 | |||||
2020-06-28 | Core/Common: Address Feedback. | Fernando Sahmkow | 1 | -1/+1 | |
2020-06-27 | SVC: Implement 32-bits wrappers and update Dynarmic. | Fernando Sahmkow | 1 | -3/+2 | |
2020-06-27 | SingleCore: Use Cycle Timing instead of Host Timing. | Fernando Sahmkow | 1 | -2/+4 | |
2020-06-27 | General: Move ARM_Interface into Threads. | Fernando Sahmkow | 1 | -0/+2 | |
2020-06-27 | Core: Refactor ARM Interface. | Fernando Sahmkow | 1 | -3/+6 | |
2020-06-27 | ARM/WaitTree: Better track the CallStack for each thread. | Fernando Sahmkow | 1 | -0/+3 | |
2020-06-27 | Scheduler: Remove arm_interface lock and a few corrections. | Fernando Sahmkow | 1 | -10/+0 | |
2020-06-27 | General: Add better safety for JIT use. | Fernando Sahmkow | 1 | -0/+10 | |
2020-06-27 | General: Recover Prometheus project from harddrive failure | Fernando Sahmkow | 1 | -1/+4 | |
This commit: Implements CPU Interrupts, Replaces Cycle Timing for Host Timing, Reworks the Kernel's Scheduler, Introduce Idle State and Suspended State, Recreates the bootmanager, Initializes Multicore system. | |||||
2020-04-17 | arm_interface: Ensure ThreadContext is zero'd out. | bunnei | 1 | -16/+16 | |
2020-03-03 | core: Implement separate A32/A64 ARM interfaces. | bunnei | 1 | -13/+19 | |
2019-11-27 | core: Prepare various classes for memory read/write migration | Lioncash | 1 | -1/+7 | |
Amends a few interfaces to be able to handle the migration over to the new Memory class by passing the class by reference as a function parameter where necessary. Notably, within the filesystem services, this eliminates two ReadBlock() calls by using the helper functions of HLERequestContext to do that for us. | |||||
2019-07-11 | core/arm: Remove obsolete Unicorn memory mapping | Lioncash | 1 | -7/+0 | |
This was initially necessary when AArch64 JIT emulation was in its infancy and all memory-related instructions weren't implemented. Given the JIT now has all of these facilities implemented, we can remove these functions from the CPU interface. | |||||
2019-05-25 | arm_interface: Expand backtrace generation | Zach Hilman | 1 | -0/+11 | |
Returns results as a vector of entries for further processing. Logs addresses, offsets, and mangled name. | |||||
2019-04-12 | core/cpu_core_manager: Create threads separately from initialization. | Lioncash | 1 | -2/+12 | |
Our initialization process is a little wonky than one would expect when it comes to code flow. We initialize the CPU last, as opposed to hardware, where the CPU obviously needs to be first, otherwise nothing else would work, and we have code that adds checks to get around this. For example, in the page table setting code, we check to see if the system is turned on before we even notify the CPU instances of a page table switch. This results in dead code (at the moment), because the only time a page table switch will occur is when the system is *not* running, preventing the emulated CPU instances from being notified of a page table switch in a convenient manner (technically the code path could be taken, but we don't emulate the process creation svc handlers yet). This moves the threads creation into its own member function of the core manager and restores a little order (and predictability) to our initialization process. Previously, in the multi-threaded cases, we'd kick off several threads before even the main kernel process was created and ready to execute (gross!). Now the initialization process is like so: Initialization: 1. Timers 2. CPU 3. Kernel 4. Filesystem stuff (kind of gross, but can be amended trivially) 5. Applet stuff (ditto in terms of being kind of gross) 6. Main process (will be moved into the loading step in a following change) 7. Telemetry (this should be initialized last in the future). 8. Services (4 and 5 should ideally be alongside this). 9. GDB (gross. Uses namespace scope state. Needs to be refactored into a class or booted altogether). 10. Renderer 11. GPU (will also have its threads created in a separate step in a following change). Which... isn't *ideal* per-se, however getting rid of the wonky intertwining of CPU state initialization out of this mix gets rid of most of the footguns when it comes to our initialization process. | |||||
2018-12-31 | arm_interface: Make LogBacktrace() a const member function | Lioncash | 1 | -1/+1 | |
This function doesn't modify instance state, so it can be made const. | |||||
2018-12-29 | Moved log backtrace to arm_interface.cpp. Added printing of error code to fatal | David Marcec | 1 | -17/+7 | |
2018-12-19 | Moved backtrace to ArmInterface | David Marcec | 1 | -1/+17 | |
2018-12-03 | Moved backtrace to ArmInterface | David Marcec | 1 | -0/+2 | |
Added to both dynarmic and unicorn | |||||
2018-09-30 | arm_interface: Add missing fpsr/tpidr members to the ThreadContext struct | Lioncash | 1 | -2/+8 | |
Internally within the kernel, it also includes a member variable for the floating-point status register, and TPIDR, so we should do the same here to match it. While we're at it, also fix up the size of the struct and add a static assertion to ensure it always stays the correct size. | |||||
2018-09-21 | arm_interface: Replace kernel vm_manager include with a forward declaration | Lioncash | 1 | -1/+4 | |
Avoids an unnecessary inclusion and also uncovers three places where indirect inclusions were relied upon, which allows us to also resolve those. | |||||
2018-09-18 | arm_interface: Remove ARM11-isms from the CPU interface | Lioncash | 1 | -22/+31 | |
This modifies the CPU interface to more accurately match an AArch64-supporting CPU as opposed to an ARM11 one. Two of the methods don't even make sense to keep around for this interface, as Adv Simd is used, rather than the VFP in the primary execution state. This is essentially a modernization change that should have occurred from the get-go. | |||||
2018-09-15 | Port #4182 from Citra: "Prefix all size_t with std::" | fearlessTobi | 1 | -2/+2 | |
2018-08-25 | core: Namespace all code in the arm subdirectory under the Core namespace | Lioncash | 1 | -0/+4 | |
Gets all of these types and interfaces out of the global namespace. | |||||
2018-07-21 | CPU: Save and restore the TPIDR_EL0 system register on every context switch. | Subv | 1 | -0/+4 | |
Note that there's currently a dynarmic bug preventing this register from being written. | |||||
2018-07-21 | arm_interface: Remove unused tls_address member of ThreadContext | Lioncash | 1 | -3/+0 | |
Currently, the TLS address is set within the scheduler, making this member unused. | |||||
2018-07-16 | scheduler: Clear exclusive state when switching contexts | MerryMage | 1 | -0/+2 | |
2018-03-16 | arm_interface: Support unmapping previously mapped memory. | bunnei | 1 | -1/+5 | |
2018-02-25 | Implements citra-emu/citra#3184 | N00byKing | 1 | -26/+3 | |
2018-01-16 | clang-format | MerryMage | 1 | -1/+2 | |
2018-01-12 | arm_dynarmic: Implement core | MerryMage | 1 | -7/+5 | |
2018-01-03 | arm: Remove SkyEye/Dyncom code that is ARMv6-only. | bunnei | 1 | -30/+0 | |
2017-09-30 | arm_interface: Set TLS address for dynarmic core. | bunnei | 1 | -0/+7 | |
2017-09-30 | arm: Use 64-bit addressing in a bunch of places. | bunnei | 1 | -14/+14 | |
2017-09-30 | Moved down_count to CoreTiming | Huw Pascoe | 1 | -9/+0 | |
2017-09-25 | ARM_Interface: Implement PageTableChanged | MerryMage | 1 | -0/+3 | |
2016-12-22 | ThreadContext: Move from "core" to "arm_interface". | bunnei | 1 | -6/+13 | |
2016-09-19 | Manually tweak source formatting and then re-run clang-format | Yuri Kunde Schlesner | 1 | -2/+1 | |
2016-09-18 | Sources: Run clang-format on everything. | Emmanuel Gil Peyrot | 1 | -4/+3 | |
2016-09-15 | arm: ResetContext shouldn't be part of ARM_Interface. | bunnei | 1 | -9/+0 | |
2016-08-27 | ARM: add ClearInstructionCache function | wwylele | 1 | -0/+3 | |
2016-05-17 | Set fpscr for new threads | Jannik Vogel | 1 | -0/+1 | |
2015-12-06 | arm_interface: Make GetNumInstructions const | Lioncash | 1 | -1/+1 | |
2015-12-06 | arm_interface: directly initialize class members | Lioncash | 1 | -7/+2 | |
2015-08-07 | arm_interface: Implement interface for retrieving VFP registers | Lioncash | 1 | -0/+28 | |
2015-05-11 | fixup! Set the TLS address in the scheduler | Subv | 1 | -2/+1 | |
2015-05-11 | Core/Memory: Give every emulated thread it's own TLS area. | Subv | 1 | -1/+2 | |
The TLS area for thread T with id Ti is located at TLS_AREA_VADDR + (Ti - 1) * 0x200. This allows some games like Mario Kart 7 to continue further. | |||||
2015-05-07 | Common: Remove common.h | Yuri Kunde Schlesner | 1 | -1/+0 | |
2015-04-06 | arm_interface: Support retrieval/storage to CP15 registers | Lioncash | 1 | -0/+15 | |
2015-03-16 | arm_interface: Get rid of GetTicks. | Lioncash | 1 | -6/+0 | |
Removes a TODO. | |||||
2015-02-10 | Scheduler refactor Pt. 1 | Kevin Hartman | 1 | -0/+9 | |
* Simplifies scheduling logic, specifically regarding thread status. It should be much clearer which statuses are valid for a thread at any given point in the system. * Removes dead code from thread.cpp. * Moves the implementation of resetting a ThreadContext to the corresponding core's implementation. Other changes: * Fixed comments in arm interfaces. * Updated comments in thread.cpp * Removed confusing, useless, functions like MakeReady() and ChangeStatus() from thread.cpp. * Removed stack_size from Thread. In the CTR kernel, the thread's stack would be allocated before thread creation. | |||||
2015-01-09 | Move ThreadContext to core/core.h and deal with the fallout | Yuri Kunde Schlesner | 1 | -3/+5 | |
2015-01-07 | CoreTiming: Ported the CoreTiming namespace from PPSSPP | Subv | 1 | -0/+2 | |
Implemented the required calls to make it work. CoreTiming: Added a new logging class Core_Timing. | |||||
2014-12-26 | ARM: Add a mechanism for faking CPU time elapsed during HLE. | bunnei | 1 | -0/+6 | |
- Also a few cleanups. | |||||
2014-12-21 | License change | purpasmart96 | 1 | -1/+1 | |
2014-11-19 | Remove trailing spaces in every file but the ones imported from SkyEye, AOSP or generated | Emmanuel Gil Peyrot | 1 | -3/+3 | |
2014-11-14 | ARM_Interface: Make destructor virtual | Lioncash | 1 | -1/+1 | |
Fixes some warnings on OSX. | |||||
2014-06-02 | arm: added option to prepare CPU core (while mid-instruction) for thread reschedule | bunnei | 1 | -0/+3 | |
2014-06-01 | Added 'this' reference to num_instructions field so it's properly updated,as before the method was affecting the local method parameter rather than the class field | Disruption | 1 | -1/+1 | |
2014-05-21 | ARM_Interpreter/ARM_Interface: Fixed member variable naming to be consistent with style guide | bunnei | 1 | -5/+5 | |
2014-05-21 | ARM_Interface: added SaveContext and LoadContext functions for HLE thread switching | bunnei | 1 | -1/+15 | |
2014-05-17 | updated how we call ARM core to make things much faster | bunnei | 1 | -5/+16 | |
2014-05-12 | added option to set CPSR register to arm_interface | bunnei | 1 | -0/+6 | |
2014-04-28 | removed DISALLOW_COPY_AND_ASSIGN in favor of NonCopyable class | bunnei | 1 | -2/+1 | |
2014-04-11 | missed this file with commit 95e5436f | bunnei | 1 | -1/+10 | |
2014-04-09 | fixed licensing and updated code style naming for arm_interface/arm_interpreter frontend module | bunnei | 1 | -9/+11 | |
2014-04-09 | fixed project includes to use new directory structure | bunnei | 1 | -2/+2 | |
2014-04-09 | got rid of 'src' folders in each sub-project | bunnei | 1 | -0/+0 | |
2014-04-09 | fixed some license headers that I missed | bunnei | 1 | -23/+3 | |
2014-04-05 | changed hw_lcd to use ARM core correct tick counter instead of [what was actually] just an instruction count. this seems to fix timing issues with the 3DS_Homebrew_Pong3Dv2 demo. | bunnei | 1 | -5/+38 | |
2014-04-05 | added a tick counter | bunnei | 1 | -4/+12 | |
2014-04-05 | - added an interface layer for ARM cores | bunnei | 1 | -13/+25 | |
- cleaned up core.cpp a bit | |||||
2013-09-26 | renamed from citrus to citra | ShizZy | 1 | -7/+7 | |
2013-09-14 | renamed project to 'citrus' | ShizZy | 1 | -8/+8 | |
2013-09-06 | added core and mem_map files to the project | ShizZy | 1 | -12/+12 | |
2013-08-30 | adding initial project layout | ShizZy | 1 | -0/+35 | |