| Commit message (Collapse) | Author | Age | Files | Lines |
| |
|
| |
|
|
|
|
| |
Changes: Primarily implementing more A64 instructions
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
a6d17e A64: Implement AND (vector)
963453 tests/A64: Randomize vectors
adcd34 tests/A64/unicorn: Print interrupt number when InterruptHook is hit
304c91 tests/A64: Allow RunTestInstance to start from an arbitrary offset
d333b5 A64: Implement ADD (vector, vector)
1cf87a A64: Implement REV, REV32, and REV16 (#126)
9fc157 IR: Simplify types. F32 -> U32, F64 -> U64, F128 -> U128
50c181 reg_alloc: GetBitWidth: Add UNREACHABLE
adccbf reg_alloc: Consider bitwidth of data and registers when emitting instructions
7b7f23 A64: Implement CSEL
2f8413 IR: Implement Conditional Select
ebb3e8 A64/tests: Split unicorn sanity checking from other tests
5740a0 tests/A64: Single random instruction: Test branch instructions as well
0892b4 A64/translate/branch: bug: Read-after-write error in BLR
e77bc2 A64: Implement SBFM, BFM, UBFM
0c37ca A64: Implement MOVN, MOVZ, MOVK
b6bb59 travis: Print current test information
e77207 fuzz_thumb: Off by one error
a04ca2 ir/location_descriptor: Add missing <functional> header for std::hash
1e0f5c travis: Run A64 tests
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
bc73004 a64_merge_interpret_blocks: Remove debug output
4e656ed tests/A64: Randomize PSTATE.<NZCV>
fd9530b A64: Optimization: Merge interpret blocks
3c9eb04 testenv: Use format constants
324f3fc tests/A64: Unicorn interface fixes
98ecbe7 tests/A64: Fuzz against unicorn
b1d38e7 tests/A64: Move TestEnvironment to own header
5218ad9 A64/data_processing_pcrel: bug: ADR{,P} instructions sign extend their immediate
b1a8c39 A64/data_processing_addsub: bug: {ADD,SUB}S (extended register) instructions write to ZR when d = 31
64827fb a64_emit_x64: bug: A64CallSupervisor trampled callee-save registers
1bfa04d emit_x64: bug: OP m/r64, imm32 form instructions sign-extend their immediate on x64
edadeea A64 inferface: Use two argument static_assert
9ab1304 A64: Add ExceptionRaised IR instruction
6843eed Update readme
7438d07 A64/translate: Add TranslateSingleInstruction function
|
| |
|
| |
|
| |
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
# Conflicts:
# src/core/CMakeLists.txt
# src/core/arm/dynarmic/arm_dynarmic.cpp
# src/core/arm/dyncom/arm_dyncom.cpp
# src/core/hle/kernel/process.cpp
# src/core/hle/kernel/thread.cpp
# src/core/hle/kernel/thread.h
# src/core/hle/kernel/vm_manager.cpp
# src/core/loader/3dsx.cpp
# src/core/loader/elf.cpp
# src/core/loader/ncch.cpp
# src/core/memory.cpp
# src/core/memory.h
# src/core/memory_setup.h
|
|
|
|
| |
Also has the Dynarmic upgrade with the same change
|
|
|
|
|
| |
Updated to incorporate fix from MerryMage/dynarmic#106 which is required
for using fmt in Citra.
|
|
|
|
|
|
| |
This fixes a build issue on gcc 6 due to -Werror and a warning caused
by boost::optional, see:
https://github.com/MerryMage/dynarmic/issues/83
|
| |
|
| |
|
|
|
|
| |
Change of interface in dynarmic 36082087ded632079b16d24137fdd0c450ce82ea
|
|
|
|
| |
Required to be able to use Xbyak in Citra without header conflicts.
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
54d051977f7a6af9c7596ba6a4e6eb467bd1e0bc
dynarmic log:
54d0519 emit_x64: Use movdqa instead of movaps in EmitPackedSubU8
52e1445 Implement USUB8:33 2016 +0000
5c1aab1 Implement CLZ
1a1646d Implement UADD8
7cad694 IR: Implement new pseudo-operation GetGEFromOp
370f654 fuzz_arm: Add tests for parallel add/subtract (modulo)
25f21b5 emit_x64: Inline nzcv computation into EmitFPCompare32 and EmitFPCompare64
52fdec5 CMakeLists: Add support for LLVM on Windows
cede5e4 emit_x64: Use xorps/xorpd when argument to TransferToFP32/TransferToFP64 is an immediate zero
e166965 Implement VCMP2:33 2016 +0000
f2fe376 Support 64-bit immediates
ff00b8c Document register allocator and return stack buffer optimization
95f34c6 reg_alloc: Remove unnecessary breaks after returns (#54)
dc9707e externals: Update xbyak to 5.32
de1f831 microinstruction: Make use_count private (#53)
3621a92 reg_alloc: Register allocator related constraints belong with the rest of the register allocator
|
|
|
|
|
|
|
| |
Caused by not saving/restoring the x64 r15 register on entry/exit from
JITted code.
Closes #2224.
|
| |
|
|
|