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-rw-r--r--src/common/bit_util.h7
-rw-r--r--src/common/logging/backend.cpp2
-rw-r--r--src/common/x64/cpu_detect.cpp104
-rw-r--r--src/common/x64/cpu_detect.h64
-rw-r--r--src/core/core.cpp4
-rw-r--r--src/core/frontend/emu_window.h11
-rw-r--r--src/core/hle/kernel/k_page_table.cpp159
-rw-r--r--src/core/hle/kernel/k_page_table.h12
-rw-r--r--src/core/hle/service/ldr/ldr.cpp78
-rw-r--r--src/shader_recompiler/frontend/maxwell/translate/impl/logic_operation_three_input.cpp580
-rw-r--r--src/shader_recompiler/frontend/maxwell/translate/impl/logic_operation_three_input_lut3.py92
-rw-r--r--src/video_core/engines/maxwell_dma.cpp20
-rw-r--r--src/video_core/engines/maxwell_dma.h2
-rw-r--r--src/video_core/renderer_opengl/gl_graphics_pipeline.cpp46
-rw-r--r--src/video_core/renderer_opengl/gl_graphics_pipeline.h7
-rw-r--r--src/video_core/video_core.cpp1
16 files changed, 960 insertions, 229 deletions
diff --git a/src/common/bit_util.h b/src/common/bit_util.h
index f50d3308a..f37538e06 100644
--- a/src/common/bit_util.h
+++ b/src/common/bit_util.h
@@ -57,4 +57,11 @@ requires std::is_integral_v<T>
return static_cast<T>(1ULL << ((8U * sizeof(T)) - std::countl_zero(value - 1U)));
}
+template <size_t bit_index, typename T>
+requires std::is_integral_v<T>
+[[nodiscard]] constexpr bool Bit(const T value) {
+ static_assert(bit_index < BitSize<T>(), "bit_index must be smaller than size of T");
+ return ((value >> bit_index) & T(1)) == T(1);
+}
+
} // namespace Common
diff --git a/src/common/logging/backend.cpp b/src/common/logging/backend.cpp
index f1c9ed6c4..4a2462ec4 100644
--- a/src/common/logging/backend.cpp
+++ b/src/common/logging/backend.cpp
@@ -276,9 +276,9 @@ private:
ColorConsoleBackend color_console_backend{};
FileBackend file_backend;
- std::jthread backend_thread;
MPSCQueue<Entry, true> message_queue{};
std::chrono::steady_clock::time_point time_origin{std::chrono::steady_clock::now()};
+ std::jthread backend_thread;
};
} // namespace
diff --git a/src/common/x64/cpu_detect.cpp b/src/common/x64/cpu_detect.cpp
index fbeacc7e2..99d87f586 100644
--- a/src/common/x64/cpu_detect.cpp
+++ b/src/common/x64/cpu_detect.cpp
@@ -1,8 +1,12 @@
-// Copyright 2013 Dolphin Emulator Project / 2015 Citra Emulator Project
-// Licensed under GPLv2 or any later version
-// Refer to the license.txt file included.
+// Copyright 2013 Dolphin Emulator Project / 2015 Citra Emulator Project / 2022 Yuzu Emulator
+// Project Licensed under GPLv2 or any later version Refer to the license.txt file included.
+#include <array>
#include <cstring>
+#include <iterator>
+#include <span>
+#include <string_view>
+#include "common/bit_util.h"
#include "common/common_types.h"
#include "common/x64/cpu_detect.h"
@@ -17,7 +21,7 @@
// clang-format on
#endif
-static inline void __cpuidex(int info[4], int function_id, int subfunction_id) {
+static inline void __cpuidex(int info[4], u32 function_id, u32 subfunction_id) {
#if defined(__DragonFly__) || defined(__FreeBSD__)
// Despite the name, this is just do_cpuid() with ECX as second input.
cpuid_count((u_int)function_id, (u_int)subfunction_id, (u_int*)info);
@@ -30,7 +34,7 @@ static inline void __cpuidex(int info[4], int function_id, int subfunction_id) {
#endif
}
-static inline void __cpuid(int info[4], int function_id) {
+static inline void __cpuid(int info[4], u32 function_id) {
return __cpuidex(info, function_id, 0);
}
@@ -45,6 +49,17 @@ static inline u64 _xgetbv(u32 index) {
namespace Common {
+CPUCaps::Manufacturer CPUCaps::ParseManufacturer(std::string_view brand_string) {
+ if (brand_string == "GenuineIntel") {
+ return Manufacturer::Intel;
+ } else if (brand_string == "AuthenticAMD") {
+ return Manufacturer::AMD;
+ } else if (brand_string == "HygonGenuine") {
+ return Manufacturer::Hygon;
+ }
+ return Manufacturer::Unknown;
+}
+
// Detects the various CPU features
static CPUCaps Detect() {
CPUCaps caps = {};
@@ -53,57 +68,44 @@ static CPUCaps Detect() {
// yuzu at all anyway
int cpu_id[4];
- memset(caps.brand_string, 0, sizeof(caps.brand_string));
- // Detect CPU's CPUID capabilities and grab CPU string
+ // Detect CPU's CPUID capabilities and grab manufacturer string
__cpuid(cpu_id, 0x00000000);
- u32 max_std_fn = cpu_id[0]; // EAX
-
- std::memcpy(&caps.brand_string[0], &cpu_id[1], sizeof(int));
- std::memcpy(&caps.brand_string[4], &cpu_id[3], sizeof(int));
- std::memcpy(&caps.brand_string[8], &cpu_id[2], sizeof(int));
- if (cpu_id[1] == 0x756e6547 && cpu_id[2] == 0x6c65746e && cpu_id[3] == 0x49656e69)
- caps.manufacturer = Manufacturer::Intel;
- else if (cpu_id[1] == 0x68747541 && cpu_id[2] == 0x444d4163 && cpu_id[3] == 0x69746e65)
- caps.manufacturer = Manufacturer::AMD;
- else if (cpu_id[1] == 0x6f677948 && cpu_id[2] == 0x656e6975 && cpu_id[3] == 0x6e65476e)
- caps.manufacturer = Manufacturer::Hygon;
- else
- caps.manufacturer = Manufacturer::Unknown;
+ const u32 max_std_fn = cpu_id[0]; // EAX
- __cpuid(cpu_id, 0x80000000);
+ std::memset(caps.brand_string, 0, std::size(caps.brand_string));
+ std::memcpy(&caps.brand_string[0], &cpu_id[1], sizeof(u32));
+ std::memcpy(&caps.brand_string[4], &cpu_id[3], sizeof(u32));
+ std::memcpy(&caps.brand_string[8], &cpu_id[2], sizeof(u32));
- u32 max_ex_fn = cpu_id[0];
+ caps.manufacturer = CPUCaps::ParseManufacturer(caps.brand_string);
- // Set reasonable default brand string even if brand string not available
- strcpy(caps.cpu_string, caps.brand_string);
+ // Set reasonable default cpu string even if brand string not available
+ std::strncpy(caps.cpu_string, caps.brand_string, std::size(caps.brand_string));
+
+ __cpuid(cpu_id, 0x80000000);
+
+ const u32 max_ex_fn = cpu_id[0];
// Detect family and other miscellaneous features
if (max_std_fn >= 1) {
__cpuid(cpu_id, 0x00000001);
- if ((cpu_id[3] >> 25) & 1)
- caps.sse = true;
- if ((cpu_id[3] >> 26) & 1)
- caps.sse2 = true;
- if ((cpu_id[2]) & 1)
- caps.sse3 = true;
- if ((cpu_id[2] >> 9) & 1)
- caps.ssse3 = true;
- if ((cpu_id[2] >> 19) & 1)
- caps.sse4_1 = true;
- if ((cpu_id[2] >> 20) & 1)
- caps.sse4_2 = true;
- if ((cpu_id[2] >> 25) & 1)
- caps.aes = true;
+ caps.sse = Common::Bit<25>(cpu_id[3]);
+ caps.sse2 = Common::Bit<26>(cpu_id[3]);
+ caps.sse3 = Common::Bit<0>(cpu_id[2]);
+ caps.ssse3 = Common::Bit<9>(cpu_id[2]);
+ caps.sse4_1 = Common::Bit<19>(cpu_id[2]);
+ caps.sse4_2 = Common::Bit<20>(cpu_id[2]);
+ caps.aes = Common::Bit<25>(cpu_id[2]);
// AVX support requires 3 separate checks:
// - Is the AVX bit set in CPUID?
// - Is the XSAVE bit set in CPUID?
// - XGETBV result has the XCR bit set.
- if (((cpu_id[2] >> 28) & 1) && ((cpu_id[2] >> 27) & 1)) {
+ if (Common::Bit<28>(cpu_id[2]) && Common::Bit<27>(cpu_id[2])) {
if ((_xgetbv(_XCR_XFEATURE_ENABLED_MASK) & 0x6) == 0x6) {
caps.avx = true;
- if ((cpu_id[2] >> 12) & 1)
+ if (Common::Bit<12>(cpu_id[2]))
caps.fma = true;
}
}
@@ -111,15 +113,13 @@ static CPUCaps Detect() {
if (max_std_fn >= 7) {
__cpuidex(cpu_id, 0x00000007, 0x00000000);
// Can't enable AVX2 unless the XSAVE/XGETBV checks above passed
- if ((cpu_id[1] >> 5) & 1)
- caps.avx2 = caps.avx;
- if ((cpu_id[1] >> 3) & 1)
- caps.bmi1 = true;
- if ((cpu_id[1] >> 8) & 1)
- caps.bmi2 = true;
+ caps.avx2 = caps.avx && Common::Bit<5>(cpu_id[1]);
+ caps.bmi1 = Common::Bit<3>(cpu_id[1]);
+ caps.bmi2 = Common::Bit<8>(cpu_id[1]);
// Checks for AVX512F, AVX512CD, AVX512VL, AVX512DQ, AVX512BW (Intel Skylake-X/SP)
- if ((cpu_id[1] >> 16) & 1 && (cpu_id[1] >> 28) & 1 && (cpu_id[1] >> 31) & 1 &&
- (cpu_id[1] >> 17) & 1 && (cpu_id[1] >> 30) & 1) {
+ if (Common::Bit<16>(cpu_id[1]) && Common::Bit<28>(cpu_id[1]) &&
+ Common::Bit<31>(cpu_id[1]) && Common::Bit<17>(cpu_id[1]) &&
+ Common::Bit<30>(cpu_id[1])) {
caps.avx512 = caps.avx2;
}
}
@@ -138,15 +138,13 @@ static CPUCaps Detect() {
if (max_ex_fn >= 0x80000001) {
// Check for more features
__cpuid(cpu_id, 0x80000001);
- if ((cpu_id[2] >> 16) & 1)
- caps.fma4 = true;
+ caps.lzcnt = Common::Bit<5>(cpu_id[2]);
+ caps.fma4 = Common::Bit<16>(cpu_id[2]);
}
if (max_ex_fn >= 0x80000007) {
__cpuid(cpu_id, 0x80000007);
- if (cpu_id[3] & (1 << 8)) {
- caps.invariant_tsc = true;
- }
+ caps.invariant_tsc = Common::Bit<8>(cpu_id[3]);
}
if (max_std_fn >= 0x16) {
diff --git a/src/common/x64/cpu_detect.h b/src/common/x64/cpu_detect.h
index e3b63302e..3e6d808f3 100644
--- a/src/common/x64/cpu_detect.h
+++ b/src/common/x64/cpu_detect.h
@@ -1,42 +1,50 @@
-// Copyright 2013 Dolphin Emulator Project / 2015 Citra Emulator Project
-// Licensed under GPLv2 or any later version
-// Refer to the license.txt file included.
+// Copyright 2013 Dolphin Emulator Project / 2015 Citra Emulator Project / 2022 Yuzu Emulator
+// Project Project Licensed under GPLv2 or any later version Refer to the license.txt file included.
#pragma once
-namespace Common {
+#include <string_view>
+#include "common/common_types.h"
-enum class Manufacturer : u32 {
- Intel = 0,
- AMD = 1,
- Hygon = 2,
- Unknown = 3,
-};
+namespace Common {
/// x86/x64 CPU capabilities that may be detected by this module
struct CPUCaps {
+
+ enum class Manufacturer : u8 {
+ Unknown = 0,
+ Intel = 1,
+ AMD = 2,
+ Hygon = 3,
+ };
+
+ static Manufacturer ParseManufacturer(std::string_view brand_string);
+
Manufacturer manufacturer;
- char cpu_string[0x21];
- char brand_string[0x41];
- bool sse;
- bool sse2;
- bool sse3;
- bool ssse3;
- bool sse4_1;
- bool sse4_2;
- bool lzcnt;
- bool avx;
- bool avx2;
- bool avx512;
- bool bmi1;
- bool bmi2;
- bool fma;
- bool fma4;
- bool aes;
- bool invariant_tsc;
+ char brand_string[13];
+
+ char cpu_string[48];
+
u32 base_frequency;
u32 max_frequency;
u32 bus_frequency;
+
+ bool sse : 1;
+ bool sse2 : 1;
+ bool sse3 : 1;
+ bool ssse3 : 1;
+ bool sse4_1 : 1;
+ bool sse4_2 : 1;
+ bool lzcnt : 1;
+ bool avx : 1;
+ bool avx2 : 1;
+ bool avx512 : 1;
+ bool bmi1 : 1;
+ bool bmi2 : 1;
+ bool fma : 1;
+ bool fma4 : 1;
+ bool aes : 1;
+ bool invariant_tsc : 1;
};
/**
diff --git a/src/core/core.cpp b/src/core/core.cpp
index b0cfee3ee..c60a784c3 100644
--- a/src/core/core.cpp
+++ b/src/core/core.cpp
@@ -326,7 +326,9 @@ struct System::Impl {
is_powered_on = false;
exit_lock = false;
- gpu_core->NotifyShutdown();
+ if (gpu_core != nullptr) {
+ gpu_core->NotifyShutdown();
+ }
services.reset();
service_manager.reset();
diff --git a/src/core/frontend/emu_window.h b/src/core/frontend/emu_window.h
index e413a520a..b3bffecb2 100644
--- a/src/core/frontend/emu_window.h
+++ b/src/core/frontend/emu_window.h
@@ -42,11 +42,20 @@ public:
context.MakeCurrent();
}
~Scoped() {
- context.DoneCurrent();
+ if (active) {
+ context.DoneCurrent();
+ }
+ }
+
+ /// In the event that context was destroyed before the Scoped is destroyed, this provides a
+ /// mechanism to prevent calling a destroyed object's method during the deconstructor
+ void Cancel() {
+ active = false;
}
private:
GraphicsContext& context;
+ bool active{true};
};
/// Calls MakeCurrent on the context and calls DoneCurrent when the scope for the returned value
diff --git a/src/core/hle/kernel/k_page_table.cpp b/src/core/hle/kernel/k_page_table.cpp
index dfea0b6e2..0602de1f7 100644
--- a/src/core/hle/kernel/k_page_table.cpp
+++ b/src/core/hle/kernel/k_page_table.cpp
@@ -285,72 +285,141 @@ ResultCode KPageTable::MapProcessCode(VAddr addr, std::size_t num_pages, KMemory
return ResultSuccess;
}
-ResultCode KPageTable::MapCodeMemory(VAddr dst_addr, VAddr src_addr, std::size_t size) {
+ResultCode KPageTable::MapCodeMemory(VAddr dst_address, VAddr src_address, std::size_t size) {
+ // Validate the mapping request.
+ R_UNLESS(this->CanContain(dst_address, size, KMemoryState::AliasCode),
+ ResultInvalidMemoryRegion);
+
+ // Lock the table.
KScopedLightLock lk(general_lock);
- const std::size_t num_pages{size / PageSize};
+ // Verify that the source memory is normal heap.
+ KMemoryState src_state{};
+ KMemoryPermission src_perm{};
+ std::size_t num_src_allocator_blocks{};
+ R_TRY(this->CheckMemoryState(&src_state, &src_perm, nullptr, &num_src_allocator_blocks,
+ src_address, size, KMemoryState::All, KMemoryState::Normal,
+ KMemoryPermission::All, KMemoryPermission::UserReadWrite,
+ KMemoryAttribute::All, KMemoryAttribute::None));
- KMemoryState state{};
- KMemoryPermission perm{};
- CASCADE_CODE(CheckMemoryState(&state, &perm, nullptr, nullptr, src_addr, size,
- KMemoryState::All, KMemoryState::Normal, KMemoryPermission::All,
- KMemoryPermission::UserReadWrite, KMemoryAttribute::Mask,
- KMemoryAttribute::None, KMemoryAttribute::IpcAndDeviceMapped));
+ // Verify that the destination memory is unmapped.
+ std::size_t num_dst_allocator_blocks{};
+ R_TRY(this->CheckMemoryState(&num_dst_allocator_blocks, dst_address, size, KMemoryState::All,
+ KMemoryState::Free, KMemoryPermission::None,
+ KMemoryPermission::None, KMemoryAttribute::None,
+ KMemoryAttribute::None));
- if (IsRegionMapped(dst_addr, size)) {
- return ResultInvalidCurrentMemory;
- }
+ // Map the code memory.
+ {
+ // Determine the number of pages being operated on.
+ const std::size_t num_pages = size / PageSize;
- KPageLinkedList page_linked_list;
- AddRegionToPages(src_addr, num_pages, page_linked_list);
+ // Create page groups for the memory being mapped.
+ KPageLinkedList pg;
+ AddRegionToPages(src_address, num_pages, pg);
- {
- auto block_guard = detail::ScopeExit(
- [&] { Operate(src_addr, num_pages, perm, OperationType::ChangePermissions); });
+ // Reprotect the source as kernel-read/not mapped.
+ const auto new_perm = static_cast<KMemoryPermission>(KMemoryPermission::KernelRead |
+ KMemoryPermission::NotMapped);
+ R_TRY(Operate(src_address, num_pages, new_perm, OperationType::ChangePermissions));
- CASCADE_CODE(Operate(src_addr, num_pages, KMemoryPermission::None,
- OperationType::ChangePermissions));
- CASCADE_CODE(MapPages(dst_addr, page_linked_list, KMemoryPermission::None));
+ // Ensure that we unprotect the source pages on failure.
+ auto unprot_guard = SCOPE_GUARD({
+ ASSERT(this->Operate(src_address, num_pages, src_perm, OperationType::ChangePermissions)
+ .IsSuccess());
+ });
- block_guard.Cancel();
- }
+ // Map the alias pages.
+ R_TRY(MapPages(dst_address, pg, new_perm));
- block_manager->Update(src_addr, num_pages, state, KMemoryPermission::None,
- KMemoryAttribute::Locked);
- block_manager->Update(dst_addr, num_pages, KMemoryState::AliasCode);
+ // We successfully mapped the alias pages, so we don't need to unprotect the src pages on
+ // failure.
+ unprot_guard.Cancel();
+
+ // Apply the memory block updates.
+ block_manager->Update(src_address, num_pages, src_state, new_perm,
+ KMemoryAttribute::Locked);
+ block_manager->Update(dst_address, num_pages, KMemoryState::AliasCode, new_perm,
+ KMemoryAttribute::None);
+ }
return ResultSuccess;
}
-ResultCode KPageTable::UnmapCodeMemory(VAddr dst_addr, VAddr src_addr, std::size_t size) {
+ResultCode KPageTable::UnmapCodeMemory(VAddr dst_address, VAddr src_address, std::size_t size) {
+ // Validate the mapping request.
+ R_UNLESS(this->CanContain(dst_address, size, KMemoryState::AliasCode),
+ ResultInvalidMemoryRegion);
+
+ // Lock the table.
KScopedLightLock lk(general_lock);
- if (!size) {
- return ResultSuccess;
+ // Verify that the source memory is locked normal heap.
+ std::size_t num_src_allocator_blocks{};
+ R_TRY(this->CheckMemoryState(std::addressof(num_src_allocator_blocks), src_address, size,
+ KMemoryState::All, KMemoryState::Normal, KMemoryPermission::None,
+ KMemoryPermission::None, KMemoryAttribute::All,
+ KMemoryAttribute::Locked));
+
+ // Verify that the destination memory is aliasable code.
+ std::size_t num_dst_allocator_blocks{};
+ R_TRY(this->CheckMemoryStateContiguous(
+ std::addressof(num_dst_allocator_blocks), dst_address, size, KMemoryState::FlagCanCodeAlias,
+ KMemoryState::FlagCanCodeAlias, KMemoryPermission::None, KMemoryPermission::None,
+ KMemoryAttribute::All, KMemoryAttribute::None));
+
+ // Determine whether any pages being unmapped are code.
+ bool any_code_pages = false;
+ {
+ KMemoryBlockManager::const_iterator it = block_manager->FindIterator(dst_address);
+ while (true) {
+ // Get the memory info.
+ const KMemoryInfo info = it->GetMemoryInfo();
+
+ // Check if the memory has code flag.
+ if ((info.GetState() & KMemoryState::FlagCode) != KMemoryState::None) {
+ any_code_pages = true;
+ break;
+ }
+
+ // Check if we're done.
+ if (dst_address + size - 1 <= info.GetLastAddress()) {
+ break;
+ }
+
+ // Advance.
+ ++it;
+ }
}
- const std::size_t num_pages{size / PageSize};
+ // Ensure that we maintain the instruction cache.
+ bool reprotected_pages = false;
+ SCOPE_EXIT({
+ if (reprotected_pages && any_code_pages) {
+ system.InvalidateCpuInstructionCacheRange(dst_address, size);
+ }
+ });
- CASCADE_CODE(CheckMemoryState(nullptr, nullptr, nullptr, nullptr, src_addr, size,
- KMemoryState::All, KMemoryState::Normal, KMemoryPermission::None,
- KMemoryPermission::None, KMemoryAttribute::Mask,
- KMemoryAttribute::Locked, KMemoryAttribute::IpcAndDeviceMapped));
+ // Unmap.
+ {
+ // Determine the number of pages being operated on.
+ const std::size_t num_pages = size / PageSize;
- KMemoryState state{};
- CASCADE_CODE(CheckMemoryState(
- &state, nullptr, nullptr, nullptr, dst_addr, PageSize, KMemoryState::FlagCanCodeAlias,
- KMemoryState::FlagCanCodeAlias, KMemoryPermission::None, KMemoryPermission::None,
- KMemoryAttribute::Mask, KMemoryAttribute::None, KMemoryAttribute::IpcAndDeviceMapped));
- CASCADE_CODE(CheckMemoryState(dst_addr, size, KMemoryState::All, state, KMemoryPermission::None,
- KMemoryPermission::None, KMemoryAttribute::Mask,
- KMemoryAttribute::None));
- CASCADE_CODE(Operate(dst_addr, num_pages, KMemoryPermission::None, OperationType::Unmap));
+ // Unmap the aliased copy of the pages.
+ R_TRY(Operate(dst_address, num_pages, KMemoryPermission::None, OperationType::Unmap));
- block_manager->Update(dst_addr, num_pages, KMemoryState::Free);
- block_manager->Update(src_addr, num_pages, KMemoryState::Normal,
- KMemoryPermission::UserReadWrite);
+ // Try to set the permissions for the source pages back to what they should be.
+ R_TRY(Operate(src_address, num_pages, KMemoryPermission::UserReadWrite,
+ OperationType::ChangePermissions));
- system.InvalidateCpuInstructionCacheRange(dst_addr, size);
+ // Apply the memory block updates.
+ block_manager->Update(dst_address, num_pages, KMemoryState::None);
+ block_manager->Update(src_address, num_pages, KMemoryState::Normal,
+ KMemoryPermission::UserReadWrite);
+
+ // Note that we reprotected pages.
+ reprotected_pages = true;
+ }
return ResultSuccess;
}
diff --git a/src/core/hle/kernel/k_page_table.h b/src/core/hle/kernel/k_page_table.h
index 194177332..e99abe36a 100644
--- a/src/core/hle/kernel/k_page_table.h
+++ b/src/core/hle/kernel/k_page_table.h
@@ -36,8 +36,8 @@ public:
KMemoryManager::Pool pool);
ResultCode MapProcessCode(VAddr addr, std::size_t pages_count, KMemoryState state,
KMemoryPermission perm);
- ResultCode MapCodeMemory(VAddr dst_addr, VAddr src_addr, std::size_t size);
- ResultCode UnmapCodeMemory(VAddr dst_addr, VAddr src_addr, std::size_t size);
+ ResultCode MapCodeMemory(VAddr dst_address, VAddr src_address, std::size_t size);
+ ResultCode UnmapCodeMemory(VAddr dst_address, VAddr src_address, std::size_t size);
ResultCode UnmapProcessMemory(VAddr dst_addr, std::size_t size, KPageTable& src_page_table,
VAddr src_addr);
ResultCode MapPhysicalMemory(VAddr addr, std::size_t size);
@@ -253,7 +253,9 @@ public:
constexpr bool IsInsideASLRRegion(VAddr address, std::size_t size) const {
return !IsOutsideASLRRegion(address, size);
}
-
+ constexpr std::size_t GetNumGuardPages() const {
+ return IsKernel() ? 1 : 4;
+ }
PAddr GetPhysicalAddr(VAddr addr) const {
const auto backing_addr = page_table_impl.backing_addr[addr >> PageBits];
ASSERT(backing_addr);
@@ -275,10 +277,6 @@ private:
return is_aslr_enabled;
}
- constexpr std::size_t GetNumGuardPages() const {
- return IsKernel() ? 1 : 4;
- }
-
constexpr bool ContainsPages(VAddr addr, std::size_t num_pages) const {
return (address_space_start <= addr) &&
(num_pages <= (address_space_end - address_space_start) / PageSize) &&
diff --git a/src/core/hle/service/ldr/ldr.cpp b/src/core/hle/service/ldr/ldr.cpp
index 9fc7bb1b1..099276420 100644
--- a/src/core/hle/service/ldr/ldr.cpp
+++ b/src/core/hle/service/ldr/ldr.cpp
@@ -288,7 +288,7 @@ public:
}
bool ValidateRegionForMap(Kernel::KPageTable& page_table, VAddr start, std::size_t size) const {
- constexpr std::size_t padding_size{4 * Kernel::PageSize};
+ const std::size_t padding_size{page_table.GetNumGuardPages() * Kernel::PageSize};
const auto start_info{page_table.QueryInfo(start - 1)};
if (start_info.state != Kernel::KMemoryState::Free) {
@@ -308,31 +308,69 @@ public:
return (start + size + padding_size) <= (end_info.GetAddress() + end_info.GetSize());
}
- VAddr GetRandomMapRegion(const Kernel::KPageTable& page_table, std::size_t size) const {
- VAddr addr{};
- const std::size_t end_pages{(page_table.GetAliasCodeRegionSize() - size) >>
- Kernel::PageBits};
- do {
- addr = page_table.GetAliasCodeRegionStart() +
- (Kernel::KSystemControl::GenerateRandomRange(0, end_pages) << Kernel::PageBits);
- } while (!page_table.IsInsideAddressSpace(addr, size) ||
- page_table.IsInsideHeapRegion(addr, size) ||
- page_table.IsInsideAliasRegion(addr, size));
- return addr;
+ ResultCode GetAvailableMapRegion(Kernel::KPageTable& page_table, u64 size, VAddr& out_addr) {
+ size = Common::AlignUp(size, Kernel::PageSize);
+ size += page_table.GetNumGuardPages() * Kernel::PageSize * 4;
+
+ const auto is_region_available = [&](VAddr addr) {
+ const auto end_addr = addr + size;
+ while (addr < end_addr) {
+ if (system.Memory().IsValidVirtualAddress(addr)) {
+ return false;
+ }
+
+ if (!page_table.IsInsideAddressSpace(out_addr, size)) {
+ return false;
+ }
+
+ if (page_table.IsInsideHeapRegion(out_addr, size)) {
+ return false;
+ }
+
+ if (page_table.IsInsideAliasRegion(out_addr, size)) {
+ return false;
+ }
+
+ addr += Kernel::PageSize;
+ }
+ return true;
+ };
+
+ bool succeeded = false;
+ const auto map_region_end =
+ page_table.GetAliasCodeRegionStart() + page_table.GetAliasCodeRegionSize();
+ while (current_map_addr < map_region_end) {
+ if (is_region_available(current_map_addr)) {
+ succeeded = true;
+ break;
+ }
+ current_map_addr += 0x100000;
+ }
+
+ if (!succeeded) {
+ UNREACHABLE_MSG("Out of address space!");
+ return Kernel::ResultOutOfMemory;
+ }
+
+ out_addr = current_map_addr;
+ current_map_addr += size;
+
+ return ResultSuccess;
}
- ResultVal<VAddr> MapProcessCodeMemory(Kernel::KProcess* process, VAddr baseAddress,
- u64 size) const {
+ ResultVal<VAddr> MapProcessCodeMemory(Kernel::KProcess* process, VAddr base_addr, u64 size) {
+ auto& page_table{process->PageTable()};
+ VAddr addr{};
+
for (std::size_t retry = 0; retry < MAXIMUM_MAP_RETRIES; retry++) {
- auto& page_table{process->PageTable()};
- const VAddr addr{GetRandomMapRegion(page_table, size)};
- const ResultCode result{page_table.MapCodeMemory(addr, baseAddress, size)};
+ R_TRY(GetAvailableMapRegion(page_table, size, addr));
+ const ResultCode result{page_table.MapCodeMemory(addr, base_addr, size)};
if (result == Kernel::ResultInvalidCurrentMemory) {
continue;
}
- CASCADE_CODE(result);
+ R_TRY(result);
if (ValidateRegionForMap(page_table, addr, size)) {
return addr;
@@ -343,7 +381,7 @@ public:
}
ResultVal<VAddr> MapNro(Kernel::KProcess* process, VAddr nro_addr, std::size_t nro_size,
- VAddr bss_addr, std::size_t bss_size, std::size_t size) const {
+ VAddr bss_addr, std::size_t bss_size, std::size_t size) {
for (std::size_t retry = 0; retry < MAXIMUM_MAP_RETRIES; retry++) {
auto& page_table{process->PageTable()};
VAddr addr{};
@@ -597,6 +635,7 @@ public:
LOG_WARNING(Service_LDR, "(STUBBED) called");
initialized = true;
+ current_map_addr = system.CurrentProcess()->PageTable().GetAliasCodeRegionStart();
IPC::ResponseBuilder rb{ctx, 2};
rb.Push(ResultSuccess);
@@ -607,6 +646,7 @@ private:
std::map<VAddr, NROInfo> nro;
std::map<VAddr, std::vector<SHA256Hash>> nrr;
+ VAddr current_map_addr{};
bool IsValidNROHash(const SHA256Hash& hash) const {
return std::any_of(nrr.begin(), nrr.end(), [&hash](const auto& p) {
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/logic_operation_three_input.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/logic_operation_three_input.cpp
index e0fe47912..f3c7ceb57 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/logic_operation_three_input.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/logic_operation_three_input.cpp
@@ -13,59 +13,535 @@ namespace {
// Emulate GPU's LOP3.LUT (three-input logic op with 8-bit truth table)
IR::U32 ApplyLUT(IR::IREmitter& ir, const IR::U32& a, const IR::U32& b, const IR::U32& c,
u64 ttbl) {
- IR::U32 r{ir.Imm32(0)};
- const IR::U32 not_a{ir.BitwiseNot(a)};
- const IR::U32 not_b{ir.BitwiseNot(b)};
- const IR::U32 not_c{ir.BitwiseNot(c)};
- if (ttbl & 0x01) {
- // r |= ~a & ~b & ~c;
- const auto lhs{ir.BitwiseAnd(not_a, not_b)};
- const auto rhs{ir.BitwiseAnd(lhs, not_c)};
- r = ir.BitwiseOr(r, rhs);
+ switch (ttbl) {
+ // generated code, do not edit manually
+ case 0:
+ return ir.Imm32(0);
+ case 1:
+ return ir.BitwiseNot(ir.BitwiseOr(a, ir.BitwiseOr(b, c)));
+ case 2:
+ return ir.BitwiseAnd(c, ir.BitwiseNot(ir.BitwiseOr(a, b)));
+ case 3:
+ return ir.BitwiseNot(ir.BitwiseOr(a, b));
+ case 4:
+ return ir.BitwiseAnd(b, ir.BitwiseNot(ir.BitwiseOr(a, c)));
+ case 5:
+ return ir.BitwiseNot(ir.BitwiseOr(a, c));
+ case 6:
+ return ir.BitwiseAnd(ir.BitwiseNot(a), ir.BitwiseXor(b, c));
+ case 7:
+ return ir.BitwiseNot(ir.BitwiseOr(a, ir.BitwiseAnd(b, c)));
+ case 8:
+ return ir.BitwiseAnd(ir.BitwiseAnd(b, c), ir.BitwiseNot(a));
+ case 9:
+ return ir.BitwiseNot(ir.BitwiseOr(a, ir.BitwiseXor(b, c)));
+ case 10:
+ return ir.BitwiseAnd(c, ir.BitwiseNot(a));
+ case 11:
+ return ir.BitwiseAnd(ir.BitwiseNot(a), ir.BitwiseOr(c, ir.BitwiseNot(b)));
+ case 12:
+ return ir.BitwiseAnd(b, ir.BitwiseNot(a));
+ case 13:
+ return ir.BitwiseAnd(ir.BitwiseNot(a), ir.BitwiseOr(b, ir.BitwiseNot(c)));
+ case 14:
+ return ir.BitwiseAnd(ir.BitwiseNot(a), ir.BitwiseOr(b, c));
+ case 15:
+ return ir.BitwiseNot(a);
+ case 16:
+ return ir.BitwiseAnd(a, ir.BitwiseNot(ir.BitwiseOr(b, c)));
+ case 17:
+ return ir.BitwiseNot(ir.BitwiseOr(b, c));
+ case 18:
+ return ir.BitwiseAnd(ir.BitwiseNot(b), ir.BitwiseXor(a, c));
+ case 19:
+ return ir.BitwiseNot(ir.BitwiseOr(b, ir.BitwiseAnd(a, c)));
+ case 20:
+ return ir.BitwiseAnd(ir.BitwiseNot(c), ir.BitwiseXor(a, b));
+ case 21:
+ return ir.BitwiseNot(ir.BitwiseOr(c, ir.BitwiseAnd(a, b)));
+ case 22:
+ return ir.BitwiseXor(ir.BitwiseOr(a, b), ir.BitwiseOr(c, ir.BitwiseAnd(a, b)));
+ case 23:
+ return ir.BitwiseXor(ir.BitwiseAnd(ir.BitwiseXor(a, b), ir.BitwiseXor(a, c)),
+ ir.BitwiseNot(a));
+ case 24:
+ return ir.BitwiseAnd(ir.BitwiseXor(a, b), ir.BitwiseXor(a, c));
+ case 25:
+ return ir.BitwiseNot(ir.BitwiseOr(ir.BitwiseAnd(a, b), ir.BitwiseXor(b, c)));
+ case 26:
+ return ir.BitwiseAnd(ir.BitwiseOr(c, ir.BitwiseNot(b)), ir.BitwiseXor(a, c));
+ case 27:
+ return ir.BitwiseXor(ir.BitwiseOr(a, ir.BitwiseNot(c)), ir.BitwiseOr(b, c));
+ case 28:
+ return ir.BitwiseAnd(ir.BitwiseOr(b, ir.BitwiseNot(c)), ir.BitwiseXor(a, b));
+ case 29:
+ return ir.BitwiseXor(ir.BitwiseOr(a, ir.BitwiseNot(b)), ir.BitwiseOr(b, c));
+ case 30:
+ return ir.BitwiseXor(a, ir.BitwiseOr(b, c));
+ case 31:
+ return ir.BitwiseNot(ir.BitwiseAnd(a, ir.BitwiseOr(b, c)));
+ case 32:
+ return ir.BitwiseAnd(ir.BitwiseAnd(a, c), ir.BitwiseNot(b));
+ case 33:
+ return ir.BitwiseNot(ir.BitwiseOr(b, ir.BitwiseXor(a, c)));
+ case 34:
+ return ir.BitwiseAnd(c, ir.BitwiseNot(b));
+ case 35:
+ return ir.BitwiseAnd(ir.BitwiseNot(b), ir.BitwiseOr(c, ir.BitwiseNot(a)));
+ case 36:
+ return ir.BitwiseAnd(ir.BitwiseXor(a, b), ir.BitwiseXor(b, c));
+ case 37:
+ return ir.BitwiseNot(ir.BitwiseOr(ir.BitwiseAnd(a, b), ir.BitwiseXor(a, c)));
+ case 38:
+ return ir.BitwiseAnd(ir.BitwiseOr(c, ir.BitwiseNot(a)), ir.BitwiseXor(b, c));
+ case 39:
+ return ir.BitwiseXor(ir.BitwiseOr(a, c), ir.BitwiseOr(b, ir.BitwiseNot(c)));
+ case 40:
+ return ir.BitwiseAnd(c, ir.BitwiseXor(a, b));
+ case 41:
+ return ir.BitwiseXor(ir.BitwiseOr(a, b),
+ ir.BitwiseOr(ir.BitwiseAnd(a, b), ir.BitwiseNot(c)));
+ case 42:
+ return ir.BitwiseAnd(c, ir.BitwiseNot(ir.BitwiseAnd(a, b)));
+ case 43:
+ return ir.BitwiseXor(ir.BitwiseOr(a, ir.BitwiseNot(c)),
+ ir.BitwiseOr(b, ir.BitwiseXor(a, c)));
+ case 44:
+ return ir.BitwiseAnd(ir.BitwiseOr(b, c), ir.BitwiseXor(a, b));
+ case 45:
+ return ir.BitwiseXor(a, ir.BitwiseOr(b, ir.BitwiseNot(c)));
+ case 46:
+ return ir.BitwiseXor(ir.BitwiseAnd(a, b), ir.BitwiseOr(b, c));
+ case 47:
+ return ir.BitwiseOr(ir.BitwiseAnd(c, ir.BitwiseNot(b)), ir.BitwiseNot(a));
+ case 48:
+ return ir.BitwiseAnd(a, ir.BitwiseNot(b));
+ case 49:
+ return ir.BitwiseAnd(ir.BitwiseNot(b), ir.BitwiseOr(a, ir.BitwiseNot(c)));
+ case 50:
+ return ir.BitwiseAnd(ir.BitwiseNot(b), ir.BitwiseOr(a, c));
+ case 51:
+ return ir.BitwiseNot(b);
+ case 52:
+ return ir.BitwiseAnd(ir.BitwiseOr(a, ir.BitwiseNot(c)), ir.BitwiseXor(a, b));
+ case 53:
+ return ir.BitwiseXor(ir.BitwiseOr(a, c), ir.BitwiseOr(b, ir.BitwiseNot(a)));
+ case 54:
+ return ir.BitwiseXor(b, ir.BitwiseOr(a, c));
+ case 55:
+ return ir.BitwiseNot(ir.BitwiseAnd(b, ir.BitwiseOr(a, c)));
+ case 56:
+ return ir.BitwiseAnd(ir.BitwiseOr(a, c), ir.BitwiseXor(a, b));
+ case 57:
+ return ir.BitwiseXor(b, ir.BitwiseOr(a, ir.BitwiseNot(c)));
+ case 58:
+ return ir.BitwiseXor(ir.BitwiseAnd(a, b), ir.BitwiseOr(a, c));
+ case 59:
+ return ir.BitwiseOr(ir.BitwiseAnd(c, ir.BitwiseNot(a)), ir.BitwiseNot(b));
+ case 60:
+ return ir.BitwiseXor(a, b);
+ case 61:
+ return ir.BitwiseOr(ir.BitwiseNot(ir.BitwiseOr(a, c)), ir.BitwiseXor(a, b));
+ case 62:
+ return ir.BitwiseOr(ir.BitwiseAnd(c, ir.BitwiseNot(a)), ir.BitwiseXor(a, b));
+ case 63:
+ return ir.BitwiseNot(ir.BitwiseAnd(a, b));
+ case 64:
+ return ir.BitwiseAnd(ir.BitwiseAnd(a, b), ir.BitwiseNot(c));
+ case 65:
+ return ir.BitwiseNot(ir.BitwiseOr(c, ir.BitwiseXor(a, b)));
+ case 66:
+ return ir.BitwiseAnd(ir.BitwiseXor(a, c), ir.BitwiseXor(b, c));
+ case 67:
+ return ir.BitwiseNot(ir.BitwiseOr(ir.BitwiseAnd(a, c), ir.BitwiseXor(a, b)));
+ case 68:
+ return ir.BitwiseAnd(b, ir.BitwiseNot(c));
+ case 69:
+ return ir.BitwiseAnd(ir.BitwiseNot(c), ir.BitwiseOr(b, ir.BitwiseNot(a)));
+ case 70:
+ return ir.BitwiseAnd(ir.BitwiseOr(b, ir.BitwiseNot(a)), ir.BitwiseXor(b, c));
+ case 71:
+ return ir.BitwiseXor(ir.BitwiseOr(a, b), ir.BitwiseOr(c, ir.BitwiseNot(b)));
+ case 72:
+ return ir.BitwiseAnd(b, ir.BitwiseXor(a, c));
+ case 73:
+ return ir.BitwiseXor(ir.BitwiseOr(a, c),
+ ir.BitwiseOr(ir.BitwiseAnd(a, c), ir.BitwiseNot(b)));
+ case 74:
+ return ir.BitwiseAnd(ir.BitwiseOr(b, c), ir.BitwiseXor(a, c));
+ case 75:
+ return ir.BitwiseXor(a, ir.BitwiseOr(c, ir.BitwiseNot(b)));
+ case 76:
+ return ir.BitwiseAnd(b, ir.BitwiseNot(ir.BitwiseAnd(a, c)));
+ case 77:
+ return ir.BitwiseXor(ir.BitwiseOr(a, ir.BitwiseNot(b)),
+ ir.BitwiseOr(c, ir.BitwiseXor(a, b)));
+ case 78:
+ return ir.BitwiseXor(ir.BitwiseAnd(a, c), ir.BitwiseOr(b, c));
+ case 79:
+ return ir.BitwiseOr(ir.BitwiseAnd(b, ir.BitwiseNot(c)), ir.BitwiseNot(a));
+ case 80:
+ return ir.BitwiseAnd(a, ir.BitwiseNot(c));
+ case 81:
+ return ir.BitwiseAnd(ir.BitwiseNot(c), ir.BitwiseOr(a, ir.BitwiseNot(b)));
+ case 82:
+ return ir.BitwiseAnd(ir.BitwiseOr(a, ir.BitwiseNot(b)), ir.BitwiseXor(a, c));
+ case 83:
+ return ir.BitwiseXor(ir.BitwiseOr(a, b), ir.BitwiseOr(c, ir.BitwiseNot(a)));
+ case 84:
+ return ir.BitwiseAnd(ir.BitwiseNot(c), ir.BitwiseOr(a, b));
+ case 85:
+ return ir.BitwiseNot(c);
+ case 86:
+ return ir.BitwiseXor(c, ir.BitwiseOr(a, b));
+ case 87:
+ return ir.BitwiseNot(ir.BitwiseAnd(c, ir.BitwiseOr(a, b)));
+ case 88:
+ return ir.BitwiseAnd(ir.BitwiseOr(a, b), ir.BitwiseXor(a, c));
+ case 89:
+ return ir.BitwiseXor(c, ir.BitwiseOr(a, ir.BitwiseNot(b)));
+ case 90:
+ return ir.BitwiseXor(a, c);
+ case 91:
+ return ir.BitwiseOr(ir.BitwiseNot(ir.BitwiseOr(a, b)), ir.BitwiseXor(a, c));
+ case 92:
+ return ir.BitwiseXor(ir.BitwiseAnd(a, c), ir.BitwiseOr(a, b));
+ case 93:
+ return ir.BitwiseOr(ir.BitwiseAnd(b, ir.BitwiseNot(a)), ir.BitwiseNot(c));
+ case 94:
+ return ir.BitwiseOr(ir.BitwiseAnd(b, ir.BitwiseNot(a)), ir.BitwiseXor(a, c));
+ case 95:
+ return ir.BitwiseNot(ir.BitwiseAnd(a, c));
+ case 96:
+ return ir.BitwiseAnd(a, ir.BitwiseXor(b, c));
+ case 97:
+ return ir.BitwiseXor(ir.BitwiseOr(b, c),
+ ir.BitwiseOr(ir.BitwiseAnd(b, c), ir.BitwiseNot(a)));
+ case 98:
+ return ir.BitwiseAnd(ir.BitwiseOr(a, c), ir.BitwiseXor(b, c));
+ case 99:
+ return ir.BitwiseXor(b, ir.BitwiseOr(c, ir.BitwiseNot(a)));
+ case 100:
+ return ir.BitwiseAnd(ir.BitwiseOr(a, b), ir.BitwiseXor(b, c));
+ case 101:
+ return ir.BitwiseXor(c, ir.BitwiseOr(b, ir.BitwiseNot(a)));
+ case 102:
+ return ir.BitwiseXor(b, c);
+ case 103:
+ return ir.BitwiseOr(ir.BitwiseNot(ir.BitwiseOr(a, b)), ir.BitwiseXor(b, c));
+ case 104:
+ return ir.BitwiseAnd(ir.BitwiseOr(a, b), ir.BitwiseXor(c, ir.BitwiseAnd(a, b)));
+ case 105:
+ return ir.BitwiseXor(ir.BitwiseNot(a), ir.BitwiseXor(b, c));
+ case 106:
+ return ir.BitwiseXor(c, ir.BitwiseAnd(a, b));
+ case 107:
+ return ir.BitwiseXor(ir.BitwiseAnd(c, ir.BitwiseOr(a, b)),
+ ir.BitwiseXor(a, ir.BitwiseNot(b)));
+ case 108:
+ return ir.BitwiseXor(b, ir.BitwiseAnd(a, c));
+ case 109:
+ return ir.BitwiseXor(ir.BitwiseAnd(b, ir.BitwiseOr(a, c)),
+ ir.BitwiseXor(a, ir.BitwiseNot(c)));
+ case 110:
+ return ir.BitwiseOr(ir.BitwiseAnd(b, ir.BitwiseNot(a)), ir.BitwiseXor(b, c));
+ case 111:
+ return ir.BitwiseOr(ir.BitwiseNot(a), ir.BitwiseXor(b, c));
+ case 112:
+ return ir.BitwiseAnd(a, ir.BitwiseNot(ir.BitwiseAnd(b, c)));
+ case 113:
+ return ir.BitwiseXor(ir.BitwiseOr(b, ir.BitwiseNot(a)),
+ ir.BitwiseOr(c, ir.BitwiseXor(a, b)));
+ case 114:
+ return ir.BitwiseXor(ir.BitwiseAnd(b, c), ir.BitwiseOr(a, c));
+ case 115:
+ return ir.BitwiseOr(ir.BitwiseAnd(a, ir.BitwiseNot(c)), ir.BitwiseNot(b));
+ case 116:
+ return ir.BitwiseXor(ir.BitwiseAnd(b, c), ir.BitwiseOr(a, b));
+ case 117:
+ return ir.BitwiseOr(ir.BitwiseAnd(a, ir.BitwiseNot(b)), ir.BitwiseNot(c));
+ case 118:
+ return ir.BitwiseOr(ir.BitwiseAnd(a, ir.BitwiseNot(b)), ir.BitwiseXor(b, c));
+ case 119:
+ return ir.BitwiseNot(ir.BitwiseAnd(b, c));
+ case 120:
+ return ir.BitwiseXor(a, ir.BitwiseAnd(b, c));
+ case 121:
+ return ir.BitwiseXor(ir.BitwiseAnd(a, ir.BitwiseOr(b, c)),
+ ir.BitwiseXor(b, ir.BitwiseNot(c)));
+ case 122:
+ return ir.BitwiseOr(ir.BitwiseAnd(a, ir.BitwiseNot(b)), ir.BitwiseXor(a, c));
+ case 123:
+ return ir.BitwiseOr(ir.BitwiseNot(b), ir.BitwiseXor(a, c));
+ case 124:
+ return ir.BitwiseOr(ir.BitwiseAnd(a, ir.BitwiseNot(c)), ir.BitwiseXor(a, b));
+ case 125:
+ return ir.BitwiseOr(ir.BitwiseNot(c), ir.BitwiseXor(a, b));
+ case 126:
+ return ir.BitwiseOr(ir.BitwiseXor(a, b), ir.BitwiseXor(a, c));
+ case 127:
+ return ir.BitwiseNot(ir.BitwiseAnd(a, ir.BitwiseAnd(b, c)));
+ case 128:
+ return ir.BitwiseAnd(a, ir.BitwiseAnd(b, c));
+ case 129:
+ return ir.BitwiseNot(ir.BitwiseOr(ir.BitwiseXor(a, b), ir.BitwiseXor(a, c)));
+ case 130:
+ return ir.BitwiseAnd(c, ir.BitwiseXor(a, ir.BitwiseNot(b)));
+ case 131:
+ return ir.BitwiseAnd(ir.BitwiseOr(c, ir.BitwiseNot(a)), ir.BitwiseXor(a, ir.BitwiseNot(b)));
+ case 132:
+ return ir.BitwiseAnd(b, ir.BitwiseXor(a, ir.BitwiseNot(c)));
+ case 133:
+ return ir.BitwiseAnd(ir.BitwiseOr(b, ir.BitwiseNot(a)), ir.BitwiseXor(a, ir.BitwiseNot(c)));
+ case 134:
+ return ir.BitwiseAnd(ir.BitwiseOr(b, c), ir.BitwiseXor(a, ir.BitwiseXor(b, c)));
+ case 135:
+ return ir.BitwiseXor(ir.BitwiseAnd(b, c), ir.BitwiseNot(a));
+ case 136:
+ return ir.BitwiseAnd(b, c);
+ case 137:
+ return ir.BitwiseAnd(ir.BitwiseOr(b, ir.BitwiseNot(a)), ir.BitwiseXor(b, ir.BitwiseNot(c)));
+ case 138:
+ return ir.BitwiseAnd(c, ir.BitwiseOr(b, ir.BitwiseNot(a)));
+ case 139:
+ return ir.BitwiseOr(ir.BitwiseAnd(b, c), ir.BitwiseNot(ir.BitwiseOr(a, b)));
+ case 140:
+ return ir.BitwiseAnd(b, ir.BitwiseOr(c, ir.BitwiseNot(a)));
+ case 141:
+ return ir.BitwiseOr(ir.BitwiseAnd(b, c), ir.BitwiseNot(ir.BitwiseOr(a, c)));
+ case 142:
+ return ir.BitwiseXor(a, ir.BitwiseOr(ir.BitwiseXor(a, b), ir.BitwiseXor(a, c)));
+ case 143:
+ return ir.BitwiseOr(ir.BitwiseAnd(b, c), ir.BitwiseNot(a));
+ case 144:
+ return ir.BitwiseAnd(a, ir.BitwiseXor(b, ir.BitwiseNot(c)));
+ case 145:
+ return ir.BitwiseAnd(ir.BitwiseOr(a, ir.BitwiseNot(b)), ir.BitwiseXor(b, ir.BitwiseNot(c)));
+ case 146:
+ return ir.BitwiseAnd(ir.BitwiseOr(a, c), ir.BitwiseXor(a, ir.BitwiseXor(b, c)));
+ case 147:
+ return ir.BitwiseXor(ir.BitwiseAnd(a, c), ir.BitwiseNot(b));
+ case 148:
+ return ir.BitwiseAnd(ir.BitwiseOr(a, b), ir.BitwiseXor(a, ir.BitwiseXor(b, c)));
+ case 149:
+ return ir.BitwiseXor(ir.BitwiseAnd(a, b), ir.BitwiseNot(c));
+ case 150:
+ return ir.BitwiseXor(a, ir.BitwiseXor(b, c));
+ case 151:
+ return ir.BitwiseOr(ir.BitwiseNot(ir.BitwiseOr(a, b)),
+ ir.BitwiseXor(a, ir.BitwiseXor(b, c)));
+ case 152:
+ return ir.BitwiseAnd(ir.BitwiseOr(a, b), ir.BitwiseXor(b, ir.BitwiseNot(c)));
+ case 153:
+ return ir.BitwiseXor(b, ir.BitwiseNot(c));
+ case 154:
+ return ir.BitwiseXor(c, ir.BitwiseAnd(a, ir.BitwiseNot(b)));
+ case 155:
+ return ir.BitwiseNot(ir.BitwiseAnd(ir.BitwiseOr(a, b), ir.BitwiseXor(b, c)));
+ case 156:
+ return ir.BitwiseXor(b, ir.BitwiseAnd(a, ir.BitwiseNot(c)));
+ case 157:
+ return ir.BitwiseNot(ir.BitwiseAnd(ir.BitwiseOr(a, c), ir.BitwiseXor(b, c)));
+ case 158:
+ return ir.BitwiseOr(ir.BitwiseAnd(b, c), ir.BitwiseXor(a, ir.BitwiseOr(b, c)));
+ case 159:
+ return ir.BitwiseNot(ir.BitwiseAnd(a, ir.BitwiseXor(b, c)));
+ case 160:
+ return ir.BitwiseAnd(a, c);
+ case 161:
+ return ir.BitwiseAnd(ir.BitwiseOr(a, ir.BitwiseNot(b)), ir.BitwiseXor(a, ir.BitwiseNot(c)));
+ case 162:
+ return ir.BitwiseAnd(c, ir.BitwiseOr(a, ir.BitwiseNot(b)));
+ case 163:
+ return ir.BitwiseOr(ir.BitwiseAnd(a, c), ir.BitwiseNot(ir.BitwiseOr(a, b)));
+ case 164:
+ return ir.BitwiseAnd(ir.BitwiseOr(a, b), ir.BitwiseXor(a, ir.BitwiseNot(c)));
+ case 165:
+ return ir.BitwiseXor(a, ir.BitwiseNot(c));
+ case 166:
+ return ir.BitwiseXor(c, ir.BitwiseAnd(b, ir.BitwiseNot(a)));
+ case 167:
+ return ir.BitwiseNot(ir.BitwiseAnd(ir.BitwiseOr(a, b), ir.BitwiseXor(a, c)));
+ case 168:
+ return ir.BitwiseAnd(c, ir.BitwiseOr(a, b));
+ case 169:
+ return ir.BitwiseXor(ir.BitwiseNot(c), ir.BitwiseOr(a, b));
+ case 170:
+ return c;
+ case 171:
+ return ir.BitwiseOr(c, ir.BitwiseNot(ir.BitwiseOr(a, b)));
+ case 172:
+ return ir.BitwiseAnd(ir.BitwiseOr(a, b), ir.BitwiseOr(c, ir.BitwiseNot(a)));
+ case 173:
+ return ir.BitwiseOr(ir.BitwiseAnd(b, c), ir.BitwiseXor(a, ir.BitwiseNot(c)));
+ case 174:
+ return ir.BitwiseOr(c, ir.BitwiseAnd(b, ir.BitwiseNot(a)));
+ case 175:
+ return ir.BitwiseOr(c, ir.BitwiseNot(a));
+ case 176:
+ return ir.BitwiseAnd(a, ir.BitwiseOr(c, ir.BitwiseNot(b)));
+ case 177:
+ return ir.BitwiseOr(ir.BitwiseAnd(a, c), ir.BitwiseNot(ir.BitwiseOr(b, c)));
+ case 178:
+ return ir.BitwiseXor(b, ir.BitwiseOr(ir.BitwiseXor(a, b), ir.BitwiseXor(a, c)));
+ case 179:
+ return ir.BitwiseOr(ir.BitwiseAnd(a, c), ir.BitwiseNot(b));
+ case 180:
+ return ir.BitwiseXor(a, ir.BitwiseAnd(b, ir.BitwiseNot(c)));
+ case 181:
+ return ir.BitwiseNot(ir.BitwiseAnd(ir.BitwiseOr(b, c), ir.BitwiseXor(a, c)));
+ case 182:
+ return ir.BitwiseOr(ir.BitwiseAnd(a, c), ir.BitwiseXor(b, ir.BitwiseOr(a, c)));
+ case 183:
+ return ir.BitwiseNot(ir.BitwiseAnd(b, ir.BitwiseXor(a, c)));
+ case 184:
+ return ir.BitwiseAnd(ir.BitwiseOr(a, b), ir.BitwiseOr(c, ir.BitwiseNot(b)));
+ case 185:
+ return ir.BitwiseOr(ir.BitwiseAnd(a, c), ir.BitwiseXor(b, ir.BitwiseNot(c)));
+ case 186:
+ return ir.BitwiseOr(c, ir.BitwiseAnd(a, ir.BitwiseNot(b)));
+ case 187:
+ return ir.BitwiseOr(c, ir.BitwiseNot(b));
+ case 188:
+ return ir.BitwiseOr(ir.BitwiseAnd(a, c), ir.BitwiseXor(a, b));
+ case 189:
+ return ir.BitwiseOr(ir.BitwiseXor(a, b), ir.BitwiseXor(a, ir.BitwiseNot(c)));
+ case 190:
+ return ir.BitwiseOr(c, ir.BitwiseXor(a, b));
+ case 191:
+ return ir.BitwiseOr(c, ir.BitwiseNot(ir.BitwiseAnd(a, b)));
+ case 192:
+ return ir.BitwiseAnd(a, b);
+ case 193:
+ return ir.BitwiseAnd(ir.BitwiseOr(a, ir.BitwiseNot(c)), ir.BitwiseXor(a, ir.BitwiseNot(b)));
+ case 194:
+ return ir.BitwiseAnd(ir.BitwiseOr(a, c), ir.BitwiseXor(a, ir.BitwiseNot(b)));
+ case 195:
+ return ir.BitwiseXor(a, ir.BitwiseNot(b));
+ case 196:
+ return ir.BitwiseAnd(b, ir.BitwiseOr(a, ir.BitwiseNot(c)));
+ case 197:
+ return ir.BitwiseOr(ir.BitwiseAnd(a, b), ir.BitwiseNot(ir.BitwiseOr(a, c)));
+ case 198:
+ return ir.BitwiseXor(b, ir.BitwiseAnd(c, ir.BitwiseNot(a)));
+ case 199:
+ return ir.BitwiseNot(ir.BitwiseAnd(ir.BitwiseOr(a, c), ir.BitwiseXor(a, b)));
+ case 200:
+ return ir.BitwiseAnd(b, ir.BitwiseOr(a, c));
+ case 201:
+ return ir.BitwiseXor(ir.BitwiseNot(b), ir.BitwiseOr(a, c));
+ case 202:
+ return ir.BitwiseAnd(ir.BitwiseOr(a, c), ir.BitwiseOr(b, ir.BitwiseNot(a)));
+ case 203:
+ return ir.BitwiseOr(ir.BitwiseAnd(b, c), ir.BitwiseXor(a, ir.BitwiseNot(b)));
+ case 204:
+ return b;
+ case 205:
+ return ir.BitwiseOr(b, ir.BitwiseNot(ir.BitwiseOr(a, c)));
+ case 206:
+ return ir.BitwiseOr(b, ir.BitwiseAnd(c, ir.BitwiseNot(a)));
+ case 207:
+ return ir.BitwiseOr(b, ir.BitwiseNot(a));
+ case 208:
+ return ir.BitwiseAnd(a, ir.BitwiseOr(b, ir.BitwiseNot(c)));
+ case 209:
+ return ir.BitwiseOr(ir.BitwiseAnd(a, b), ir.BitwiseNot(ir.BitwiseOr(b, c)));
+ case 210:
+ return ir.BitwiseXor(a, ir.BitwiseAnd(c, ir.BitwiseNot(b)));
+ case 211:
+ return ir.BitwiseNot(ir.BitwiseAnd(ir.BitwiseOr(b, c), ir.BitwiseXor(a, b)));
+ case 212:
+ return ir.BitwiseXor(c, ir.BitwiseOr(ir.BitwiseXor(a, b), ir.BitwiseXor(a, c)));
+ case 213:
+ return ir.BitwiseOr(ir.BitwiseAnd(a, b), ir.BitwiseNot(c));
+ case 214:
+ return ir.BitwiseOr(ir.BitwiseAnd(a, b), ir.BitwiseXor(c, ir.BitwiseOr(a, b)));
+ case 215:
+ return ir.BitwiseNot(ir.BitwiseAnd(c, ir.BitwiseXor(a, b)));
+ case 216:
+ return ir.BitwiseAnd(ir.BitwiseOr(a, c), ir.BitwiseOr(b, ir.BitwiseNot(c)));
+ case 217:
+ return ir.BitwiseOr(ir.BitwiseAnd(a, b), ir.BitwiseXor(b, ir.BitwiseNot(c)));
+ case 218:
+ return ir.BitwiseOr(ir.BitwiseAnd(a, b), ir.BitwiseXor(a, c));
+ case 219:
+ return ir.BitwiseOr(ir.BitwiseXor(a, c), ir.BitwiseXor(a, ir.BitwiseNot(b)));
+ case 220:
+ return ir.BitwiseOr(b, ir.BitwiseAnd(a, ir.BitwiseNot(c)));
+ case 221:
+ return ir.BitwiseOr(b, ir.BitwiseNot(c));
+ case 222:
+ return ir.BitwiseOr(b, ir.BitwiseXor(a, c));
+ case 223:
+ return ir.BitwiseOr(b, ir.BitwiseNot(ir.BitwiseAnd(a, c)));
+ case 224:
+ return ir.BitwiseAnd(a, ir.BitwiseOr(b, c));
+ case 225:
+ return ir.BitwiseXor(ir.BitwiseNot(a), ir.BitwiseOr(b, c));
+ case 226:
+ return ir.BitwiseAnd(ir.BitwiseOr(a, ir.BitwiseNot(b)), ir.BitwiseOr(b, c));
+ case 227:
+ return ir.BitwiseOr(ir.BitwiseAnd(a, c), ir.BitwiseXor(a, ir.BitwiseNot(b)));
+ case 228:
+ return ir.BitwiseAnd(ir.BitwiseOr(a, ir.BitwiseNot(c)), ir.BitwiseOr(b, c));
+ case 229:
+ return ir.BitwiseOr(ir.BitwiseAnd(a, b), ir.BitwiseXor(a, ir.BitwiseNot(c)));
+ case 230:
+ return ir.BitwiseOr(ir.BitwiseAnd(a, b), ir.BitwiseXor(b, c));
+ case 231:
+ return ir.BitwiseOr(ir.BitwiseXor(a, ir.BitwiseNot(b)), ir.BitwiseXor(b, c));
+ case 232:
+ return ir.BitwiseAnd(ir.BitwiseOr(a, b), ir.BitwiseOr(c, ir.BitwiseAnd(a, b)));
+ case 233:
+ return ir.BitwiseOr(ir.BitwiseAnd(a, b),
+ ir.BitwiseXor(ir.BitwiseNot(c), ir.BitwiseOr(a, b)));
+ case 234:
+ return ir.BitwiseOr(c, ir.BitwiseAnd(a, b));
+ case 235:
+ return ir.BitwiseOr(c, ir.BitwiseXor(a, ir.BitwiseNot(b)));
+ case 236:
+ return ir.BitwiseOr(b, ir.BitwiseAnd(a, c));
+ case 237:
+ return ir.BitwiseOr(b, ir.BitwiseXor(a, ir.BitwiseNot(c)));
+ case 238:
+ return ir.BitwiseOr(b, c);
+ case 239:
+ return ir.BitwiseOr(ir.BitwiseNot(a), ir.BitwiseOr(b, c));
+ case 240:
+ return a;
+ case 241:
+ return ir.BitwiseOr(a, ir.BitwiseNot(ir.BitwiseOr(b, c)));
+ case 242:
+ return ir.BitwiseOr(a, ir.BitwiseAnd(c, ir.BitwiseNot(b)));
+ case 243:
+ return ir.BitwiseOr(a, ir.BitwiseNot(b));
+ case 244:
+ return ir.BitwiseOr(a, ir.BitwiseAnd(b, ir.BitwiseNot(c)));
+ case 245:
+ return ir.BitwiseOr(a, ir.BitwiseNot(c));
+ case 246:
+ return ir.BitwiseOr(a, ir.BitwiseXor(b, c));
+ case 247:
+ return ir.BitwiseOr(a, ir.BitwiseNot(ir.BitwiseAnd(b, c)));
+ case 248:
+ return ir.BitwiseOr(a, ir.BitwiseAnd(b, c));
+ case 249:
+ return ir.BitwiseOr(a, ir.BitwiseXor(b, ir.BitwiseNot(c)));
+ case 250:
+ return ir.BitwiseOr(a, c);
+ case 251:
+ return ir.BitwiseOr(ir.BitwiseNot(b), ir.BitwiseOr(a, c));
+ case 252:
+ return ir.BitwiseOr(a, b);
+ case 253:
+ return ir.BitwiseOr(ir.BitwiseNot(c), ir.BitwiseOr(a, b));
+ case 254:
+ return ir.BitwiseOr(a, ir.BitwiseOr(b, c));
+ case 255:
+ return ir.Imm32(0xFFFFFFFF);
+ // end of generated code
}
- if (ttbl & 0x02) {
- // r |= ~a & ~b & c;
- const auto lhs{ir.BitwiseAnd(not_a, not_b)};
- const auto rhs{ir.BitwiseAnd(lhs, c)};
- r = ir.BitwiseOr(r, rhs);
- }
- if (ttbl & 0x04) {
- // r |= ~a & b & ~c;
- const auto lhs{ir.BitwiseAnd(not_a, b)};
- const auto rhs{ir.BitwiseAnd(lhs, not_c)};
- r = ir.BitwiseOr(r, rhs);
- }
- if (ttbl & 0x08) {
- // r |= ~a & b & c;
- const auto lhs{ir.BitwiseAnd(not_a, b)};
- const auto rhs{ir.BitwiseAnd(lhs, c)};
- r = ir.BitwiseOr(r, rhs);
- }
- if (ttbl & 0x10) {
- // r |= a & ~b & ~c;
- const auto lhs{ir.BitwiseAnd(a, not_b)};
- const auto rhs{ir.BitwiseAnd(lhs, not_c)};
- r = ir.BitwiseOr(r, rhs);
- }
- if (ttbl & 0x20) {
- // r |= a & ~b & c;
- const auto lhs{ir.BitwiseAnd(a, not_b)};
- const auto rhs{ir.BitwiseAnd(lhs, c)};
- r = ir.BitwiseOr(r, rhs);
- }
- if (ttbl & 0x40) {
- // r |= a & b & ~c;
- const auto lhs{ir.BitwiseAnd(a, b)};
- const auto rhs{ir.BitwiseAnd(lhs, not_c)};
- r = ir.BitwiseOr(r, rhs);
- }
- if (ttbl & 0x80) {
- // r |= a & b & c;
- const auto lhs{ir.BitwiseAnd(a, b)};
- const auto rhs{ir.BitwiseAnd(lhs, c)};
- r = ir.BitwiseOr(r, rhs);
- }
- return r;
+ throw NotImplementedException("LOP3 with out of range ttbl");
}
IR::U32 LOP3(TranslatorVisitor& v, u64 insn, const IR::U32& op_b, const IR::U32& op_c, u64 lut) {
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/logic_operation_three_input_lut3.py b/src/shader_recompiler/frontend/maxwell/translate/impl/logic_operation_three_input_lut3.py
new file mode 100644
index 000000000..8f547c266
--- /dev/null
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/logic_operation_three_input_lut3.py
@@ -0,0 +1,92 @@
+# Copyright © 2022 degasus <markus@selfnet.de>
+# This work is free. You can redistribute it and/or modify it under the
+# terms of the Do What The Fuck You Want To Public License, Version 2,
+# as published by Sam Hocevar. See http://www.wtfpl.net/ for more details.
+
+from itertools import product
+
+# The primitive instructions
+OPS = {
+ 'ir.BitwiseAnd({}, {})' : (2, 1, lambda a,b: a&b),
+ 'ir.BitwiseOr({}, {})' : (2, 1, lambda a,b: a|b),
+ 'ir.BitwiseXor({}, {})' : (2, 1, lambda a,b: a^b),
+ 'ir.BitwiseNot({})' : (1, 0.1, lambda a: (~a) & 255), # Only tiny cost, as this can often inlined in other instructions
+}
+
+# Our database of combination of instructions
+optimized_calls = {}
+def cmp(lhs, rhs):
+ if lhs is None: # new entry
+ return True
+ if lhs[3] > rhs[3]: # costs
+ return True
+ if lhs[3] < rhs[3]: # costs
+ return False
+ if len(lhs[0]) > len(rhs[0]): # string len
+ return True
+ if len(lhs[0]) < len(rhs[0]): # string len
+ return False
+ if lhs[0] > rhs[0]: # string sorting
+ return True
+ if lhs[0] < rhs[0]: # string sorting
+ return False
+ assert lhs == rhs, "redundant instruction, bug in brute force"
+ return False
+def register(imm, instruction, count, latency):
+ # Use the sum of instruction count and latency as costs to evaluate which combination is best
+ costs = count + latency
+
+ old = optimized_calls.get(imm, None)
+ new = (instruction, count, latency, costs)
+
+ # Update if new or better
+ if cmp(old, new):
+ optimized_calls[imm] = new
+ return True
+
+ return False
+
+# Constants: 0, 1 (for free)
+register(0, 'ir.Imm32(0)', 0, 0)
+register(255, 'ir.Imm32(0xFFFFFFFF)', 0, 0)
+
+# Inputs: a, b, c (for free)
+ta = 0xF0
+tb = 0xCC
+tc = 0xAA
+inputs = {
+ ta : 'a',
+ tb : 'b',
+ tc : 'c',
+}
+for imm, instruction in inputs.items():
+ register(imm, instruction, 0, 0)
+ register((~imm) & 255, 'ir.BitwiseNot({})'.format(instruction), 0.099, 0.099) # slightly cheaper NEG on inputs
+
+# Try to combine two values from the db with an instruction.
+# If it is better than the old method, update it.
+while True:
+ registered = 0
+ calls_copy = optimized_calls.copy()
+ for OP, (argc, cost, f) in OPS.items():
+ for args in product(calls_copy.items(), repeat=argc):
+ # unpack(transponse) the arrays
+ imm = [arg[0] for arg in args]
+ value = [arg[1][0] for arg in args]
+ count = [arg[1][1] for arg in args]
+ latency = [arg[1][2] for arg in args]
+
+ registered += register(
+ f(*imm),
+ OP.format(*value),
+ sum(count) + cost,
+ max(latency) + cost)
+ if registered == 0:
+ # No update at all? So terminate
+ break
+
+# Hacky output. Please improve me to output valid C++ instead.
+s = """ case {imm}:
+ return {op};"""
+for imm in range(256):
+ print(s.format(imm=imm, op=optimized_calls[imm][0]))
diff --git a/src/video_core/engines/maxwell_dma.cpp b/src/video_core/engines/maxwell_dma.cpp
index 67388d980..1fc1358bc 100644
--- a/src/video_core/engines/maxwell_dma.cpp
+++ b/src/video_core/engines/maxwell_dma.cpp
@@ -53,7 +53,6 @@ void MaxwellDMA::Launch() {
// TODO(Subv): Perform more research and implement all features of this engine.
const LaunchDMA& launch = regs.launch_dma;
- ASSERT(launch.semaphore_type == LaunchDMA::SemaphoreType::NONE);
ASSERT(launch.interrupt_type == LaunchDMA::InterruptType::NONE);
ASSERT(launch.data_transfer_type == LaunchDMA::DataTransferType::NON_PIPELINED);
ASSERT(regs.dst_params.origin.x == 0);
@@ -79,6 +78,7 @@ void MaxwellDMA::Launch() {
CopyPitchToBlockLinear();
}
}
+ ReleaseSemaphore();
}
void MaxwellDMA::CopyPitchToPitch() {
@@ -244,4 +244,22 @@ void MaxwellDMA::FastCopyBlockLinearToPitch() {
memory_manager.WriteBlock(regs.offset_out, write_buffer.data(), dst_size);
}
+void MaxwellDMA::ReleaseSemaphore() {
+ const auto type = regs.launch_dma.semaphore_type;
+ const GPUVAddr address = regs.semaphore.address;
+ switch (type) {
+ case LaunchDMA::SemaphoreType::NONE:
+ break;
+ case LaunchDMA::SemaphoreType::RELEASE_ONE_WORD_SEMAPHORE:
+ memory_manager.Write<u32>(address, regs.semaphore.payload);
+ break;
+ case LaunchDMA::SemaphoreType::RELEASE_FOUR_WORD_SEMAPHORE:
+ memory_manager.Write<u64>(address, static_cast<u64>(regs.semaphore.payload));
+ memory_manager.Write<u64>(address + 8, system.GPU().GetTicks());
+ break;
+ default:
+ UNREACHABLE_MSG("Unknown semaphore type: {}", static_cast<u32>(type.Value()));
+ }
+}
+
} // namespace Tegra::Engines
diff --git a/src/video_core/engines/maxwell_dma.h b/src/video_core/engines/maxwell_dma.h
index a04514425..2692cac8a 100644
--- a/src/video_core/engines/maxwell_dma.h
+++ b/src/video_core/engines/maxwell_dma.h
@@ -224,6 +224,8 @@ private:
void FastCopyBlockLinearToPitch();
+ void ReleaseSemaphore();
+
Core::System& system;
MemoryManager& memory_manager;
diff --git a/src/video_core/renderer_opengl/gl_graphics_pipeline.cpp b/src/video_core/renderer_opengl/gl_graphics_pipeline.cpp
index f8495896c..9e6732abd 100644
--- a/src/video_core/renderer_opengl/gl_graphics_pipeline.cpp
+++ b/src/video_core/renderer_opengl/gl_graphics_pipeline.cpp
@@ -243,10 +243,6 @@ GraphicsPipeline::GraphicsPipeline(
case Settings::ShaderBackend::GLASM:
if (!sources[stage].empty()) {
assembly_programs[stage] = CompileProgram(sources[stage], AssemblyStage(stage));
- if (in_parallel) {
- // Make sure program is built before continuing when building in parallel
- glGetString(GL_PROGRAM_ERROR_STRING_NV);
- }
}
break;
case Settings::ShaderBackend::SPIRV:
@@ -256,20 +252,18 @@ GraphicsPipeline::GraphicsPipeline(
break;
}
}
- if (in_parallel && backend != Settings::ShaderBackend::GLASM) {
- // Make sure programs have built if we are building shaders in parallel
- for (OGLProgram& program : source_programs) {
- if (program.handle != 0) {
- GLint status{};
- glGetProgramiv(program.handle, GL_LINK_STATUS, &status);
- }
- }
+ if (in_parallel) {
+ std::lock_guard lock{built_mutex};
+ built_fence.Create();
+ // Flush this context to ensure compilation commands and fence are in the GPU pipe.
+ glFlush();
+ built_condvar.notify_one();
+ } else {
+ is_built = true;
}
if (shader_notify) {
shader_notify->MarkShaderComplete();
}
- is_built = true;
- built_condvar.notify_one();
}};
if (thread_worker) {
thread_worker->QueueWork(std::move(func));
@@ -440,7 +434,7 @@ void GraphicsPipeline::ConfigureImpl(bool is_indexed) {
buffer_cache.UpdateGraphicsBuffers(is_indexed);
buffer_cache.BindHostGeometryBuffers(is_indexed);
- if (!is_built.load(std::memory_order::relaxed)) {
+ if (!IsBuilt()) {
WaitForBuild();
}
const bool use_assembly{assembly_programs[0].handle != 0};
@@ -585,8 +579,26 @@ void GraphicsPipeline::GenerateTransformFeedbackState() {
}
void GraphicsPipeline::WaitForBuild() {
- std::unique_lock lock{built_mutex};
- built_condvar.wait(lock, [this] { return is_built.load(std::memory_order::relaxed); });
+ if (built_fence.handle == 0) {
+ std::unique_lock lock{built_mutex};
+ built_condvar.wait(lock, [this] { return built_fence.handle != 0; });
+ }
+ ASSERT(glClientWaitSync(built_fence.handle, 0, GL_TIMEOUT_IGNORED) != GL_WAIT_FAILED);
+ is_built = true;
+}
+
+bool GraphicsPipeline::IsBuilt() noexcept {
+ if (is_built) {
+ return true;
+ }
+ if (built_fence.handle == 0) {
+ return false;
+ }
+ // Timeout of zero means this is non-blocking
+ const auto sync_status = glClientWaitSync(built_fence.handle, 0, 0);
+ ASSERT(sync_status != GL_WAIT_FAILED);
+ is_built = sync_status != GL_TIMEOUT_EXPIRED;
+ return is_built;
}
} // namespace OpenGL
diff --git a/src/video_core/renderer_opengl/gl_graphics_pipeline.h b/src/video_core/renderer_opengl/gl_graphics_pipeline.h
index 4e28d9a42..311d49f3f 100644
--- a/src/video_core/renderer_opengl/gl_graphics_pipeline.h
+++ b/src/video_core/renderer_opengl/gl_graphics_pipeline.h
@@ -100,9 +100,7 @@ public:
return writes_global_memory;
}
- [[nodiscard]] bool IsBuilt() const noexcept {
- return is_built.load(std::memory_order::relaxed);
- }
+ [[nodiscard]] bool IsBuilt() noexcept;
template <typename Spec>
static auto MakeConfigureSpecFunc() {
@@ -154,7 +152,8 @@ private:
std::mutex built_mutex;
std::condition_variable built_condvar;
- std::atomic_bool is_built{false};
+ OGLSync built_fence{};
+ bool is_built{false};
};
} // namespace OpenGL
diff --git a/src/video_core/video_core.cpp b/src/video_core/video_core.cpp
index 329bf4def..2f2594585 100644
--- a/src/video_core/video_core.cpp
+++ b/src/video_core/video_core.cpp
@@ -50,6 +50,7 @@ std::unique_ptr<Tegra::GPU> CreateGPU(Core::Frontend::EmuWindow& emu_window, Cor
gpu->BindRenderer(std::move(renderer));
return gpu;
} catch (const std::runtime_error& exception) {
+ scope.Cancel();
LOG_ERROR(HW_GPU, "Failed to initialize GPU: {}", exception.what());
return nullptr;
}
generated by cgit v1.2.3 (git 2.25.1) at 2024-09-29 16:18:28 +0200