diff options
Diffstat (limited to 'src/video_core/renderer_vulkan')
7 files changed, 74 insertions, 113 deletions
diff --git a/src/video_core/renderer_vulkan/fixed_pipeline_state.cpp b/src/video_core/renderer_vulkan/fixed_pipeline_state.cpp index a7f256ff9..648b1e71b 100644 --- a/src/video_core/renderer_vulkan/fixed_pipeline_state.cpp +++ b/src/video_core/renderer_vulkan/fixed_pipeline_state.cpp @@ -81,7 +81,7 @@ void FixedPipelineState::Rasterizer::Fill(const Maxwell& regs) noexcept { primitive_restart_enable.Assign(regs.primitive_restart.enabled != 0 ? 1 : 0); cull_enable.Assign(regs.cull_test_enabled != 0 ? 1 : 0); depth_bias_enable.Assign(enabled_lut[POLYGON_OFFSET_ENABLE_LUT[topology_index]] != 0 ? 1 : 0); - depth_clamp_enable.Assign(clip.depth_clamp_near == 1 || clip.depth_clamp_far == 1 ? 1 : 0); + depth_clamp_disabled.Assign(regs.view_volume_clip_control.depth_clamp_disabled.Value()); ndc_minus_one_to_one.Assign(regs.depth_mode == Maxwell::DepthMode::MinusOneToOne ? 1 : 0); cull_face.Assign(PackCullFace(regs.cull_face)); front_face.Assign(packed_front_face); diff --git a/src/video_core/renderer_vulkan/fixed_pipeline_state.h b/src/video_core/renderer_vulkan/fixed_pipeline_state.h index 77188b862..8652067a7 100644 --- a/src/video_core/renderer_vulkan/fixed_pipeline_state.h +++ b/src/video_core/renderer_vulkan/fixed_pipeline_state.h @@ -153,7 +153,7 @@ struct FixedPipelineState { BitField<4, 1, u32> primitive_restart_enable; BitField<5, 1, u32> cull_enable; BitField<6, 1, u32> depth_bias_enable; - BitField<7, 1, u32> depth_clamp_enable; + BitField<7, 1, u32> depth_clamp_disabled; BitField<8, 1, u32> ndc_minus_one_to_one; BitField<9, 2, u32> cull_face; BitField<11, 1, u32> front_face; diff --git a/src/video_core/renderer_vulkan/vk_graphics_pipeline.cpp b/src/video_core/renderer_vulkan/vk_graphics_pipeline.cpp index 45bd1fc6c..852a17a70 100644 --- a/src/video_core/renderer_vulkan/vk_graphics_pipeline.cpp +++ b/src/video_core/renderer_vulkan/vk_graphics_pipeline.cpp @@ -249,7 +249,7 @@ vk::Pipeline VKGraphicsPipeline::CreatePipeline(const RenderPassParams& renderpa rasterization_ci.sType = VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_STATE_CREATE_INFO; rasterization_ci.pNext = nullptr; rasterization_ci.flags = 0; - rasterization_ci.depthClampEnable = rs.depth_clamp_enable; + rasterization_ci.depthClampEnable = rs.depth_clamp_disabled == 0 ? VK_TRUE : VK_FALSE; rasterization_ci.rasterizerDiscardEnable = VK_FALSE; rasterization_ci.polygonMode = VK_POLYGON_MODE_FILL; rasterization_ci.cullMode = diff --git a/src/video_core/renderer_vulkan/vk_pipeline_cache.cpp b/src/video_core/renderer_vulkan/vk_pipeline_cache.cpp index e6d4adc92..8fbd63dbc 100644 --- a/src/video_core/renderer_vulkan/vk_pipeline_cache.cpp +++ b/src/video_core/renderer_vulkan/vk_pipeline_cache.cpp @@ -27,12 +27,18 @@ #include "video_core/renderer_vulkan/vk_update_descriptor.h" #include "video_core/renderer_vulkan/wrapper.h" #include "video_core/shader/compiler_settings.h" +#include "video_core/shader/memory_util.h" namespace Vulkan { MICROPROFILE_DECLARE(Vulkan_PipelineCache); using Tegra::Engines::ShaderType; +using VideoCommon::Shader::GetShaderAddress; +using VideoCommon::Shader::GetShaderCode; +using VideoCommon::Shader::KERNEL_MAIN_OFFSET; +using VideoCommon::Shader::ProgramCode; +using VideoCommon::Shader::STAGE_MAIN_OFFSET; namespace { @@ -45,60 +51,6 @@ constexpr VkDescriptorType STORAGE_IMAGE = VK_DESCRIPTOR_TYPE_STORAGE_IMAGE; constexpr VideoCommon::Shader::CompilerSettings compiler_settings{ VideoCommon::Shader::CompileDepth::FullDecompile}; -/// Gets the address for the specified shader stage program -GPUVAddr GetShaderAddress(Core::System& system, Maxwell::ShaderProgram program) { - const auto& gpu{system.GPU().Maxwell3D()}; - const auto& shader_config{gpu.regs.shader_config[static_cast<std::size_t>(program)]}; - return gpu.regs.code_address.CodeAddress() + shader_config.offset; -} - -/// Gets if the current instruction offset is a scheduler instruction -constexpr bool IsSchedInstruction(std::size_t offset, std::size_t main_offset) { - // Sched instructions appear once every 4 instructions. - constexpr std::size_t SchedPeriod = 4; - const std::size_t absolute_offset = offset - main_offset; - return (absolute_offset % SchedPeriod) == 0; -} - -/// Calculates the size of a program stream -std::size_t CalculateProgramSize(const ProgramCode& program, bool is_compute) { - const std::size_t start_offset = is_compute ? 0 : 10; - // This is the encoded version of BRA that jumps to itself. All Nvidia - // shaders end with one. - constexpr u64 self_jumping_branch = 0xE2400FFFFF07000FULL; - constexpr u64 mask = 0xFFFFFFFFFF7FFFFFULL; - std::size_t offset = start_offset; - while (offset < program.size()) { - const u64 instruction = program[offset]; - if (!IsSchedInstruction(offset, start_offset)) { - if ((instruction & mask) == self_jumping_branch) { - // End on Maxwell's "nop" instruction - break; - } - if (instruction == 0) { - break; - } - } - ++offset; - } - // The last instruction is included in the program size - return std::min(offset + 1, program.size()); -} - -/// Gets the shader program code from memory for the specified address -ProgramCode GetShaderCode(Tegra::MemoryManager& memory_manager, const GPUVAddr gpu_addr, - const u8* host_ptr, bool is_compute) { - ProgramCode program_code(VideoCommon::Shader::MAX_PROGRAM_LENGTH); - ASSERT_OR_EXECUTE(host_ptr != nullptr, { - std::fill(program_code.begin(), program_code.end(), 0); - return program_code; - }); - memory_manager.ReadBlockUnsafe(gpu_addr, program_code.data(), - program_code.size() * sizeof(u64)); - program_code.resize(CalculateProgramSize(program_code, is_compute)); - return program_code; -} - constexpr std::size_t GetStageFromProgram(std::size_t program) { return program == 0 ? 0 : program - 1; } @@ -133,7 +85,7 @@ void AddBindings(std::vector<VkDescriptorSetLayoutBinding>& bindings, u32& bindi u32 count = 1; if constexpr (descriptor_type == VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER) { // Combined image samplers can be arrayed. - count = container[i].Size(); + count = container[i].size; } VkDescriptorSetLayoutBinding& entry = bindings.emplace_back(); entry.binding = binding++; @@ -230,9 +182,9 @@ std::array<Shader, Maxwell::MaxShaderProgram> VKPipelineCache::GetShaders() { const auto host_ptr{memory_manager.GetPointer(program_addr)}; // No shader found - create a new one - constexpr u32 stage_offset = 10; + constexpr u32 stage_offset = STAGE_MAIN_OFFSET; const auto stage = static_cast<Tegra::Engines::ShaderType>(index == 0 ? 0 : index - 1); - auto code = GetShaderCode(memory_manager, program_addr, host_ptr, false); + ProgramCode code = GetShaderCode(memory_manager, program_addr, host_ptr, false); shader = std::make_shared<CachedShader>(system, stage, program_addr, *cpu_addr, std::move(code), stage_offset); @@ -288,11 +240,10 @@ VKComputePipeline& VKPipelineCache::GetComputePipeline(const ComputePipelineCach // No shader found - create a new one const auto host_ptr = memory_manager.GetPointer(program_addr); - auto code = GetShaderCode(memory_manager, program_addr, host_ptr, true); - constexpr u32 kernel_main_offset = 0; + ProgramCode code = GetShaderCode(memory_manager, program_addr, host_ptr, true); shader = std::make_shared<CachedShader>(system, Tegra::Engines::ShaderType::Compute, program_addr, *cpu_addr, std::move(code), - kernel_main_offset); + KERNEL_MAIN_OFFSET); if (cpu_addr) { Register(shader); } else { @@ -411,7 +362,7 @@ void AddEntry(std::vector<VkDescriptorUpdateTemplateEntry>& template_entries, u3 if constexpr (descriptor_type == COMBINED_IMAGE_SAMPLER) { for (u32 i = 0; i < count; ++i) { - const u32 num_samplers = container[i].Size(); + const u32 num_samplers = container[i].size; VkDescriptorUpdateTemplateEntry& entry = template_entries.emplace_back(); entry.dstBinding = binding; entry.dstArrayElement = 0; diff --git a/src/video_core/renderer_vulkan/vk_pipeline_cache.h b/src/video_core/renderer_vulkan/vk_pipeline_cache.h index 84d26b822..ebddafb73 100644 --- a/src/video_core/renderer_vulkan/vk_pipeline_cache.h +++ b/src/video_core/renderer_vulkan/vk_pipeline_cache.h @@ -24,6 +24,7 @@ #include "video_core/renderer_vulkan/vk_resource_manager.h" #include "video_core/renderer_vulkan/vk_shader_decompiler.h" #include "video_core/renderer_vulkan/wrapper.h" +#include "video_core/shader/memory_util.h" #include "video_core/shader/registry.h" #include "video_core/shader/shader_ir.h" #include "video_core/surface.h" @@ -46,8 +47,6 @@ class CachedShader; using Shader = std::shared_ptr<CachedShader>; using Maxwell = Tegra::Engines::Maxwell3D::Regs; -using ProgramCode = std::vector<u64>; - struct GraphicsPipelineCacheKey { FixedPipelineState fixed_state; RenderPassParams renderpass_params; @@ -108,7 +107,8 @@ namespace Vulkan { class CachedShader final : public RasterizerCacheObject { public: explicit CachedShader(Core::System& system, Tegra::Engines::ShaderType stage, GPUVAddr gpu_addr, - VAddr cpu_addr, ProgramCode program_code, u32 main_offset); + VAddr cpu_addr, VideoCommon::Shader::ProgramCode program_code, + u32 main_offset); ~CachedShader(); GPUVAddr GetGpuAddr() const { @@ -140,7 +140,7 @@ private: Tegra::Engines::ShaderType stage); GPUVAddr gpu_addr{}; - ProgramCode program_code; + VideoCommon::Shader::ProgramCode program_code; VideoCommon::Shader::Registry registry; VideoCommon::Shader::ShaderIR shader_ir; ShaderEntries entries; diff --git a/src/video_core/renderer_vulkan/vk_rasterizer.cpp b/src/video_core/renderer_vulkan/vk_rasterizer.cpp index d634aa4ea..127f77b2c 100644 --- a/src/video_core/renderer_vulkan/vk_rasterizer.cpp +++ b/src/video_core/renderer_vulkan/vk_rasterizer.cpp @@ -119,14 +119,13 @@ template <typename Engine, typename Entry> Tegra::Texture::FullTextureInfo GetTextureInfo(const Engine& engine, const Entry& entry, std::size_t stage, std::size_t index = 0) { const auto stage_type = static_cast<Tegra::Engines::ShaderType>(stage); - if (entry.IsBindless()) { - const Tegra::Texture::TextureHandle tex_handle = - engine.AccessConstBuffer32(stage_type, entry.GetBuffer(), entry.GetOffset()); + if (entry.is_bindless) { + const auto tex_handle = engine.AccessConstBuffer32(stage_type, entry.buffer, entry.offset); return engine.GetTextureInfo(tex_handle); } const auto& gpu_profile = engine.AccessGuestDriverProfile(); const u32 entry_offset = static_cast<u32>(index * gpu_profile.GetTextureHandlerSize()); - const u32 offset = entry.GetOffset() + entry_offset; + const u32 offset = entry.offset + entry_offset; if constexpr (std::is_same_v<Engine, Tegra::Engines::Maxwell3D>) { return engine.GetStageTexture(stage_type, offset); } else { @@ -656,7 +655,7 @@ RasterizerVulkan::Texceptions RasterizerVulkan::UpdateAttachments() { Texceptions texceptions; for (std::size_t rt = 0; rt < Maxwell::NumRenderTargets; ++rt) { if (update_rendertargets) { - color_attachments[rt] = texture_cache.GetColorBufferSurface(rt); + color_attachments[rt] = texture_cache.GetColorBufferSurface(rt, true); } if (color_attachments[rt] && WalkAttachmentOverlaps(*color_attachments[rt])) { texceptions[rt] = true; @@ -664,7 +663,7 @@ RasterizerVulkan::Texceptions RasterizerVulkan::UpdateAttachments() { } if (update_rendertargets) { - zeta_attachment = texture_cache.GetDepthBufferSurface(); + zeta_attachment = texture_cache.GetDepthBufferSurface(true); } if (zeta_attachment && WalkAttachmentOverlaps(*zeta_attachment)) { texceptions[ZETA_TEXCEPTION_INDEX] = true; @@ -974,7 +973,7 @@ void RasterizerVulkan::SetupGraphicsTextures(const ShaderEntries& entries, std:: MICROPROFILE_SCOPE(Vulkan_Textures); const auto& gpu = system.GPU().Maxwell3D(); for (const auto& entry : entries.samplers) { - for (std::size_t i = 0; i < entry.Size(); ++i) { + for (std::size_t i = 0; i < entry.size; ++i) { const auto texture = GetTextureInfo(gpu, entry, stage, i); SetupTexture(texture, entry); } @@ -1026,7 +1025,7 @@ void RasterizerVulkan::SetupComputeTextures(const ShaderEntries& entries) { MICROPROFILE_SCOPE(Vulkan_Textures); const auto& gpu = system.GPU().KeplerCompute(); for (const auto& entry : entries.samplers) { - for (std::size_t i = 0; i < entry.Size(); ++i) { + for (std::size_t i = 0; i < entry.size; ++i) { const auto texture = GetTextureInfo(gpu, entry, ComputeShaderIndex, i); SetupTexture(texture, entry); } @@ -1108,7 +1107,7 @@ void RasterizerVulkan::SetupTexture(const Tegra::Texture::FullTextureInfo& textu void RasterizerVulkan::SetupImage(const Tegra::Texture::TICEntry& tic, const ImageEntry& entry) { auto view = texture_cache.GetImageSurface(tic, entry); - if (entry.IsWritten()) { + if (entry.is_written) { view->MarkAsModified(texture_cache.Tick()); } diff --git a/src/video_core/renderer_vulkan/vk_shader_decompiler.cpp b/src/video_core/renderer_vulkan/vk_shader_decompiler.cpp index aaa138f52..18678968c 100644 --- a/src/video_core/renderer_vulkan/vk_shader_decompiler.cpp +++ b/src/video_core/renderer_vulkan/vk_shader_decompiler.cpp @@ -103,8 +103,8 @@ struct GenericVaryingDescription { }; spv::Dim GetSamplerDim(const Sampler& sampler) { - ASSERT(!sampler.IsBuffer()); - switch (sampler.GetType()) { + ASSERT(!sampler.is_buffer); + switch (sampler.type) { case Tegra::Shader::TextureType::Texture1D: return spv::Dim::Dim1D; case Tegra::Shader::TextureType::Texture2D: @@ -114,13 +114,13 @@ spv::Dim GetSamplerDim(const Sampler& sampler) { case Tegra::Shader::TextureType::TextureCube: return spv::Dim::Cube; default: - UNIMPLEMENTED_MSG("Unimplemented sampler type={}", static_cast<u32>(sampler.GetType())); + UNIMPLEMENTED_MSG("Unimplemented sampler type={}", static_cast<int>(sampler.type)); return spv::Dim::Dim2D; } } std::pair<spv::Dim, bool> GetImageDim(const Image& image) { - switch (image.GetType()) { + switch (image.type) { case Tegra::Shader::ImageType::Texture1D: return {spv::Dim::Dim1D, false}; case Tegra::Shader::ImageType::TextureBuffer: @@ -134,7 +134,7 @@ std::pair<spv::Dim, bool> GetImageDim(const Image& image) { case Tegra::Shader::ImageType::Texture3D: return {spv::Dim::Dim3D, false}; default: - UNIMPLEMENTED_MSG("Unimplemented image type={}", static_cast<u32>(image.GetType())); + UNIMPLEMENTED_MSG("Unimplemented image type={}", static_cast<int>(image.type)); return {spv::Dim::Dim2D, false}; } } @@ -879,11 +879,11 @@ private: u32 DeclareTexelBuffers(u32 binding) { for (const auto& sampler : ir.GetSamplers()) { - if (!sampler.IsBuffer()) { + if (!sampler.is_buffer) { continue; } - ASSERT(!sampler.IsArray()); - ASSERT(!sampler.IsShadow()); + ASSERT(!sampler.is_array); + ASSERT(!sampler.is_shadow); constexpr auto dim = spv::Dim::Buffer; constexpr int depth = 0; @@ -894,23 +894,23 @@ private: const Id image_type = TypeImage(t_float, dim, depth, arrayed, ms, sampled, format); const Id pointer_type = TypePointer(spv::StorageClass::UniformConstant, image_type); const Id id = OpVariable(pointer_type, spv::StorageClass::UniformConstant); - AddGlobalVariable(Name(id, fmt::format("sampler_{}", sampler.GetIndex()))); + AddGlobalVariable(Name(id, fmt::format("sampler_{}", sampler.index))); Decorate(id, spv::Decoration::Binding, binding++); Decorate(id, spv::Decoration::DescriptorSet, DESCRIPTOR_SET); - texel_buffers.emplace(sampler.GetIndex(), TexelBuffer{image_type, id}); + texel_buffers.emplace(sampler.index, TexelBuffer{image_type, id}); } return binding; } u32 DeclareSamplers(u32 binding) { for (const auto& sampler : ir.GetSamplers()) { - if (sampler.IsBuffer()) { + if (sampler.is_buffer) { continue; } const auto dim = GetSamplerDim(sampler); - const int depth = sampler.IsShadow() ? 1 : 0; - const int arrayed = sampler.IsArray() ? 1 : 0; + const int depth = sampler.is_shadow ? 1 : 0; + const int arrayed = sampler.is_array ? 1 : 0; constexpr bool ms = false; constexpr int sampled = 1; constexpr auto format = spv::ImageFormat::Unknown; @@ -918,17 +918,17 @@ private: const Id sampler_type = TypeSampledImage(image_type); const Id sampler_pointer_type = TypePointer(spv::StorageClass::UniformConstant, sampler_type); - const Id type = sampler.IsIndexed() - ? TypeArray(sampler_type, Constant(t_uint, sampler.Size())) + const Id type = sampler.is_indexed + ? TypeArray(sampler_type, Constant(t_uint, sampler.size)) : sampler_type; const Id pointer_type = TypePointer(spv::StorageClass::UniformConstant, type); const Id id = OpVariable(pointer_type, spv::StorageClass::UniformConstant); - AddGlobalVariable(Name(id, fmt::format("sampler_{}", sampler.GetIndex()))); + AddGlobalVariable(Name(id, fmt::format("sampler_{}", sampler.index))); Decorate(id, spv::Decoration::Binding, binding++); Decorate(id, spv::Decoration::DescriptorSet, DESCRIPTOR_SET); - sampled_images.emplace(sampler.GetIndex(), SampledImage{image_type, sampler_type, - sampler_pointer_type, id}); + sampled_images.emplace( + sampler.index, SampledImage{image_type, sampler_type, sampler_pointer_type, id}); } return binding; } @@ -943,17 +943,17 @@ private: const Id image_type = TypeImage(t_uint, dim, depth, arrayed, ms, sampled, format, {}); const Id pointer_type = TypePointer(spv::StorageClass::UniformConstant, image_type); const Id id = OpVariable(pointer_type, spv::StorageClass::UniformConstant); - AddGlobalVariable(Name(id, fmt::format("image_{}", image.GetIndex()))); + AddGlobalVariable(Name(id, fmt::format("image_{}", image.index))); Decorate(id, spv::Decoration::Binding, binding++); Decorate(id, spv::Decoration::DescriptorSet, DESCRIPTOR_SET); - if (image.IsRead() && !image.IsWritten()) { + if (image.is_read && !image.is_written) { Decorate(id, spv::Decoration::NonWritable); - } else if (image.IsWritten() && !image.IsRead()) { + } else if (image.is_written && !image.is_read) { Decorate(id, spv::Decoration::NonReadable); } - images.emplace(static_cast<u32>(image.GetIndex()), StorageImage{image_type, id}); + images.emplace(image.index, StorageImage{image_type, id}); } return binding; } @@ -1584,6 +1584,15 @@ private: return {OpCompositeConstruct(t_half, low, high), Type::HalfFloat}; } + Expression LogicalAddCarry(Operation operation) { + const Id op_a = AsUint(Visit(operation[0])); + const Id op_b = AsUint(Visit(operation[1])); + + const Id result = OpIAddCarry(TypeStruct({t_uint, t_uint}), op_a, op_b); + const Id carry = OpCompositeExtract(t_uint, result, 1); + return {OpINotEqual(t_bool, carry, Constant(t_uint, 0)), Type::Bool}; + } + Expression LogicalAssign(Operation operation) { const Node& dest = operation[0]; const Node& src = operation[1]; @@ -1611,11 +1620,11 @@ private: Id GetTextureSampler(Operation operation) { const auto& meta = std::get<MetaTexture>(operation.GetMeta()); - ASSERT(!meta.sampler.IsBuffer()); + ASSERT(!meta.sampler.is_buffer); - const auto& entry = sampled_images.at(meta.sampler.GetIndex()); + const auto& entry = sampled_images.at(meta.sampler.index); Id sampler = entry.variable; - if (meta.sampler.IsIndexed()) { + if (meta.sampler.is_indexed) { const Id index = AsInt(Visit(meta.index)); sampler = OpAccessChain(entry.sampler_pointer_type, sampler, index); } @@ -1624,8 +1633,8 @@ private: Id GetTextureImage(Operation operation) { const auto& meta = std::get<MetaTexture>(operation.GetMeta()); - const u32 index = meta.sampler.GetIndex(); - if (meta.sampler.IsBuffer()) { + const u32 index = meta.sampler.index; + if (meta.sampler.is_buffer) { const auto& entry = texel_buffers.at(index); return OpLoad(entry.image_type, entry.image); } else { @@ -1636,7 +1645,7 @@ private: Id GetImage(Operation operation) { const auto& meta = std::get<MetaImage>(operation.GetMeta()); - const auto entry = images.at(meta.image.GetIndex()); + const auto entry = images.at(meta.image.index); return OpLoad(entry.image_type, entry.image); } @@ -1652,7 +1661,7 @@ private: } if (const auto meta = std::get_if<MetaTexture>(&operation.GetMeta())) { // Add array coordinate for textures - if (meta->sampler.IsArray()) { + if (meta->sampler.is_array) { Id array = AsInt(Visit(meta->array)); if (type == Type::Float) { array = OpConvertSToF(t_float, array); @@ -1758,7 +1767,7 @@ private: operands.push_back(GetOffsetCoordinates(operation)); } - if (meta.sampler.IsShadow()) { + if (meta.sampler.is_shadow) { const Id dref = AsFloat(Visit(meta.depth_compare)); return {OpImageSampleDrefExplicitLod(t_float, sampler, coords, dref, mask, operands), Type::Float}; @@ -1773,7 +1782,7 @@ private: const Id coords = GetCoordinates(operation, Type::Float); Id texture{}; - if (meta.sampler.IsShadow()) { + if (meta.sampler.is_shadow) { texture = OpImageDrefGather(t_float4, GetTextureSampler(operation), coords, AsFloat(Visit(meta.depth_compare))); } else { @@ -1800,8 +1809,8 @@ private: } const Id lod = AsUint(Visit(operation[0])); - const std::size_t coords_count = [&]() { - switch (const auto type = meta.sampler.GetType(); type) { + const std::size_t coords_count = [&meta] { + switch (const auto type = meta.sampler.type) { case Tegra::Shader::TextureType::Texture1D: return 1; case Tegra::Shader::TextureType::Texture2D: @@ -1810,7 +1819,7 @@ private: case Tegra::Shader::TextureType::Texture3D: return 3; default: - UNREACHABLE_MSG("Invalid texture type={}", static_cast<u32>(type)); + UNREACHABLE_MSG("Invalid texture type={}", static_cast<int>(type)); return 2; } }(); @@ -1853,7 +1862,7 @@ private: const Id image = GetTextureImage(operation); const Id coords = GetCoordinates(operation, Type::Int); Id fetch; - if (meta.lod && !meta.sampler.IsBuffer()) { + if (meta.lod && !meta.sampler.is_buffer) { fetch = OpImageFetch(t_float4, image, coords, spv::ImageOperandsMask::Lod, AsInt(Visit(meta.lod))); } else { @@ -2518,6 +2527,8 @@ private: &SPIRVDecompiler::Binary<&Module::OpINotEqual, Type::Bool, Type::Uint>, &SPIRVDecompiler::Binary<&Module::OpUGreaterThanEqual, Type::Bool, Type::Uint>, + &SPIRVDecompiler::LogicalAddCarry, + &SPIRVDecompiler::Binary<&Module::OpFOrdLessThan, Type::Bool2, Type::HalfFloat>, &SPIRVDecompiler::Binary<&Module::OpFOrdEqual, Type::Bool2, Type::HalfFloat>, &SPIRVDecompiler::Binary<&Module::OpFOrdLessThanEqual, Type::Bool2, Type::HalfFloat>, @@ -2969,7 +2980,7 @@ ShaderEntries GenerateShaderEntries(const VideoCommon::Shader::ShaderIR& ir) { entries.global_buffers.emplace_back(base.cbuf_index, base.cbuf_offset, usage.is_written); } for (const auto& sampler : ir.GetSamplers()) { - if (sampler.IsBuffer()) { + if (sampler.is_buffer) { entries.texel_buffers.emplace_back(sampler); } else { entries.samplers.emplace_back(sampler); |