diff options
Diffstat (limited to 'src/video_core/engines')
| -rw-r--r-- | src/video_core/engines/engine_upload.cpp | 2 | ||||
| -rw-r--r-- | src/video_core/engines/maxwell_dma.h | 27 |
2 files changed, 27 insertions, 2 deletions
diff --git a/src/video_core/engines/engine_upload.cpp b/src/video_core/engines/engine_upload.cpp index 663d5517a..867457f25 100644 --- a/src/video_core/engines/engine_upload.cpp +++ b/src/video_core/engines/engine_upload.cpp @@ -25,7 +25,7 @@ void State::ProcessData(const u32 data, const bool is_last_call) { write_offset += sub_copy_size; if (is_last_call) { const GPUVAddr address{regs.dest.Address()}; - if (linear) { + if (is_linear) { memory_manager.WriteBlock(address, inner_buffer.data(), copy_size); } else { UNIMPLEMENTED_IF(regs.dest.z != 0); diff --git a/src/video_core/engines/maxwell_dma.h b/src/video_core/engines/maxwell_dma.h index 35b25e6b9..0b2e26199 100644 --- a/src/video_core/engines/maxwell_dma.h +++ b/src/video_core/engines/maxwell_dma.h @@ -68,6 +68,16 @@ public: static_assert(sizeof(Parameters) == 24, "Parameters has wrong size"); + enum class ComponentMode : u32 { + SRC0 = 0, + SRC1 = 1, + SRC2 = 2, + SRC3 = 3, + CONST0 = 4, + CONST1 = 5, + ZERO = 6, + }; + enum class CopyMode : u32 { None = 0, Unk1 = 1, @@ -133,7 +143,19 @@ public: u32 x_count; u32 y_count; - INSERT_PADDING_WORDS(0xBB); + INSERT_PADDING_WORDS(0xB8); + + u32 const0; + u32 const1; + union { + BitField<0, 4, ComponentMode> component0; + BitField<4, 4, ComponentMode> component1; + BitField<8, 4, ComponentMode> component2; + BitField<12, 4, ComponentMode> component3; + BitField<16, 2, u32> component_size; + BitField<20, 3, u32> src_num_components; + BitField<24, 3, u32> dst_num_components; + } swizzle_config; Parameters dst_params; @@ -170,6 +192,9 @@ ASSERT_REG_POSITION(src_pitch, 0x104); ASSERT_REG_POSITION(dst_pitch, 0x105); ASSERT_REG_POSITION(x_count, 0x106); ASSERT_REG_POSITION(y_count, 0x107); +ASSERT_REG_POSITION(const0, 0x1C0); +ASSERT_REG_POSITION(const1, 0x1C1); +ASSERT_REG_POSITION(swizzle_config, 0x1C2); ASSERT_REG_POSITION(dst_params, 0x1C3); ASSERT_REG_POSITION(src_params, 0x1CA); |