summaryrefslogtreecommitdiffstats
path: root/src/video_core/engines
diff options
context:
space:
mode:
Diffstat (limited to 'src/video_core/engines')
-rw-r--r--src/video_core/engines/draw_manager.cpp58
-rw-r--r--src/video_core/engines/draw_manager.h4
-rw-r--r--src/video_core/engines/engine_upload.cpp4
-rw-r--r--src/video_core/engines/engine_upload.h7
-rw-r--r--src/video_core/engines/maxwell_dma.cpp34
-rw-r--r--src/video_core/engines/maxwell_dma.h8
6 files changed, 56 insertions, 59 deletions
diff --git a/src/video_core/engines/draw_manager.cpp b/src/video_core/engines/draw_manager.cpp
index b213c374f..3a78421f6 100644
--- a/src/video_core/engines/draw_manager.cpp
+++ b/src/video_core/engines/draw_manager.cpp
@@ -46,21 +46,26 @@ void DrawManager::ProcessMethodCall(u32 method, u32 argument) {
SetInlineIndexBuffer(regs.inline_index_4x8.index2);
SetInlineIndexBuffer(regs.inline_index_4x8.index3);
break;
- case MAXWELL3D_REG_INDEX(topology_override):
- use_topology_override = true;
+ case MAXWELL3D_REG_INDEX(vertex_array_instance_first):
+ case MAXWELL3D_REG_INDEX(vertex_array_instance_subsequent): {
+ LOG_WARNING(HW_GPU, "(STUBBED) called");
break;
+ }
default:
break;
}
}
void DrawManager::Clear(u32 layer_count) {
- maxwell3d->rasterizer->Clear(layer_count);
+ if (maxwell3d->ShouldExecute()) {
+ maxwell3d->rasterizer->Clear(layer_count);
+ }
}
void DrawManager::DrawDeferred() {
- if (draw_state.draw_mode != DrawMode::Instance || draw_state.instance_count == 0)
+ if (draw_state.draw_mode != DrawMode::Instance || draw_state.instance_count == 0) {
return;
+ }
DrawEnd(draw_state.instance_count + 1, true);
draw_state.instance_count = 0;
}
@@ -115,8 +120,9 @@ void DrawManager::DrawEnd(u32 instance_count, bool force_draw) {
const auto& regs{maxwell3d->regs};
switch (draw_state.draw_mode) {
case DrawMode::Instance:
- if (!force_draw)
+ if (!force_draw) {
break;
+ }
[[fallthrough]];
case DrawMode::General:
draw_state.base_instance = regs.global_base_instance_index;
@@ -156,25 +162,28 @@ void DrawManager::DrawIndexSmall(u32 argument) {
ProcessDraw(true, 1);
}
-void DrawManager::ProcessTopologyOverride() {
- if (!use_topology_override)
- return;
-
+void DrawManager::UpdateTopology() {
const auto& regs{maxwell3d->regs};
- switch (regs.topology_override) {
- case PrimitiveTopologyOverride::None:
- break;
- case PrimitiveTopologyOverride::Points:
- draw_state.topology = PrimitiveTopology::Points;
- break;
- case PrimitiveTopologyOverride::Lines:
- draw_state.topology = PrimitiveTopology::Lines;
- break;
- case PrimitiveTopologyOverride::LineStrip:
- draw_state.topology = PrimitiveTopology::LineStrip;
+ switch (regs.primitive_topology_control) {
+ case PrimitiveTopologyControl::UseInBeginMethods:
break;
- default:
- draw_state.topology = static_cast<PrimitiveTopology>(regs.topology_override);
+ case PrimitiveTopologyControl::UseSeparateState:
+ switch (regs.topology_override) {
+ case PrimitiveTopologyOverride::None:
+ break;
+ case PrimitiveTopologyOverride::Points:
+ draw_state.topology = PrimitiveTopology::Points;
+ break;
+ case PrimitiveTopologyOverride::Lines:
+ draw_state.topology = PrimitiveTopology::Lines;
+ break;
+ case PrimitiveTopologyOverride::LineStrip:
+ draw_state.topology = PrimitiveTopology::LineStrip;
+ break;
+ default:
+ draw_state.topology = static_cast<PrimitiveTopology>(regs.topology_override);
+ break;
+ }
break;
}
}
@@ -183,9 +192,10 @@ void DrawManager::ProcessDraw(bool draw_indexed, u32 instance_count) {
LOG_TRACE(HW_GPU, "called, topology={}, count={}", draw_state.topology,
draw_indexed ? draw_state.index_buffer.count : draw_state.vertex_buffer.count);
- ProcessTopologyOverride();
+ UpdateTopology();
- if (maxwell3d->ShouldExecute())
+ if (maxwell3d->ShouldExecute()) {
maxwell3d->rasterizer->Draw(draw_indexed, instance_count);
+ }
}
} // namespace Tegra::Engines
diff --git a/src/video_core/engines/draw_manager.h b/src/video_core/engines/draw_manager.h
index 4f67027ca..0e6930a9c 100644
--- a/src/video_core/engines/draw_manager.h
+++ b/src/video_core/engines/draw_manager.h
@@ -10,6 +10,7 @@ class RasterizerInterface;
}
namespace Tegra::Engines {
+using PrimitiveTopologyControl = Maxwell3D::Regs::PrimitiveTopologyControl;
using PrimitiveTopology = Maxwell3D::Regs::PrimitiveTopology;
using PrimitiveTopologyOverride = Maxwell3D::Regs::PrimitiveTopologyOverride;
using IndexBuffer = Maxwell3D::Regs::IndexBuffer;
@@ -58,12 +59,11 @@ private:
void DrawIndexSmall(u32 argument);
- void ProcessTopologyOverride();
+ void UpdateTopology();
void ProcessDraw(bool draw_indexed, u32 instance_count);
Maxwell3D* maxwell3d{};
State draw_state{};
- bool use_topology_override{};
};
} // namespace Tegra::Engines
diff --git a/src/video_core/engines/engine_upload.cpp b/src/video_core/engines/engine_upload.cpp
index e4f8331ab..cea1dd8b0 100644
--- a/src/video_core/engines/engine_upload.cpp
+++ b/src/video_core/engines/engine_upload.cpp
@@ -24,7 +24,7 @@ void State::BindRasterizer(VideoCore::RasterizerInterface* rasterizer_) {
void State::ProcessExec(const bool is_linear_) {
write_offset = 0;
copy_size = regs.line_length_in * regs.line_count;
- inner_buffer.resize(copy_size);
+ inner_buffer.resize_destructive(copy_size);
is_linear = is_linear_;
}
@@ -70,7 +70,7 @@ void State::ProcessData(std::span<const u8> read_buffer) {
const std::size_t dst_size = Tegra::Texture::CalculateSize(
true, bytes_per_pixel, width, regs.dest.height, regs.dest.depth,
regs.dest.BlockHeight(), regs.dest.BlockDepth());
- tmp_buffer.resize(dst_size);
+ tmp_buffer.resize_destructive(dst_size);
memory_manager.ReadBlock(address, tmp_buffer.data(), dst_size);
Tegra::Texture::SwizzleSubrect(tmp_buffer, read_buffer, bytes_per_pixel, width,
regs.dest.height, regs.dest.depth, x_offset, regs.dest.y,
diff --git a/src/video_core/engines/engine_upload.h b/src/video_core/engines/engine_upload.h
index 94fafd9dc..7242d2529 100644
--- a/src/video_core/engines/engine_upload.h
+++ b/src/video_core/engines/engine_upload.h
@@ -4,9 +4,10 @@
#pragma once
#include <span>
-#include <vector>
+
#include "common/bit_field.h"
#include "common/common_types.h"
+#include "common/scratch_buffer.h"
namespace Tegra {
class MemoryManager;
@@ -73,8 +74,8 @@ private:
u32 write_offset = 0;
u32 copy_size = 0;
- std::vector<u8> inner_buffer;
- std::vector<u8> tmp_buffer;
+ Common::ScratchBuffer<u8> inner_buffer;
+ Common::ScratchBuffer<u8> tmp_buffer;
bool is_linear = false;
Registers& regs;
MemoryManager& memory_manager;
diff --git a/src/video_core/engines/maxwell_dma.cpp b/src/video_core/engines/maxwell_dma.cpp
index a189e60ae..f73d7bf0f 100644
--- a/src/video_core/engines/maxwell_dma.cpp
+++ b/src/video_core/engines/maxwell_dma.cpp
@@ -184,12 +184,8 @@ void MaxwellDMA::CopyBlockLinearToPitch() {
const size_t src_size =
CalculateSize(true, bytes_per_pixel, width, height, depth, block_height, block_depth);
- if (read_buffer.size() < src_size) {
- read_buffer.resize(src_size);
- }
- if (write_buffer.size() < dst_size) {
- write_buffer.resize(dst_size);
- }
+ read_buffer.resize_destructive(src_size);
+ write_buffer.resize_destructive(dst_size);
memory_manager.ReadBlock(regs.offset_in, read_buffer.data(), src_size);
memory_manager.ReadBlock(regs.offset_out, write_buffer.data(), dst_size);
@@ -235,12 +231,8 @@ void MaxwellDMA::CopyPitchToBlockLinear() {
CalculateSize(true, bytes_per_pixel, width, height, depth, block_height, block_depth);
const size_t src_size = static_cast<size_t>(regs.pitch_in) * regs.line_count;
- if (read_buffer.size() < src_size) {
- read_buffer.resize(src_size);
- }
- if (write_buffer.size() < dst_size) {
- write_buffer.resize(dst_size);
- }
+ read_buffer.resize_destructive(src_size);
+ write_buffer.resize_destructive(dst_size);
memory_manager.ReadBlock(regs.offset_in, read_buffer.data(), src_size);
if (Settings::IsGPULevelExtreme()) {
@@ -269,12 +261,8 @@ void MaxwellDMA::FastCopyBlockLinearToPitch() {
pos_x = pos_x % x_in_gob;
pos_y = pos_y % 8;
- if (read_buffer.size() < src_size) {
- read_buffer.resize(src_size);
- }
- if (write_buffer.size() < dst_size) {
- write_buffer.resize(dst_size);
- }
+ read_buffer.resize_destructive(src_size);
+ write_buffer.resize_destructive(dst_size);
if (Settings::IsGPULevelExtreme()) {
memory_manager.ReadBlock(regs.offset_in + offset, read_buffer.data(), src_size);
@@ -333,14 +321,10 @@ void MaxwellDMA::CopyBlockLinearToBlockLinear() {
const u32 pitch = x_elements * bytes_per_pixel;
const size_t mid_buffer_size = pitch * regs.line_count;
- if (read_buffer.size() < src_size) {
- read_buffer.resize(src_size);
- }
- if (write_buffer.size() < dst_size) {
- write_buffer.resize(dst_size);
- }
+ read_buffer.resize_destructive(src_size);
+ write_buffer.resize_destructive(dst_size);
- intermediate_buffer.resize(mid_buffer_size);
+ intermediate_buffer.resize_destructive(mid_buffer_size);
memory_manager.ReadBlock(regs.offset_in, read_buffer.data(), src_size);
memory_manager.ReadBlock(regs.offset_out, write_buffer.data(), dst_size);
diff --git a/src/video_core/engines/maxwell_dma.h b/src/video_core/engines/maxwell_dma.h
index d40d3d302..c88191a61 100644
--- a/src/video_core/engines/maxwell_dma.h
+++ b/src/video_core/engines/maxwell_dma.h
@@ -6,8 +6,10 @@
#include <array>
#include <cstddef>
#include <vector>
+
#include "common/bit_field.h"
#include "common/common_types.h"
+#include "common/scratch_buffer.h"
#include "video_core/engines/engine_interface.h"
namespace Core {
@@ -234,9 +236,9 @@ private:
MemoryManager& memory_manager;
VideoCore::RasterizerInterface* rasterizer = nullptr;
- std::vector<u8> read_buffer;
- std::vector<u8> write_buffer;
- std::vector<u8> intermediate_buffer;
+ Common::ScratchBuffer<u8> read_buffer;
+ Common::ScratchBuffer<u8> write_buffer;
+ Common::ScratchBuffer<u8> intermediate_buffer;
static constexpr std::size_t NUM_REGS = 0x800;
struct Regs {
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-05 14:39:57 +0200