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-rw-r--r--src/video_core/engines/shader_bytecode.h39
1 files changed, 36 insertions, 3 deletions
diff --git a/src/video_core/engines/shader_bytecode.h b/src/video_core/engines/shader_bytecode.h
index f32a17057..da64430e9 100644
--- a/src/video_core/engines/shader_bytecode.h
+++ b/src/video_core/engines/shader_bytecode.h
@@ -261,6 +261,33 @@ union Instruction {
BitField<50, 1, u64> saturate_a;
} conversion;
+ union {
+ BitField<31, 4, u64> component_mask;
+
+ bool IsComponentEnabled(size_t component) const {
+ return ((1 << component) & component_mask) != 0;
+ }
+ } tex;
+
+ union {
+ BitField<50, 3, u64> component_mask_selector;
+ BitField<28, 8, Register> gpr28;
+
+ bool HasTwoDestinations() const {
+ return gpr28.Value() != Register::ZeroIndex;
+ }
+
+ bool IsComponentEnabled(size_t component) const {
+ static constexpr std::array<size_t, 5> one_dest_mask{0x1, 0x2, 0x4, 0x8, 0x3};
+ static constexpr std::array<size_t, 5> two_dest_mask{0x7, 0xb, 0xd, 0xe, 0xf};
+ const auto& mask{HasTwoDestinations() ? two_dest_mask : one_dest_mask};
+
+ ASSERT(component_mask_selector < mask.size());
+
+ return ((1 << component) & mask[component_mask_selector]) != 0;
+ }
+ } texs;
+
BitField<61, 1, u64> is_b_imm;
BitField<60, 1, u64> is_b_gpr;
BitField<59, 1, u64> is_c_gpr;
@@ -281,6 +308,7 @@ public:
KIL,
LD_A,
ST_A,
+ TEX,
TEXQ, // Texture Query
TEXS, // Texture Fetch with scalar/non-vec4 source/destinations
TLDS, // Texture Load with scalar/non-vec4 source/destinations
@@ -297,8 +325,10 @@ public:
FMUL_R,
FMUL_IMM,
FMUL32_IMM,
- MUFU, // Multi-Function Operator
- RRO, // Range Reduction Operator
+ MUFU, // Multi-Function Operator
+ RRO_C, // Range Reduction Operator
+ RRO_R,
+ RRO_IMM,
F2F_C,
F2F_R,
F2F_IMM,
@@ -442,6 +472,7 @@ private:
INST("111000110011----", Id::KIL, Type::Flow, "KIL"),
INST("1110111111011---", Id::LD_A, Type::Memory, "LD_A"),
INST("1110111111110---", Id::ST_A, Type::Memory, "ST_A"),
+ INST("1100000000111---", Id::TEX, Type::Memory, "TEX"),
INST("1101111101001---", Id::TEXQ, Type::Memory, "TEXQ"),
INST("1101100---------", Id::TEXS, Type::Memory, "TEXS"),
INST("1101101---------", Id::TLDS, Type::Memory, "TLDS"),
@@ -459,7 +490,9 @@ private:
INST("0011100-01101---", Id::FMUL_IMM, Type::Arithmetic, "FMUL_IMM"),
INST("00011110--------", Id::FMUL32_IMM, Type::Arithmetic, "FMUL32_IMM"),
INST("0101000010000---", Id::MUFU, Type::Arithmetic, "MUFU"),
- INST("0101110010010---", Id::RRO, Type::Arithmetic, "RRO"),
+ INST("0100110010010---", Id::RRO_C, Type::Arithmetic, "RRO_C"),
+ INST("0101110010010---", Id::RRO_R, Type::Arithmetic, "RRO_R"),
+ INST("0011100-10010---", Id::RRO_IMM, Type::Arithmetic, "RRO_IMM"),
INST("0100110010101---", Id::F2F_C, Type::Conversion, "F2F_C"),
INST("0101110010101---", Id::F2F_R, Type::Conversion, "F2F_R"),
INST("0011100-10101---", Id::F2F_IMM, Type::Conversion, "F2F_IMM"),