summaryrefslogtreecommitdiffstats
path: root/src/video_core/engines/shader_bytecode.h
diff options
context:
space:
mode:
Diffstat (limited to 'src/video_core/engines/shader_bytecode.h')
-rw-r--r--src/video_core/engines/shader_bytecode.h26
1 files changed, 21 insertions, 5 deletions
diff --git a/src/video_core/engines/shader_bytecode.h b/src/video_core/engines/shader_bytecode.h
index 5ea094e64..9989825f8 100644
--- a/src/video_core/engines/shader_bytecode.h
+++ b/src/video_core/engines/shader_bytecode.h
@@ -208,6 +208,8 @@ enum class UniformType : u64 {
SignedShort = 3,
Single = 4,
Double = 5,
+ Quad = 6,
+ UnsignedQuad = 7,
};
enum class StoreType : u64 {
@@ -397,6 +399,10 @@ struct IpaMode {
bool operator!=(const IpaMode& a) const {
return !operator==(a);
}
+ bool operator<(const IpaMode& a) const {
+ return std::tie(interpolation_mode, sampling_mode) <
+ std::tie(a.interpolation_mode, a.sampling_mode);
+ }
};
enum class SystemVariable : u64 {
@@ -575,7 +581,7 @@ union Instruction {
union {
BitField<39, 2, u64> tab5cb8_2;
- BitField<41, 3, u64> tab5c68_1;
+ BitField<41, 3, u64> postfactor;
BitField<44, 2, u64> tab5c68_0;
BitField<48, 1, u64> negate_b;
} fmul;
@@ -609,7 +615,7 @@ union Instruction {
BitField<31, 1, u64> negate_b;
BitField<30, 1, u64> abs_b;
- BitField<47, 2, HalfType> type_b;
+ BitField<28, 2, HalfType> type_b;
BitField<35, 2, HalfType> type_c;
} alu_half;
@@ -644,6 +650,7 @@ union Instruction {
BitField<37, 2, HalfPrecision> precision;
BitField<32, 1, u64> saturate;
+ BitField<31, 1, u64> negate_b;
BitField<30, 1, u64> negate_c;
BitField<35, 2, HalfType> type_c;
} rr;
@@ -780,6 +787,12 @@ union Instruction {
} st_l;
union {
+ BitField<48, 3, UniformType> type;
+ BitField<46, 2, u64> cache_mode;
+ BitField<20, 24, s64> immediate_offset;
+ } ldg;
+
+ union {
BitField<0, 3, u64> pred0;
BitField<3, 3, u64> pred3;
BitField<7, 1, u64> abs_a;
@@ -1049,7 +1062,7 @@ union Instruction {
BitField<49, 1, u64> nodep_flag;
BitField<50, 3, u64> component_mask_selector;
BitField<53, 4, u64> texture_info;
- BitField<60, 1, u64> fp32_flag;
+ BitField<59, 1, u64> fp32_flag;
TextureType GetTextureType() const {
// The TEXS instruction has a weird encoding for the texture type.
@@ -1065,6 +1078,7 @@ union Instruction {
LOG_CRITICAL(HW_GPU, "Unhandled texture_info: {}",
static_cast<u32>(texture_info.Value()));
UNREACHABLE();
+ return TextureType::Texture1D;
}
TextureProcessMode GetTextureProcessMode() const {
@@ -1145,6 +1159,7 @@ union Instruction {
LOG_CRITICAL(HW_GPU, "Unhandled texture_info: {}",
static_cast<u32>(texture_info.Value()));
UNREACHABLE();
+ return TextureType::Texture1D;
}
TextureProcessMode GetTextureProcessMode() const {
@@ -1429,6 +1444,7 @@ public:
PredicateSetRegister,
RegisterSetPredicate,
Conversion,
+ Video,
Xmad,
Unknown,
};
@@ -1560,8 +1576,8 @@ private:
INST("11100000--------", Id::IPA, Type::Trivial, "IPA"),
INST("1111101111100---", Id::OUT_R, Type::Trivial, "OUT_R"),
INST("1110111111010---", Id::ISBERD, Type::Trivial, "ISBERD"),
- INST("01011111--------", Id::VMAD, Type::Trivial, "VMAD"),
- INST("0101000011110---", Id::VSETP, Type::Trivial, "VSETP"),
+ INST("01011111--------", Id::VMAD, Type::Video, "VMAD"),
+ INST("0101000011110---", Id::VSETP, Type::Video, "VSETP"),
INST("0011001-1-------", Id::FFMA_IMM, Type::Ffma, "FFMA_IMM"),
INST("010010011-------", Id::FFMA_CR, Type::Ffma, "FFMA_CR"),
INST("010100011-------", Id::FFMA_RC, Type::Ffma, "FFMA_RC"),