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-rw-r--r--src/shader_recompiler/frontend/ir/basic_block.cpp5
-rw-r--r--src/shader_recompiler/frontend/ir/basic_block.h17
-rw-r--r--src/shader_recompiler/frontend/ir/ir_emitter.cpp16
-rw-r--r--src/shader_recompiler/frontend/ir/ir_emitter.h7
-rw-r--r--src/shader_recompiler/frontend/ir/microinstruction.cpp26
-rw-r--r--src/shader_recompiler/frontend/ir/opcodes.inc6
-rw-r--r--src/shader_recompiler/frontend/ir/value.h5
-rw-r--r--src/shader_recompiler/frontend/maxwell/translate_program.cpp6
8 files changed, 87 insertions, 1 deletions
diff --git a/src/shader_recompiler/frontend/ir/basic_block.cpp b/src/shader_recompiler/frontend/ir/basic_block.cpp
index 7c08b25ce..974efa4a0 100644
--- a/src/shader_recompiler/frontend/ir/basic_block.cpp
+++ b/src/shader_recompiler/frontend/ir/basic_block.cpp
@@ -22,6 +22,11 @@ void Block::AppendNewInst(Opcode op, std::initializer_list<Value> args) {
PrependNewInst(end(), op, args);
}
+Block::iterator Block::PrependNewInst(iterator insertion_point, const Inst& base_inst) {
+ Inst* const inst{inst_pool->Create(base_inst)};
+ return instructions.insert(insertion_point, *inst);
+}
+
Block::iterator Block::PrependNewInst(iterator insertion_point, Opcode op,
std::initializer_list<Value> args, u32 flags) {
Inst* const inst{inst_pool->Create(op, flags)};
diff --git a/src/shader_recompiler/frontend/ir/basic_block.h b/src/shader_recompiler/frontend/ir/basic_block.h
index 7e134b4c7..fbfe98266 100644
--- a/src/shader_recompiler/frontend/ir/basic_block.h
+++ b/src/shader_recompiler/frontend/ir/basic_block.h
@@ -40,6 +40,9 @@ public:
/// Appends a new instruction to the end of this basic block.
void AppendNewInst(Opcode op, std::initializer_list<Value> args);
+ /// Prepends a copy of an instruction to this basic block before the insertion point.
+ iterator PrependNewInst(iterator insertion_point, const Inst& base_inst);
+
/// Prepends a new instruction to this basic block before the insertion point.
iterator PrependNewInst(iterator insertion_point, Opcode op,
std::initializer_list<Value> args = {}, u32 flags = 0);
@@ -152,6 +155,17 @@ public:
return instructions.crend();
}
+ // Set the order of the block, it can be set pre order, the user decides
+ void SetOrder(u32 new_order) {
+ order = new_order;
+ }
+
+ // Get the order of the block.
+ // The higher, the closer is the block to the end.
+ [[nodiscard]] u32 GetOrder() const {
+ return order;
+ }
+
private:
/// Memory pool for instruction list
ObjectPool<Inst>* inst_pool;
@@ -171,6 +185,9 @@ private:
/// Intrusively stored host definition of this block.
u32 definition{};
+
+ /// Order of the block.
+ u32 order{};
};
using BlockList = std::vector<Block*>;
diff --git a/src/shader_recompiler/frontend/ir/ir_emitter.cpp b/src/shader_recompiler/frontend/ir/ir_emitter.cpp
index 13159a68d..356f889ac 100644
--- a/src/shader_recompiler/frontend/ir/ir_emitter.cpp
+++ b/src/shader_recompiler/frontend/ir/ir_emitter.cpp
@@ -375,6 +375,10 @@ F32 IREmitter::YDirection() {
return Inst<F32>(Opcode::YDirection);
}
+F32 IREmitter::ResolutionDownFactor() {
+ return Inst<F32>(Opcode::ResolutionDownFactor);
+}
+
U32 IREmitter::LaneId() {
return Inst<U32>(Opcode::LaneId);
}
@@ -1141,6 +1145,10 @@ U32 IREmitter::IMul(const U32& a, const U32& b) {
return Inst<U32>(Opcode::IMul32, a, b);
}
+U32 IREmitter::IDiv(const U32& a, const U32& b, bool is_signed) {
+ return Inst<U32>(is_signed ? Opcode::SDiv32 : Opcode::UDiv32, a, b);
+}
+
U32U64 IREmitter::INeg(const U32U64& value) {
switch (value.Type()) {
case Type::U32:
@@ -1938,6 +1946,14 @@ Value IREmitter::ImageAtomicExchange(const Value& handle, const Value& coords, c
return Inst(op, Flags{info}, handle, coords, value);
}
+U1 IREmitter::IsTextureScaled(const U32& index) {
+ return Inst<U1>(Opcode::IsTextureScaled, index);
+}
+
+U1 IREmitter::IsImageScaled(const U32& index) {
+ return Inst<U1>(Opcode::IsImageScaled, index);
+}
+
U1 IREmitter::VoteAll(const U1& value) {
return Inst<U1>(Opcode::VoteAll, value);
}
diff --git a/src/shader_recompiler/frontend/ir/ir_emitter.h b/src/shader_recompiler/frontend/ir/ir_emitter.h
index 1b89ca5a0..13eefa88b 100644
--- a/src/shader_recompiler/frontend/ir/ir_emitter.h
+++ b/src/shader_recompiler/frontend/ir/ir_emitter.h
@@ -102,6 +102,8 @@ public:
[[nodiscard]] U1 IsHelperInvocation();
[[nodiscard]] F32 YDirection();
+ [[nodiscard]] F32 ResolutionDownFactor();
+
[[nodiscard]] U32 LaneId();
[[nodiscard]] U32 LoadGlobalU8(const U64& address);
@@ -207,6 +209,7 @@ public:
[[nodiscard]] U32U64 IAdd(const U32U64& a, const U32U64& b);
[[nodiscard]] U32U64 ISub(const U32U64& a, const U32U64& b);
[[nodiscard]] U32 IMul(const U32& a, const U32& b);
+ [[nodiscard]] U32 IDiv(const U32& a, const U32& b, bool is_signed = false);
[[nodiscard]] U32U64 INeg(const U32U64& value);
[[nodiscard]] U32 IAbs(const U32& value);
[[nodiscard]] U32U64 ShiftLeftLogical(const U32U64& base, const U32& shift);
@@ -356,6 +359,10 @@ public:
TextureInstInfo info);
[[nodiscard]] Value ImageAtomicExchange(const Value& handle, const Value& coords,
const Value& value, TextureInstInfo info);
+
+ [[nodiscard]] U1 IsTextureScaled(const U32& index);
+ [[nodiscard]] U1 IsImageScaled(const U32& index);
+
[[nodiscard]] U1 VoteAll(const U1& value);
[[nodiscard]] U1 VoteAny(const U1& value);
[[nodiscard]] U1 VoteEqual(const U1& value);
diff --git a/src/shader_recompiler/frontend/ir/microinstruction.cpp b/src/shader_recompiler/frontend/ir/microinstruction.cpp
index 3dfa5a880..97e2bf6af 100644
--- a/src/shader_recompiler/frontend/ir/microinstruction.cpp
+++ b/src/shader_recompiler/frontend/ir/microinstruction.cpp
@@ -6,6 +6,7 @@
#include <memory>
#include "shader_recompiler/exception.h"
+#include "shader_recompiler/frontend/ir/basic_block.h"
#include "shader_recompiler/frontend/ir/type.h"
#include "shader_recompiler/frontend/ir/value.h"
@@ -46,6 +47,17 @@ Inst::Inst(IR::Opcode op_, u32 flags_) noexcept : op{op_}, flags{flags_} {
}
}
+Inst::Inst(const Inst& base) : op{base.op}, flags{base.flags} {
+ if (base.op == Opcode::Phi) {
+ throw NotImplementedException("Copying phi node");
+ }
+ std::construct_at(&args);
+ const size_t num_args{base.NumArgs()};
+ for (size_t index = 0; index < num_args; ++index) {
+ SetArg(index, base.Arg(index));
+ }
+}
+
Inst::~Inst() {
if (op == Opcode::Phi) {
std::destroy_at(&phi_args);
@@ -253,6 +265,10 @@ Inst* Inst::GetAssociatedPseudoOperation(IR::Opcode opcode) {
}
IR::Type Inst::Type() const {
+ if (op == IR::Opcode::Phi) {
+ // The type of a phi node is stored in its flags
+ return Flags<IR::Type>();
+ }
return TypeOf(op);
}
@@ -291,6 +307,16 @@ void Inst::AddPhiOperand(Block* predecessor, const Value& value) {
phi_args.emplace_back(predecessor, value);
}
+void Inst::OrderPhiArgs() {
+ if (op != Opcode::Phi) {
+ throw LogicError("{} is not a Phi instruction", op);
+ }
+ std::sort(phi_args.begin(), phi_args.end(),
+ [](const std::pair<Block*, Value>& a, const std::pair<Block*, Value>& b) {
+ return a.first->GetOrder() < b.first->GetOrder();
+ });
+}
+
void Inst::Invalidate() {
ClearArgs();
ReplaceOpcode(Opcode::Void);
diff --git a/src/shader_recompiler/frontend/ir/opcodes.inc b/src/shader_recompiler/frontend/ir/opcodes.inc
index d91098c80..6929919df 100644
--- a/src/shader_recompiler/frontend/ir/opcodes.inc
+++ b/src/shader_recompiler/frontend/ir/opcodes.inc
@@ -62,6 +62,7 @@ OPCODE(InvocationId, U32,
OPCODE(SampleId, U32, )
OPCODE(IsHelperInvocation, U1, )
OPCODE(YDirection, F32, )
+OPCODE(ResolutionDownFactor, F32, )
// Undefined
OPCODE(UndefU1, U1, )
@@ -286,6 +287,8 @@ OPCODE(IAdd64, U64, U64,
OPCODE(ISub32, U32, U32, U32, )
OPCODE(ISub64, U64, U64, U64, )
OPCODE(IMul32, U32, U32, U32, )
+OPCODE(SDiv32, U32, U32, U32, )
+OPCODE(UDiv32, U32, U32, U32, )
OPCODE(INeg32, U32, U32, )
OPCODE(INeg64, U64, U64, )
OPCODE(IAbs32, U32, U32, )
@@ -490,6 +493,9 @@ OPCODE(ImageGradient, F32x4, Opaq
OPCODE(ImageRead, U32x4, Opaque, Opaque, )
OPCODE(ImageWrite, Void, Opaque, Opaque, U32x4, )
+OPCODE(IsTextureScaled, U1, U32, )
+OPCODE(IsImageScaled, U1, U32, )
+
// Atomic Image operations
OPCODE(BindlessImageAtomicIAdd32, U32, U32, Opaque, U32, )
diff --git a/src/shader_recompiler/frontend/ir/value.h b/src/shader_recompiler/frontend/ir/value.h
index 334bb47aa..947579852 100644
--- a/src/shader_recompiler/frontend/ir/value.h
+++ b/src/shader_recompiler/frontend/ir/value.h
@@ -116,10 +116,10 @@ public:
class Inst : public boost::intrusive::list_base_hook<> {
public:
explicit Inst(IR::Opcode op_, u32 flags_) noexcept;
+ explicit Inst(const Inst& base);
~Inst();
Inst& operator=(const Inst&) = delete;
- Inst(const Inst&) = delete;
Inst& operator=(Inst&&) = delete;
Inst(Inst&&) = delete;
@@ -182,6 +182,9 @@ public:
/// Add phi operand to a phi instruction.
void AddPhiOperand(Block* predecessor, const Value& value);
+ /// Orders the Phi arguments from farthest away to nearest.
+ void OrderPhiArgs();
+
void Invalidate();
void ClearArgs();
diff --git a/src/shader_recompiler/frontend/maxwell/translate_program.cpp b/src/shader_recompiler/frontend/maxwell/translate_program.cpp
index 012d55357..267ebe4af 100644
--- a/src/shader_recompiler/frontend/maxwell/translate_program.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate_program.cpp
@@ -27,9 +27,11 @@ IR::BlockList GenerateBlocks(const IR::AbstractSyntaxList& syntax_list) {
}
IR::BlockList blocks;
blocks.reserve(num_syntax_blocks);
+ u32 order_index{};
for (const auto& node : syntax_list) {
if (node.type == IR::AbstractSyntaxNode::Type::Block) {
blocks.push_back(node.data.block);
+ blocks.back()->SetOrder(order_index++);
}
}
return blocks;
@@ -177,6 +179,10 @@ IR::Program TranslateProgram(ObjectPool<IR::Inst>& inst_pool, ObjectPool<IR::Blo
Optimization::TexturePass(env, program);
Optimization::ConstantPropagationPass(program);
+
+ if (Settings::values.resolution_info.active) {
+ Optimization::RescalingPass(program);
+ }
Optimization::DeadCodeEliminationPass(program);
if (Settings::values.renderer_debug) {
Optimization::VerificationPass(program);
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-04 15:10:17 +0100