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-rw-r--r--src/shader_recompiler/frontend/maxwell/translate/impl/load_store_memory.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/load_store_memory.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/load_store_memory.cpp
index 727524284..748b856c9 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/load_store_memory.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/load_store_memory.cpp
@@ -59,7 +59,7 @@ IR::U64 Address(TranslatorVisitor& v, u64 insn) {
const IR::U64 address{[&]() -> IR::U64 {
if (mem.e == 0) {
// LDG/STG without .E uses a 32-bit pointer, zero-extend it
- return v.ir.ConvertU(64, v.X(mem.addr_reg));
+ return v.ir.UConvert(64, v.X(mem.addr_reg));
}
if (!IR::IsAligned(mem.addr_reg, 2)) {
throw NotImplementedException("Unaligned address register");